Searched refs:uses (Results 1 - 12 of 12) sorted by relevance

/art/compiler/dex/
H A Dvreg_analysis.cc105 // Handles uses
109 changed |= SetCore(ssa_rep->uses[next], true);
112 changed |= SetRef(ssa_rep->uses[next], true);
115 reg_location_[ssa_rep->uses[next]].wide = true;
116 reg_location_[ssa_rep->uses[next + 1]].wide = true;
117 reg_location_[ssa_rep->uses[next + 1]].high_word = true;
118 DCHECK_EQ(SRegToVReg(ssa_rep->uses[next])+1,
119 SRegToVReg(ssa_rep->uses[next + 1]));
127 changed |= SetCore(ssa_rep->uses[next], true);
130 changed |= SetRef(ssa_rep->uses[nex
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H A Dlocal_value_numbering.cc109 uint16_t res = GetOperandValue(mir->ssa_rep->uses[0]);
118 uint16_t res = GetOperandValueWide(mir->ssa_rep->uses[0]);
183 uint16_t operand1 = GetOperandValue(mir->ssa_rep->uses[0]);
194 uint16_t operand1 = GetOperandValue(mir->ssa_rep->uses[0]);
207 uint16_t operand1 = GetOperandValueWide(mir->ssa_rep->uses[0]);
218 uint16_t operand1 = GetOperandValueWide(mir->ssa_rep->uses[0]);
228 uint16_t operand1 = GetOperandValueWide(mir->ssa_rep->uses[0]);
229 uint16_t operand2 = GetOperandValueWide(mir->ssa_rep->uses[2]);
260 uint16_t operand1 = GetOperandValue(mir->ssa_rep->uses[0]);
261 uint16_t operand2 = GetOperandValue(mir->ssa_rep->uses[
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H A Dmir_optimization.cc81 if (!is_constant_v_->IsBitSet(mir->ssa_rep->uses[i])) break;
85 SetConstant(mir->ssa_rep->defs[0], constant_values_[mir->ssa_rep->uses[0]]);
87 SetConstant(mir->ssa_rep->defs[1], constant_values_[mir->ssa_rep->uses[1]]);
175 if (mir->ssa_rep->uses[i] == ssa_name) {
262 (mir->ssa_rep->defs[0] == mir_next->ssa_rep->uses[0]) &&
290 mir_next->ssa_rep->uses = mir->ssa_rep->uses;
386 if (IsConst(if_true->ssa_rep->uses[0]) &&
387 IsConst(if_false->ssa_rep->uses[0])) {
389 if_true->dalvikInsn.vB = ConstantValue(if_true->ssa_rep->uses[
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H A Dssa_transformation.cc583 std::vector<int> uses; local
594 uses.clear();
605 uses.push_back(ssa_reg);
610 int num_uses = uses.size();
612 mir->ssa_rep->uses =
621 /* Set the uses array for the phi node */
622 int *use_ptr = mir->ssa_rep->uses;
624 *use_ptr++ = uses[i];
H A Dmir_dataflow.cc937 void MIRGraph::HandleSSAUse(int* uses, int dalvik_reg, int reg_index) { argument
939 uses[reg_index] = vreg_to_ssa_map_[dalvik_reg];
957 mir->ssa_rep->uses = static_cast<int*>(arena_->Alloc(sizeof(int) * num_uses,
964 HandleSSAUse(mir->ssa_rep->uses, d_insn->arg[i], i);
975 mir->ssa_rep->uses = static_cast<int*>(arena_->Alloc(sizeof(int) * num_uses,
982 HandleSSAUse(mir->ssa_rep->uses, d_insn->vC+i, i);
1044 mir->ssa_rep->uses = static_cast<int*>(arena_->Alloc(sizeof(int) * num_uses,
1073 HandleSSAUse(mir->ssa_rep->uses, d_insn->vA, num_uses++);
1076 HandleSSAUse(mir->ssa_rep->uses, d_insn->vA+1, num_uses++);
1081 HandleSSAUse(mir->ssa_rep->uses, d_ins
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H A Dmir_graph.cc890 int uses = (ssa_rep != NULL) ? ssa_rep->num_uses : 0; local
900 uses = ssa_rep->num_uses;
921 GetSSANameWithConst(ssa_rep->uses[0], true).c_str()));
924 for (i = 1; i < uses; i++) {
926 GetSSANameWithConst(ssa_rep->uses[i], true).c_str(),
935 str.append(StringPrintf(" %s,", GetSSANameWithConst(ssa_rep->uses[0], false).c_str()));
939 str.append(StringPrintf(" %s, %s,", GetSSANameWithConst(ssa_rep->uses[0], false).c_str(),
940 GetSSANameWithConst(ssa_rep->uses[1], false).c_str()));
959 if (uses != 0) {
963 for (int i = 0; i < uses;
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H A Dmir_graph.h74 kNullCheckSrc0, // Null check of uses[0].
75 kNullCheckSrc1, // Null check of uses[1].
76 kNullCheckSrc2, // Null check of uses[2].
82 kRangeCheckSrc1, // Range check of uses[1].
83 kRangeCheckSrc2, // Range check of uses[2].
84 kRangeCheckSrc3, // Range check of uses[3].
216 * uses/defs retain the Dalvik convention that long operations operate on a pair of 32-bit
217 * vregs. For example, "ADD_LONG v0, v2, v3" would have 2 defs (v0/v1) and 4 uses (v2/v3, v4/v5).
224 int* uses; member in struct:art::SSARepresentation
501 RegLocation res = reg_location_[mir->ssa_rep->uses[nu
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/art/compiler/sea_ir/ir/
H A Dinstruction_nodes.h66 std::vector<int> uses = GetUses(); local
68 for (std::vector<int>::const_iterator cit = uses.begin(); cit != uses.end(); cit++) {
172 std::vector<int> uses; // Using vector<> instead of set<> because order matters. local
173 uses.push_back(RETURN_REGISTER);
174 return uses;
217 std::vector<int> uses = AddIntInstructionNode::GetUses(); local
218 uses.push_back(UNNAMED_CONST_REGISTER);
219 return uses;
H A Dsea.cc363 // Rename uses.
379 // Fill in uses of phi functions in CFG successor regions.
666 std::vector<int> uses; // Using vector<> instead of set<> because order matters. local
669 uses.push_back(vA);
673 uses.push_back(vB);
677 uses.push_back(vC);
679 return uses;
/art/compiler/dex/quick/arm/
H A Dint_arm.cc189 LOG(INFO) << "num uses = " << mir->ssa_rep->num_uses;
193 LOG(INFO) << "MOVE case, operands = " << mir->ssa_rep->uses[1] << ", "
194 << mir->ssa_rep->uses[2];
231 RegLocation rl_true = mir_graph_->reg_location_[mir->ssa_rep->uses[1]];
232 RegLocation rl_false = mir_graph_->reg_location_[mir->ssa_rep->uses[2]];
H A Dcall_arm.cc86 int v_reg = mir_graph_->SRegToVReg(mir->ssa_rep->uses[i]);
/art/compiler/dex/quick/
H A Dralloc_util.cc963 * Simple register promotion. Just do a static count of the uses
1166 return mir->ssa_rep->uses[num];

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