/dalvik/vm/compiler/codegen/mips/Mips32/ |
H A D | Ralloc.cpp | 33 int lowReg; local 38 lowReg = dvmCompilerAllocTempDouble(cUnit); 39 highReg = lowReg + 1; 40 res = (lowReg & 0xff) | ((highReg & 0xff) << 8); 45 lowReg = dvmCompilerAllocTemp(cUnit); 47 res = (lowReg & 0xff) | ((highReg & 0xff) << 8);
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H A D | Gen.cpp | 87 opRegRegImm(cUnit, kOpAdd, rlResult.lowReg, 88 rlSrc.lowReg, 0x80000000); 100 genRegCopy(cUnit, rlResult.lowReg, rlSrc.lowReg); 125 newLIR3(cUnit, opc, rlDest.lowReg, rlSrc1.lowReg, rlSrc2.lowReg); 148 opRegRegReg(cUnit, firstOp, rlResult.lowReg, rlResult.lowReg, rlSrc2.lowReg); [all...] |
H A D | Factory.cpp | 32 static void storePair(CompilationUnit *cUnit, int base, int lowReg, 34 static void loadPair(CompilationUnit *cUnit, int base, int lowReg, int highReg); 823 static void storePair(CompilationUnit *cUnit, int base, int lowReg, int highReg) argument 825 storeWordDisp(cUnit, base, LOWORD_OFFSET, lowReg); 829 static void loadPair(CompilationUnit *cUnit, int base, int lowReg, int highReg) argument 831 loadWordDisp(cUnit, base, LOWORD_OFFSET , lowReg);
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/dalvik/vm/compiler/codegen/arm/Thumb/ |
H A D | Ralloc.cpp | 33 int lowReg; local 35 lowReg = dvmCompilerAllocTemp(cUnit); 37 res = (lowReg & 0xff) | ((highReg & 0xff) << 8);
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H A D | Gen.cpp | 91 opRegRegImm(cUnit, kOpAdd, rlResult.lowReg, 92 rlSrc.lowReg, 0x80000000); 104 genRegCopy(cUnit, rlResult.lowReg, rlSrc.lowReg); 138 opRegReg(cUnit, firstOp, rlResult.lowReg, rlSrc2.lowReg); 145 opRegReg(cUnit, firstOp, rlSrc1.lowReg, rlResult.lowReg); 148 dvmCompilerClobber(cUnit, rlResult.lowReg); 150 dvmCompilerClobber(cUnit, rlSrc1.lowReg); [all...] |
H A D | Factory.cpp | 27 static void storePair(CompilationUnit *cUnit, int base, int lowReg, 29 static void loadPair(CompilationUnit *cUnit, int base, int lowReg, int highReg); 819 static void storePair(CompilationUnit *cUnit, int base, int lowReg, int highReg) argument 821 if (lowReg < highReg) { 822 storeMultiple(cUnit, base, (1 << lowReg) | (1 << highReg)); 824 storeWordDisp(cUnit, base, 0, lowReg); 829 static void loadPair(CompilationUnit *cUnit, int base, int lowReg, int highReg) argument 831 if (lowReg < highReg) { 832 loadMultiple(cUnit, base, (1 << lowReg) | (1 << highReg)); 834 loadWordDisp(cUnit, base, 0 , lowReg); [all...] |
/dalvik/vm/compiler/codegen/arm/Thumb2/ |
H A D | Ralloc.cpp | 36 int lowReg; local 44 lowReg = dvmCompilerAllocTempDouble(cUnit); 45 highReg = lowReg + 1; 47 lowReg = dvmCompilerAllocTemp(cUnit); 50 res = (lowReg & 0xff) | ((highReg & 0xff) << 8);
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H A D | Gen.cpp | 82 newLIR2(cUnit, kThumb2Vnegs, rlResult.lowReg, rlSrc.lowReg); 92 newLIR2(cUnit, kThumb2Vnegd, S2D(rlResult.lowReg, rlResult.highReg), 93 S2D(rlSrc.lowReg, rlSrc.highReg)); 113 newLIR3(cUnit, kThumb2MulRRR, tmp1, rlSrc2.lowReg, rlSrc1.highReg); 114 newLIR4(cUnit, kThumb2Umull, resLo, resHi, rlSrc2.lowReg, rlSrc1.lowReg); 115 newLIR4(cUnit, kThumb2Mla, tmp1, rlSrc1.lowReg, rlSrc2.highReg, tmp1); 120 rlResult.lowReg = resLo; 133 opRegRegReg(cUnit, firstOp, rlResult.lowReg, rlSrc [all...] |
H A D | Factory.cpp | 1151 static void storePair(CompilationUnit *cUnit, int base, int lowReg, int highReg) argument 1153 storeBaseDispWide(cUnit, base, 0, lowReg, highReg); 1156 static void loadPair(CompilationUnit *cUnit, int base, int lowReg, int highReg) argument 1158 loadBaseDispWide(cUnit, NULL, base, 0, lowReg, highReg, INVALID_SREG);
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/dalvik/vm/compiler/codegen/ |
H A D | CodegenFactory.cpp | 58 genRegCopy(cUnit, reg1, rlSrc.lowReg); 91 genRegCopyWide(cUnit, regLo, regHi, rlSrc.lowReg, rlSrc.highReg); 124 loadValueDirect(cUnit, rlSrc, rlSrc.lowReg); 126 dvmCompilerMarkLive(cUnit, rlSrc.lowReg, rlSrc.sRegLow); 129 rlSrc.lowReg); 131 dvmCompilerClobber(cUnit, rlSrc.lowReg); 147 if (dvmCompilerIsLive(cUnit, rlSrc.lowReg) || 151 genRegCopy(cUnit, rlDest.lowReg, rlSrc.lowReg); 154 rlDest.lowReg [all...] |
H A D | RallocUtil.cpp | 469 RegisterInfo *p = getRegInfo(cUnit, rl.lowReg); 485 RegisterInfo *p = getRegInfo(cUnit, rl.lowReg); 496 RegisterInfo *infoLo = getRegInfo(cUnit, rl.lowReg); 527 RegisterInfo *p = getRegInfo(cUnit, rl.lowReg); 532 dvmCompilerResetDef(cUnit, rl.lowReg); 539 RegisterInfo *p = getRegInfo(cUnit, rl.lowReg); 544 dvmCompilerResetDef(cUnit, rl.lowReg); 632 extern void dvmCompilerMarkPair(CompilationUnit *cUnit, int lowReg, int highReg) argument 634 RegisterInfo *infoLo = getRegInfo(cUnit, lowReg); 638 infoHi->partner = lowReg; 751 int lowReg; local [all...] |
H A D | Ralloc.h | 98 extern void dvmCompilerMarkPair(CompilationUnit *cUnit, int lowReg,
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/dalvik/vm/compiler/codegen/mips/ |
H A D | CodegenFactory.cpp | 52 genRegCopy(cUnit, reg1, rlSrc.lowReg); 85 genRegCopyWide(cUnit, regLo, regHi, rlSrc.lowReg, rlSrc.highReg); 117 loadValueDirect(cUnit, rlSrc, rlSrc.lowReg); 119 dvmCompilerMarkLive(cUnit, rlSrc.lowReg, rlSrc.sRegLow); 121 loadWordDisp(cUnit, rSELF, offsetof(Thread, interpSave.retval), rlSrc.lowReg); 123 dvmCompilerClobber(cUnit, rlSrc.lowReg); 139 if (dvmCompilerIsLive(cUnit, rlSrc.lowReg) || 143 genRegCopy(cUnit, rlDest.lowReg, rlSrc.lowReg); 146 rlDest.lowReg [all...] |
H A D | RallocUtil.cpp | 535 RegisterInfo *p = getRegInfo(cUnit, rl.lowReg); 551 RegisterInfo *p = getRegInfo(cUnit, rl.lowReg); 562 RegisterInfo *infoLo = getRegInfo(cUnit, rl.lowReg); 599 RegisterInfo *p = getRegInfo(cUnit, rl.lowReg); 604 dvmCompilerResetDef(cUnit, rl.lowReg); 611 RegisterInfo *p = getRegInfo(cUnit, rl.lowReg); 616 dvmCompilerResetDef(cUnit, rl.lowReg); 704 extern void dvmCompilerMarkPair(CompilationUnit *cUnit, int lowReg, int highReg) argument 706 RegisterInfo *infoLo = getRegInfo(cUnit, lowReg); 710 infoHi->partner = lowReg; 823 int lowReg; local [all...] |
H A D | CodegenDriver.cpp | 377 genNullCheck(cUnit, rlObj.sRegLow, rlObj.lowReg, mir->offset, 379 opRegRegImm(cUnit, kOpAdd, regPtr, rlObj.lowReg, fieldOffset); 383 loadPair(cUnit, regPtr, rlResult.lowReg, rlResult.highReg); 398 genNullCheck(cUnit, rlObj.sRegLow, rlObj.lowReg, mir->offset, 401 opRegRegImm(cUnit, kOpAdd, regPtr, rlObj.lowReg, fieldOffset); 404 storePair(cUnit, regPtr, rlSrc.lowReg, rlSrc.highReg); 423 genNullCheck(cUnit, rlObj.sRegLow, rlObj.lowReg, mir->offset, 427 loadBaseDisp(cUnit, mir, rlObj.lowReg, fieldOffset, rlResult.lowReg, 449 genNullCheck(cUnit, rlObj.sRegLow, rlObj.lowReg, mi [all...] |
H A D | Ralloc.h | 102 extern void dvmCompilerMarkPair(CompilationUnit *cUnit, int lowReg,
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/dalvik/vm/compiler/codegen/arm/FP/ |
H A D | Thumb2VFP.cpp | 57 newLIR3(cUnit, (ArmOpcode)op, rlResult.lowReg, rlSrc1.lowReg, 58 rlSrc2.lowReg); 104 newLIR3(cUnit, (ArmOpcode)op, S2D(rlResult.lowReg, rlResult.highReg), 105 S2D(rlSrc1.lowReg, rlSrc1.highReg), 106 S2D(rlSrc2.lowReg, rlSrc2.highReg)); 164 srcReg = S2D(rlSrc.lowReg, rlSrc.highReg); 168 srcReg = rlSrc.lowReg; 173 newLIR2(cUnit, (ArmOpcode)op, S2D(rlResult.lowReg, rlResult.highReg), 179 newLIR2(cUnit, (ArmOpcode)op, rlResult.lowReg, srcRe [all...] |
H A D | ThumbVFP.cpp | 34 dvmCompilerFlushRegWide(cUnit, rlSrc.lowReg, rlSrc.highReg); 36 dvmCompilerFlushReg(cUnit, rlSrc.lowReg); 105 dvmCompilerClobber(cUnit, rlDest.lowReg); 148 dvmCompilerClobber(cUnit, rlDest.lowReg); 222 dvmCompilerClobber(cUnit, rlDest.lowReg);
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/dalvik/vm/compiler/codegen/arm/ |
H A D | ArmRallocUtil.cpp | 83 dvmCompilerMarkPair(cUnit, res.lowReg, res.highReg); 90 res.lowReg = r2; 96 dvmCompilerMarkPair(cUnit, res.lowReg, res.highReg); 111 res.lowReg = r1;
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H A D | CodegenDriver.cpp | 311 genNullCheck(cUnit, rlObj.sRegLow, rlObj.lowReg, mir->offset, 313 opRegRegImm(cUnit, kOpAdd, regPtr, rlObj.lowReg, fieldOffset); 317 loadPair(cUnit, regPtr, rlResult.lowReg, rlResult.highReg); 332 genNullCheck(cUnit, rlObj.sRegLow, rlObj.lowReg, mir->offset, 335 opRegRegImm(cUnit, kOpAdd, regPtr, rlObj.lowReg, fieldOffset); 338 storePair(cUnit, regPtr, rlSrc.lowReg, rlSrc.highReg); 357 genNullCheck(cUnit, rlObj.sRegLow, rlObj.lowReg, mir->offset, 361 loadBaseDisp(cUnit, mir, rlObj.lowReg, fieldOffset, rlResult.lowReg, 383 genNullCheck(cUnit, rlObj.sRegLow, rlObj.lowReg, mi [all...] |
/dalvik/vm/compiler/codegen/mips/FP/ |
H A D | MipsFP.cpp | 34 dvmCompilerFlushRegWideForV5TEVFP(cUnit, rlSrc.lowReg, 37 dvmCompilerFlushRegForV5TEVFP(cUnit, rlSrc.lowReg); 107 newLIR3(cUnit, (MipsOpCode)op, rlResult.lowReg, rlSrc1.lowReg, rlSrc2.lowReg); 151 dvmCompilerClobber(cUnit, rlDest.lowReg); 197 newLIR3(cUnit, (MipsOpCode)op, S2D(rlResult.lowReg, rlResult.highReg), 198 S2D(rlSrc1.lowReg, rlSrc1.highReg), 199 S2D(rlSrc2.lowReg, rlSrc2.highReg)); 239 dvmCompilerClobber(cUnit, rlDest.lowReg); [all...] |
/dalvik/vm/compiler/ |
H A D | CompilerIR.h | 42 u1 lowReg:6; // First physical register member in struct:RegLocation
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