| /external/chromium_org/v8/test/cctest/ |
| H A D | test-assembler-mips.cc | 1164 // Save FCSR.
1165 __ cfc1(a1, FCSR);
1167 __ ctc1(zero_reg, FCSR);
1186 __ ctc1(zero_reg, FCSR); \
1188 __ cfc1(a2, FCSR); \
1192 __ ctc1(zero_reg, FCSR); \
1194 __ cfc1(a2, FCSR); \
1198 __ ctc1(zero_reg, FCSR); \
1200 __ cfc1(a2, FCSR); \
1204 __ ctc1(zero_reg, FCSR); \
[all...] |
| /external/v8/test/cctest/ |
| H A D | test-assembler-mips.cc | 1173 // Save FCSR.
1174 __ cfc1(a1, FCSR);
1176 __ ctc1(zero_reg, FCSR);
1195 __ ctc1(zero_reg, FCSR); \
1197 __ cfc1(a2, FCSR); \
1201 __ ctc1(zero_reg, FCSR); \
1203 __ cfc1(a2, FCSR); \
1207 __ ctc1(zero_reg, FCSR); \
1209 __ cfc1(a2, FCSR); \
1213 __ ctc1(zero_reg, FCSR); \
[all...] |
| /external/valgrind/main/VEX/priv/ |
| H A D | host_mips_defs.h | 143 #define FCSR() hregMIPS_FCSR() macro
382 Min_MtFCSR, /* set FCSR register */
383 Min_MfFCSR, /* get FCSR register */
610 /* Move from GP register to FCSR register. */
614 /* Move from FCSR register to GP register. */
|
| /external/chromium_org/v8/src/mips/ |
| H A D | macro-assembler-mips.cc | 1235 // For testing purposes we need to fetch content of the FCSR register and
1237 // 24. bit of the FCSR).
1238 cfc1(scratch, FCSR);
1261 // For testing purposes we need to fetch content of the FCSR register and
1263 // 24. bit of the FCSR).
1264 cfc1(scratch, FCSR);
1384 // Save FCSR.
1385 cfc1(scratch, FCSR);
1387 ctc1(zero_reg, FCSR);
1405 // Retrieve FCSR
[all...] |
| H A D | stub-cache-mips.cc | 2356 // Backup FCSR.
2357 __ cfc1(a3, FCSR);
2358 // Clearing FCSR clears the exception mask with no side-effects.
2359 __ ctc1(zero_reg, FCSR);
2369 // Retrieve FCSR and check for fpu errors.
2370 __ cfc1(t5, FCSR);
2407 // Restore FCSR and return.
2408 __ ctc1(a3, FCSR);
2413 // Restore FCSR and fall to slow case.
2414 __ ctc1(a3, FCSR);
[all...] |
| H A D | assembler-mips.h | 315 // Currently only FCSR (#31) is implemented.
336 const FPUControlRegister FCSR = { kFCSRRegister }; member in namespace:v8::internal
|
| /external/v8/src/mips/ |
| H A D | macro-assembler-mips.cc | 1232 // For testing purposes we need to fetch content of the FCSR register and
1234 // 24. bit of the FCSR).
1235 cfc1(scratch, FCSR);
1258 // For testing purposes we need to fetch content of the FCSR register and
1260 // 24. bit of the FCSR).
1261 cfc1(scratch, FCSR);
1412 // Save FCSR.
1413 cfc1(scratch1, FCSR);
1415 ctc1(zero_reg, FCSR);
1433 // Retrieve FCSR
[all...] |
| H A D | assembler-mips.h | 329 // Currently only FCSR (#31) is implemented.
350 const FPUControlRegister FCSR = { kFCSRRegister }; member in namespace:v8::internal
|
| H A D | stub-cache-mips.cc | 2068 // Backup FCSR.
2069 __ cfc1(a3, FCSR);
2070 // Clearing FCSR clears the exception mask with no side-effects.
2071 __ ctc1(zero_reg, FCSR);
2081 // Retrieve FCSR and check for fpu errors.
2082 __ cfc1(t5, FCSR);
2119 // Restore FCSR and return.
2120 __ ctc1(a3, FCSR);
2126 // Restore FCSR and fall to slow case.
2127 __ ctc1(a3, FCSR);
[all...] |
| /external/valgrind/main/memcheck/ |
| H A D | mc_machine.c | 1008 if (o == GOF(FCSR) && sz == 4) return -1; /* slot unused */
|
| /external/valgrind/main/none/tests/mips32/ |
| H A D | round.stdout.exp | 194 -------------------------- test FPU Conversion Operations Using the FCSR Rounding Mode --------------------------
|
| /external/robolectric/lib/main/ |
| H A D | sqlite-jdbc-3.7.2.jar | META-INF/ META-INF/MANIFEST.MF META-INF/maven/ META-INF/maven/org. ... |