Searched refs:INSN_RS1 (Results 1 - 1 of 1) sorted by relevance

/external/qemu/tcg/sparc/
H A Dtcg-target.c193 #define INSN_RS1(x) ((x) << 14) macro
252 #define RDY (INSN_OP(2) | INSN_OP3(0x28) | INSN_RS1(0))
289 tcg_out32(s, op | INSN_RD(rd) | INSN_RS1(rs1) |
296 tcg_out32(s, op | INSN_RD(rd) | INSN_RS1(rs1) |
303 tcg_out32(s, op | INSN_RD(rd) | INSN_RS1(rs1)
361 tcg_out32(s, LDUW | INSN_RD(ret) | INSN_RS1(ret) |
371 tcg_out32(s, LDX | INSN_RD(ret) | INSN_RS1(ret) |
374 tcg_out32(s, LDUW | INSN_RD(ret) | INSN_RS1(ret) |
382 tcg_out32(s, op | INSN_RD(ret) | INSN_RS1(addr) |
386 tcg_out32(s, op | INSN_RD(ret) | INSN_RS1(TCG_REG_I
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