/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 709 SmallVector<SDValue, 8> MemOpChains; local 750 MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff, 767 MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff, 800 MemOpChains.push_back(DAG.getStore(Chain, dl, Lo, PtrOff, 810 MemOpChains.push_back(DAG.getStore(Chain, dl, Hi, PtrOff, 816 MemOpChains.push_back(DAG.getStore(Chain, dl, Lo, PtrOff, 841 MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff, 848 if (!MemOpChains.empty()) 850 &MemOpChains[0], MemOpChains [all...] |
/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 2978 SmallVectorImpl<SDValue> &MemOpChains, 2985 MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, FIN, 3101 bool isVector, SmallVectorImpl<SDValue> &MemOpChains, 3115 MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff, 3620 SmallVector<SDValue, 8> MemOpChains; local 3680 MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff, 3691 if (!MemOpChains.empty()) 3693 &MemOpChains[0], MemOpChains.size()); 3832 SmallVector<SDValue, 8> MemOpChains; local 2975 StoreTailCallArgumentsToStackSlot(SelectionDAG &DAG, SDValue Chain, const SmallVectorImpl<TailCallArgumentInfo> &TailCallArgs, SmallVectorImpl<SDValue> &MemOpChains, SDLoc dl) argument 3098 LowerMemOpCallTo(SelectionDAG &DAG, MachineFunction &MF, SDValue Chain, SDValue Arg, SDValue PtrOff, int SPDiff, unsigned ArgOffset, bool isPPC64, bool isTailCall, bool isVector, SmallVectorImpl<SDValue> &MemOpChains, SmallVectorImpl<TailCallArgumentInfo> &TailCallArguments, SDLoc dl) argument 4214 SmallVector<SDValue, 8> MemOpChains; local [all...] |
/external/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 485 SmallVector<SDValue, 12> MemOpChains; local 539 MemOpChains.push_back(MemOp); 545 if (!MemOpChains.empty()) 547 &MemOpChains[0], MemOpChains.size());
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/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 450 SmallVector<SDValue, 8> MemOpChains; local 488 MemOpChains.push_back(CreateCopyOfByValArgument(Arg, PtrOff, Chain, 493 MemOpChains.push_back(DAG.getStore(Chain, dl, Arg, PtrOff, 509 if (!MemOpChains.empty()) { 510 Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, &MemOpChains[0], 511 MemOpChains.size());
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/external/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.h | 389 SmallVectorImpl<SDValue> &MemOpChains, SDValue StackPtr,
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H A D | MipsISelLowering.cpp | 2384 SmallVector<SDValue, 8> MemOpChains; local 2401 passByValArg(Chain, DL, RegsToPass, MemOpChains, StackPtr, MFI, DAG, Arg, 2454 MemOpChains.push_back(passArgOnStack(StackPtr, VA.getLocMemOffset(), 2460 if (!MemOpChains.empty()) 2462 &MemOpChains[0], MemOpChains.size()); 3390 SmallVectorImpl<SDValue> &MemOpChains, SDValue StackPtr, 3412 MemOpChains.push_back(LoadVal.getValue(1)); 3441 MemOpChains.push_back(LoadVal.getValue(1)); 3480 MemOpChains 3388 passByValArg(SDValue Chain, SDLoc DL, std::deque< std::pair<unsigned, SDValue> > &RegsToPass, SmallVectorImpl<SDValue> &MemOpChains, SDValue StackPtr, MachineFrameInfo *MFI, SelectionDAG &DAG, SDValue Arg, const MipsCC &CC, const ByValArgInfo &ByVal, const ISD::ArgFlagsTy &Flags, bool isLittle) const argument [all...] |
/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 909 SmallVector<SDValue, 12> MemOpChains; local 940 MemOpChains.push_back(DAG.getNode(XCoreISD::STWSP, dl, MVT::Other, 948 if (!MemOpChains.empty()) 950 &MemOpChains[0], MemOpChains.size());
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/external/llvm/lib/Target/ARM/ |
H A D | ARMISelLowering.h | 423 SmallVectorImpl<SDValue> &MemOpChains,
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H A D | ARMISelLowering.cpp | 1372 SmallVectorImpl<SDValue> &MemOpChains, 1386 MemOpChains.push_back(LowerMemOpCallTo(Chain, StackPtr, fmrrd.getValue(1), 1454 SmallVector<SDValue, 8> MemOpChains; local 1493 VA, ArgLocs[++i], StackPtr, MemOpChains, Flags); 1498 VA, ArgLocs[++i], StackPtr, MemOpChains, Flags); 1502 MemOpChains.push_back(LowerMemOpCallTo(Chain, StackPtr, Op1, 1507 StackPtr, MemOpChains, Flags); 1540 MemOpChains.push_back(Load.getValue(1)); 1564 MemOpChains.push_back(DAG.getNode(ARMISD::COPY_STRUCT_BYVAL, dl, VTs, 1570 MemOpChains 1367 PassF64ArgInRegs(SDLoc dl, SelectionDAG &DAG, SDValue Chain, SDValue &Arg, RegsToPassVector &RegsToPass, CCValAssign &VA, CCValAssign &NextVA, SDValue &StackPtr, SmallVectorImpl<SDValue> &MemOpChains, ISD::ArgFlagsTy Flags) const argument [all...] |
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 1210 SmallVector<SDValue, 8> MemOpChains; local 1292 MemOpChains.push_back(Cpy); 1297 MemOpChains.push_back(Store); 1304 if (!MemOpChains.empty()) 1306 &MemOpChains[0], MemOpChains.size());
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/external/llvm/lib/Target/SystemZ/ |
H A D | SystemZISelLowering.cpp | 725 SmallVector<SDValue, 8> MemOpChains; local 735 MemOpChains.push_back(DAG.getStore(Chain, DL, ArgValue, SpillSlot, 759 MemOpChains.push_back(DAG.getStore(Chain, DL, ArgValue, Address, 766 if (!MemOpChains.empty()) 768 &MemOpChains[0], MemOpChains.size());
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/external/llvm/lib/Target/X86/ |
H A D | X86ISelLowering.cpp | 2557 SmallVector<SDValue, 8> MemOpChains; local 2625 MemOpChains.push_back(LowerMemOpCallTo(Chain, StackPtr, Arg, 2630 if (!MemOpChains.empty()) 2632 &MemOpChains[0], MemOpChains.size());
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