/external/chromium_org/third_party/opus/src/silk/float/ |
H A D | corrMatrix_FLP.c | 43 const opus_int Order, /* I Max lag for correlation */ 50 ptr1 = &x[ Order - 1 ]; /* Points to first sample of column 0 of X: X[:,0] */ 51 for( lag = 0; lag < Order; lag++ ) { 62 const opus_int Order, /* I Max lag for correlation */ 70 ptr1 = &x[ Order - 1 ]; /* First sample of column 0 of X */ 72 matrix_ptr( XX, 0, 0, Order ) = ( silk_float )energy; 73 for( j = 1; j < Order; j++ ) { 76 matrix_ptr( XX, j, j, Order ) = ( silk_float )energy; 79 ptr2 = &x[ Order - 2 ]; /* First sample of column 1 of X */ 80 for( lag = 1; lag < Order; la 39 silk_corrVector_FLP( const silk_float *x, const silk_float *t, const opus_int L, const opus_int Order, silk_float *Xt ) argument 59 silk_corrMatrix_FLP( const silk_float *x, const opus_int L, const opus_int Order, silk_float *XX ) argument [all...] |
H A D | LPC_analysis_filter_FLP.c | 39 /* first Order output samples are set to zero */ 208 /* first Order output samples are set to zero */ 215 const opus_int Order /* I LPC order */ 218 silk_assert( Order <= length ); 220 switch( Order ) { 246 /* Set first Order output samples to zero */ 247 silk_memset( r_LPC, 0, Order * sizeof( silk_float ) );
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H A D | main_FLP.h | 194 const opus_int Order /* I LPC order */ 231 const opus_int Order, /* I Max lag for correlation */ 240 const opus_int Order, /* I Max lag for correlation */
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/external/llvm/lib/CodeGen/ |
H A D | AllocationOrder.cpp | 1 //===-- llvm/CodeGen/AllocationOrder.cpp - Allocation Order ---------------===// 35 Order = RegClassInfo.getOrder(MF.getRegInfo().getRegClass(VirtReg)); 36 TRI->getRegAllocationHints(VirtReg, Order, Hints, MF, &VRM); 49 assert(std::find(Order.begin(), Order.end(), Hints[I]) != Order.end() &&
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H A D | AllocationOrder.h | 1 //===-- llvm/CodeGen/AllocationOrder.h - Allocation Order -*- C++ -*-------===// 30 ArrayRef<MCPhysReg> Order; member in class:llvm::AllocationOrder 43 ArrayRef<MCPhysReg> getOrder() const { return Order; } 51 while (Pos < int(Order.size())) { 52 unsigned Reg = Order[Pos++]; 67 return Order[Pos++];
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H A D | RegisterClassInfo.cpp | 84 if (!RCI.Order) 85 RCI.Order.reset(new MCPhysReg[NumRegs]); 110 RCI.Order[N++] = PhysReg; 123 RCI.Order[N++] = PhysReg; 142 dbgs() << ' ' << PrintReg(RCI.Order[I], TRI);
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H A D | TargetRegisterInfo.cpp | 125 ArrayRef<uint16_t> Order = RC->getRawAllocationOrder(MF); local 126 for (unsigned i = 0; i != Order.size(); ++i) 127 R.set(Order[i]); 257 ArrayRef<MCPhysReg> Order, 282 if (std::find(Order.begin(), Order.end(), Phys) == Order.end()) 256 getRegAllocationHints(unsigned VirtReg, ArrayRef<MCPhysReg> Order, SmallVectorImpl<MCPhysReg> &Hints, const MachineFunction &MF, const VirtRegMap *VRM) const argument
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/external/chromium_org/skia/ext/ |
H A D | recursive_gaussian_convolution.h | 21 enum Order { enum in class:skia::RecursiveFilter 29 SK_API RecursiveFilter(float sigma, Order order); 31 Order order() const { return order_; } 35 Order order_;
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H A D | recursive_gaussian_convolution.cc | 32 template<RecursiveFilter::Order order> 54 template<RecursiveFilter::Order order> 73 template<RecursiveFilter::Order order, bool absolute_values> 145 RecursiveFilter::Order order, 217 RecursiveFilter::RecursiveFilter(float sigma, Order order)
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/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | SDNodeDbgValue.h | 50 unsigned Order; member in class:llvm::SDDbgValue 55 unsigned O) : mdPtr(mdP), Offset(off), DL(dl), Order(O), 65 mdPtr(mdP), Offset(off), DL(dl), Order(O), Invalid(false) { 72 mdPtr(mdP), Offset(off), DL(dl), Order(O), Invalid(false) { 103 unsigned getOrder() { return Order; }
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/external/aac/libAACdec/src/ |
H A D | aacdec_tns.h | 113 UCHAR Order; member in struct:__anon24
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H A D | aacdec_tns.cpp | 176 filter->Order = order = (UCHAR) FDKreadBits(bs, isLongFlag ? 5 : 3); 179 if (filter->Order > TNS_MAXIMUM_ORDER){ 180 filter->Order = order = TNS_MAXIMUM_ORDER; 356 if (filter->Order > 0) 361 pCoeff = &coeff[filter->Order-1]; 365 for (i=0; i < filter->Order; i++) 371 for (i=0; i < filter->Order; i++) 404 filter->Order );
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/external/llvm/test/MC/COFF/ |
H A D | symbol-alias.s | 26 # Order is important here. Assign _bar_alias_alias before _bar_alias.
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/external/chromium_org/third_party/icu/source/test/intltest/ |
H A D | tscoll.h | 26 struct Order struct in class:IntlTestCollator 51 Order *getOrders(CollationElementIterator &iter, int32_t &orderLength);
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H A D | tscoll.cpp | 404 LocalArray<Order> orders(getOrders(iter, orderLength)); 497 IntlTestCollator::Order *IntlTestCollator::getOrders(CollationElementIterator &iter, int32_t &orderLength) 501 LocalArray<Order> orders(new Order[maxSize]); 511 Order *temp = new Order[maxSize]; 513 uprv_memcpy(temp, orders.getAlias(), size * sizeof(Order)); 526 Order *temp = new Order[size]; 528 uprv_memcpy(temp, orders.getAlias(), size * sizeof(Order)); [all...] |
/external/icu4c/test/intltest/ |
H A D | tscoll.h | 26 struct Order struct in class:IntlTestCollator 51 Order *getOrders(CollationElementIterator &iter, int32_t &orderLength);
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H A D | tscoll.cpp | 408 LocalArray<Order> orders(getOrders(iter, orderLength)); 501 IntlTestCollator::Order *IntlTestCollator::getOrders(CollationElementIterator &iter, int32_t &orderLength) 505 LocalArray<Order> orders(new Order[maxSize]); 515 Order *temp = new Order[maxSize]; 517 uprv_memcpy(temp, orders.getAlias(), size * sizeof(Order)); 530 Order *temp = new Order[size]; 532 uprv_memcpy(temp, orders.getAlias(), size * sizeof(Order)); [all...] |
/external/llvm/include/llvm/CodeGen/ |
H A D | RegisterClassInfo.h | 34 OwningArrayPtr<MCPhysReg> Order; member in struct:llvm::RegisterClassInfo::RCInfo 41 return makeArrayRef(Order.get(), NumRegs);
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H A D | SelectionDAGNodes.h | 428 void setIROrder(unsigned Order) { IROrder = Order; } argument 699 SDNode(unsigned Opc, unsigned Order, const DebugLoc dl, SDVTList VTs, 706 debugLoc(dl), IROrder(Order) { 716 SDNode(unsigned Opc, unsigned Order, const DebugLoc dl, SDVTList VTs) 720 debugLoc(dl), IROrder(Order) {} 812 SDLoc(const Instruction *I, int Order) : Ptr(I), IROrder(Order) { 813 assert(Order >= 0 && "bad IROrder"); 904 UnarySDNode(unsigned Opc, unsigned Order, DebugLo argument 915 BinarySDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs, SDValue X, SDValue Y) argument 926 TernarySDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs, SDValue X, SDValue Y, SDValue Z) argument 1093 AtomicSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTL, EVT MemVT, SDValue Chain, SDValue Ptr, SDValue Cmp, SDValue Swp, MachineMemOperand *MMO, AtomicOrdering Ordering, SynchronizationScope SynchScope) argument 1101 AtomicSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTL, EVT MemVT, SDValue Chain, SDValue Ptr, SDValue Val, MachineMemOperand *MMO, AtomicOrdering Ordering, SynchronizationScope SynchScope) argument 1109 AtomicSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTL, EVT MemVT, SDValue Chain, SDValue Ptr, MachineMemOperand *MMO, AtomicOrdering Ordering, SynchronizationScope SynchScope) argument 1151 MemIntrinsicSDNode(unsigned Opc, unsigned Order, DebugLoc dl, SDVTList VTs, const SDValue *Ops, unsigned NumOps, EVT MemoryVT, MachineMemOperand *MMO) argument 1184 ShuffleVectorSDNode(EVT VT, unsigned Order, DebugLoc dl, SDValue N1, SDValue N2, const int *M) argument 1556 EHLabelSDNode(unsigned Order, DebugLoc dl, SDValue ch, MCSymbol *L) argument 1609 CvtRndSatSDNode(EVT VT, unsigned Order, DebugLoc dl, const SDValue *Ops, unsigned NumOps, ISD::CvtCode Code) argument 1652 LSBaseSDNode(ISD::NodeType NodeTy, unsigned Order, DebugLoc dl, SDValue *Operands, unsigned numOperands, SDVTList VTs, ISD::MemIndexedMode AM, EVT MemVT, MachineMemOperand *MMO) argument 1689 LoadSDNode(SDValue *ChainPtrOff, unsigned Order, DebugLoc dl, SDVTList VTs, ISD::MemIndexedMode AM, ISD::LoadExtType ETy, EVT MemVT, MachineMemOperand *MMO) argument 1718 StoreSDNode(SDValue *ChainValuePtrOff, unsigned Order, DebugLoc dl, SDVTList VTs, ISD::MemIndexedMode AM, bool isTrunc, EVT MemVT, MachineMemOperand *MMO) argument 1754 MachineSDNode(unsigned Opc, unsigned Order, const DebugLoc DL, SDVTList VTs) argument [all...] |
/external/lzma/CPP/7zip/UI/Common/ |
H A D | ZipRegistry.h | 31 UInt32 Order;
member in struct:NCompression::CFormatOptions 42 BlockLogSize = NumThreads = Level = Dictionary = Order = UInt32(-1);
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/external/clang/test/CXX/temp/temp.decls/temp.variadic/ |
H A D | sizeofpack.cpp | 165 template <size_t Order, typename T> 168 template <size_t Order, typename MemoryTag> 169 using coords = typename coords_alias<Order, MemoryTag>::type;
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/external/lzma/CS/7zip/ |
H A D | ICoder.cs | 95 Order,
enumerator in enum:SevenZip.CoderPropID
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/external/chromium_org/tools/python/google/httpd_config/ |
H A D | httpd2_linux.conf | 80 Order allow,deny
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H A D | httpd2_mac.conf | 50 Order allow,deny 59 Order allow,deny 64 Order allow,deny
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H A D | httpd.conf | 348 Order allow,deny 370 Order allow,deny 380 Order allow,deny 386 Order allow,deny 690 # Order deny,allow
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