/external/llvm/lib/Target/Sparc/ |
H A D | SparcISelLowering.cpp | 182 SmallVector<CCValAssign, 16> RVLocs; local 186 DAG.getTarget(), RVLocs, *DAG.getContext()); 197 for (unsigned i = 0; i != RVLocs.size(); ++i) { 198 CCValAssign &VA = RVLocs[i]; 243 SmallVector<CCValAssign, 16> RVLocs; local 247 DAG.getTarget(), RVLocs, *DAG.getContext()); 260 for (unsigned i = 0; i != RVLocs.size(); ++i) { 261 CCValAssign &VA = RVLocs[i]; 287 if (i+1 < RVLocs.size() && RVLocs[ 894 SmallVector<CCValAssign, 16> RVLocs; local 1134 SmallVector<CCValAssign, 16> RVLocs; local [all...] |
/external/llvm/lib/Target/MSP430/ |
H A D | MSP430ISelLowering.cpp | 415 SmallVector<CCValAssign, 16> RVLocs; local 423 getTargetMachine(), RVLocs, *DAG.getContext()); 432 for (unsigned i = 0; i != RVLocs.size(); ++i) { 433 CCValAssign &VA = RVLocs[i]; 609 SmallVector<CCValAssign, 16> RVLocs; local 611 getTargetMachine(), RVLocs, *DAG.getContext()); 616 for (unsigned i = 0; i != RVLocs.size(); ++i) { 617 Chain = DAG.getCopyFromReg(Chain, dl, RVLocs[i].getLocReg(), 618 RVLocs[i].getValVT(), InFlag).getValue(1);
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/external/llvm/lib/Target/ARM/ |
H A D | ARMFastISel.cpp | 2055 SmallVector<CCValAssign, 16> RVLocs; local 2056 CCState CCInfo(CC, isVarArg, *FuncInfo.MF, TM, RVLocs, *Context); 2060 if (RVLocs.size() == 2 && RetVT == MVT::f64) { 2063 MVT DestVT = RVLocs[0].getValVT(); 2068 .addReg(RVLocs[0].getLocReg()) 2069 .addReg(RVLocs[1].getLocReg())); 2071 UsedRegs.push_back(RVLocs[0].getLocReg()); 2072 UsedRegs.push_back(RVLocs[1].getLocReg()); 2077 assert(RVLocs.size() == 1 &&"Can't handle non-double multi-reg retvals!"); 2078 MVT CopyVT = RVLocs[ 2219 SmallVector<CCValAssign, 16> RVLocs; local 2330 SmallVector<CCValAssign, 16> RVLocs; local [all...] |
H A D | ARMISelLowering.cpp | 1280 SmallVector<CCValAssign, 16> RVLocs; local 1282 getTargetMachine(), RVLocs, *DAG.getContext(), Call); 1288 for (unsigned i = 0; i != RVLocs.size(); ++i) { 1289 CCValAssign VA = RVLocs[i]; 1307 VA = RVLocs[++i]; // skip ahead to next loc 1319 VA = RVLocs[++i]; // skip ahead to next loc 1323 VA = RVLocs[++i]; // skip ahead to next loc 2058 SmallVector<CCValAssign, 16> RVLocs; local 2059 CCState CCInfo(CallConv, isVarArg, MF, getTargetMachine(), RVLocs, Context); 2072 SmallVector<CCValAssign, 16> RVLocs; local [all...] |
/external/llvm/lib/Target/XCore/ |
H A D | XCoreISelLowering.cpp | 1015 SmallVector<CCValAssign, 16> RVLocs; local 1017 getTargetMachine(), RVLocs, *DAG.getContext()); 1022 for (unsigned i = 0; i != RVLocs.size(); ++i) { 1023 Chain = DAG.getCopyFromReg(Chain, dl, RVLocs[i].getLocReg(), 1024 RVLocs[i].getValVT(), InFlag).getValue(1); 1237 SmallVector<CCValAssign, 16> RVLocs; local 1238 CCState CCInfo(CallConv, isVarArg, MF, getTargetMachine(), RVLocs, Context); 1251 SmallVector<CCValAssign, 16> RVLocs; local 1255 getTargetMachine(), RVLocs, *DAG.getContext()); 1267 for (unsigned i = 0; i != RVLocs [all...] |
/external/llvm/lib/Target/Hexagon/ |
H A D | HexagonISelLowering.cpp | 308 SmallVector<CCValAssign, 16> RVLocs; local 312 getTargetMachine(), RVLocs, *DAG.getContext()); 321 for (unsigned i = 0; i != RVLocs.size(); ++i) { 322 CCValAssign &VA = RVLocs[i]; 360 SmallVector<CCValAssign, 16> RVLocs; local 363 getTargetMachine(), RVLocs, *DAG.getContext()); 368 for (unsigned i = 0; i != RVLocs.size(); ++i) { 370 RVLocs[i].getLocReg(), 371 RVLocs[i].getValVT(), InFlag).getValue(1);
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/external/llvm/lib/Target/Mips/ |
H A D | MipsISelLowering.cpp | 2534 SmallVector<CCValAssign, 16> RVLocs; local 2536 getTargetMachine(), RVLocs, *DAG.getContext()); 2543 for (unsigned i = 0; i != RVLocs.size(); ++i) { 2544 SDValue Val = DAG.getCopyFromReg(Chain, DL, RVLocs[i].getLocReg(), 2545 RVLocs[i].getLocVT(), InFlag); 2549 if (RVLocs[i].getValVT() != RVLocs[i].getLocVT()) 2550 Val = DAG.getNode(ISD::BITCAST, DL, RVLocs[i].getValVT(), Val); 2723 SmallVector<CCValAssign, 16> RVLocs; local 2725 RVLocs, Contex 2737 SmallVector<CCValAssign, 16> RVLocs; local [all...] |
/external/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 2207 SmallVector<CCValAssign, 16> RVLocs; local 2208 CCState CCRetInfo(CC, false, *FuncInfo.MF, TM, RVLocs, 2212 for (unsigned i = 0; i != RVLocs.size(); ++i) { 2213 EVT CopyVT = RVLocs[i].getValVT(); 2219 if ((RVLocs[i].getLocReg() == X86::ST0 || 2220 RVLocs[i].getLocReg() == X86::ST1)) { 2221 if (isScalarFPTypeInSSEReg(RVLocs[i].getValVT())) { 2229 CopyReg).addReg(RVLocs[i].getLocReg()); 2230 UsedRegs.push_back(RVLocs[i].getLocReg()); 2233 if (CopyVT != RVLocs[ [all...] |
H A D | X86ISelLowering.cpp | 1764 SmallVector<CCValAssign, 16> RVLocs; local 1766 RVLocs, Context); 1779 SmallVector<CCValAssign, 16> RVLocs; local 1781 RVLocs, *DAG.getContext()); 1792 for (unsigned i = 0; i != RVLocs.size(); ++i) { 1793 CCValAssign &VA = RVLocs[i]; 1947 SmallVector<CCValAssign, 16> RVLocs; local 1950 getTargetMachine(), RVLocs, *DAG.getContext()); 1954 for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { 1955 CCValAssign &VA = RVLocs[ 3103 SmallVector<CCValAssign, 16> RVLocs; local [all...] |
/external/llvm/lib/Target/AArch64/ |
H A D | AArch64ISelLowering.cpp | 1067 SmallVector<CCValAssign, 16> RVLocs; local 1071 getTargetMachine(), RVLocs, *DAG.getContext()); 1079 for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { 1093 CCValAssign &VA = RVLocs[i]; 1405 SmallVector<CCValAssign, 16> RVLocs; local 1407 getTargetMachine(), RVLocs, *DAG.getContext()); 1410 for (unsigned i = 0; i != RVLocs.size(); ++i) { 1411 CCValAssign VA = RVLocs[i];
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/external/llvm/lib/Target/PowerPC/ |
H A D | PPCISelLowering.cpp | 3341 SmallVector<CCValAssign, 16> RVLocs; local 3343 getTargetMachine(), RVLocs, *DAG.getContext()); 3347 for (unsigned i = 0, e = RVLocs.size(); i != e; ++i) { 3348 CCValAssign &VA = RVLocs[i]; 4471 SmallVector<CCValAssign, 16> RVLocs; local 4473 RVLocs, Context); 4484 SmallVector<CCValAssign, 16> RVLocs; local 4486 getTargetMachine(), RVLocs, *DAG.getContext()); 4493 for (unsigned i = 0; i != RVLocs.size(); ++i) { 4494 CCValAssign &VA = RVLocs[ [all...] |