Searched refs:ShTy (Results 1 - 4 of 4) sorted by relevance
/external/llvm/lib/CodeGen/SelectionDAG/ |
H A D | LegalizeIntegerTypes.cpp | 1278 EVT ShTy = N->getOperand(1).getValueType(); local 1286 NVT, InL, DAG.getConstant(Amt-NVTBits, ShTy)); 1300 Lo = DAG.getNode(ISD::SHL, DL, NVT, InL, DAG.getConstant(Amt, ShTy)); 1303 DAG.getConstant(Amt, ShTy)), 1305 DAG.getConstant(NVTBits-Amt, ShTy))); 1316 NVT, InH, DAG.getConstant(Amt-NVTBits,ShTy)); 1324 DAG.getConstant(Amt, ShTy)), 1326 DAG.getConstant(NVTBits-Amt, ShTy))); 1327 Hi = DAG.getNode(ISD::SRL, DL, NVT, InH, DAG.getConstant(Amt, ShTy)); 1335 DAG.getConstant(NVTBits-1, ShTy)); 1363 EVT ShTy = Amt.getValueType(); local 1451 EVT ShTy = Amt.getValueType(); local [all...] |
H A D | TargetLowering.cpp | 624 EVT ShTy = getShiftAmountTy(InnerVT); local 625 if (!APInt(BitWidth, ShAmt).isIntN(ShTy.getSizeInBits())) 626 ShTy = InnerVT; 629 TLO.DAG.getConstant(ShAmt, ShTy));
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H A D | SelectionDAG.cpp | 1518 EVT ShTy = TM.getTargetLowering()->getShiftAmountTy(LHSTy); local 1519 if (OpTy == ShTy || OpTy.isVector()) return Op; 1521 ISD::NodeType Opcode = OpTy.bitsGT(ShTy) ? ISD::TRUNCATE : ISD::ZERO_EXTEND; 1522 return getNode(Opcode, SDLoc(Op), ShTy, Op);
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/external/llvm/lib/Target/ARM/AsmParser/ |
H A D | ARMAsmParser.cpp | 2259 static ARMOperand *CreateShiftedRegister(ARM_AM::ShiftOpc ShTy, argument 2265 Op->RegShiftedReg.ShiftTy = ShTy; 2274 static ARMOperand *CreateShiftedImmediate(ARM_AM::ShiftOpc ShTy, argument 2279 Op->RegShiftedImm.ShiftTy = ShTy;
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