Searched refs:ureg_writemask (Results 1 - 25 of 32) sorted by relevance

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/external/chromium_org/third_party/mesa/src/src/gallium/state_trackers/vega/
H A Dasm_fill.h55 ureg_MOV(ureg, ureg_writemask(temp[0], TGSI_WRITEMASK_XY), in[0]); \
57 ureg_writemask(temp[0], TGSI_WRITEMASK_Z), \
66 ureg_writemask(temp[4], TGSI_WRITEMASK_X), \
69 ureg_writemask(temp[4], TGSI_WRITEMASK_Y), \
152 ureg_writemask(temp[1], TGSI_WRITEMASK_X),
156 ureg_writemask(temp[1], TGSI_WRITEMASK_Y),
260 ureg_writemask(temp[1], TGSI_WRITEMASK_W),
264 ureg_writemask(temp[1], TGSI_WRITEMASK_XYZ),
270 ureg_writemask(temp[0], TGSI_WRITEMASK_W),
286 ureg_writemask(ureg_ds
[all...]
H A Drenderer.c212 ureg_DP4(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_X), src[0], constants[0]);
213 ureg_DP4(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_Y), src[0], constants[1]);
214 ureg_MOV(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_Z), src[0]);
215 ureg_DP4(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_W), src[0], constants[2]);
273 ureg_MOV(ureg, ureg_writemask(out, TGSI_WRITEMASK_Z), imm);
/external/mesa3d/src/gallium/state_trackers/vega/
H A Dasm_fill.h55 ureg_MOV(ureg, ureg_writemask(temp[0], TGSI_WRITEMASK_XY), in[0]); \
57 ureg_writemask(temp[0], TGSI_WRITEMASK_Z), \
66 ureg_writemask(temp[4], TGSI_WRITEMASK_X), \
69 ureg_writemask(temp[4], TGSI_WRITEMASK_Y), \
152 ureg_writemask(temp[1], TGSI_WRITEMASK_X),
156 ureg_writemask(temp[1], TGSI_WRITEMASK_Y),
260 ureg_writemask(temp[1], TGSI_WRITEMASK_W),
264 ureg_writemask(temp[1], TGSI_WRITEMASK_XYZ),
270 ureg_writemask(temp[0], TGSI_WRITEMASK_W),
286 ureg_writemask(ureg_ds
[all...]
/external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/vl/
H A Dvl_mc.c73 ureg_ADD(shader, ureg_writemask(t_vpos, TGSI_WRITEMASK_XY), vpos, vrect);
74 ureg_MUL(shader, ureg_writemask(t_vpos, TGSI_WRITEMASK_XY), ureg_src(t_vpos), block_scale);
75 ureg_MOV(shader, ureg_writemask(o_vpos, TGSI_WRITEMASK_XY), ureg_src(t_vpos));
76 ureg_MOV(shader, ureg_writemask(o_vpos, TGSI_WRITEMASK_ZW), ureg_imm1f(shader, 1.0f));
94 ureg_MUL(shader, ureg_writemask(tmp, TGSI_WRITEMASK_Y), pos, ureg_imm1f(shader, 0.5f));
95 ureg_FRC(shader, ureg_writemask(tmp, TGSI_WRITEMASK_Y), ureg_src(tmp));
96 ureg_SGE(shader, ureg_writemask(tmp, TGSI_WRITEMASK_Y), ureg_src(tmp), ureg_imm1f(shader, 0.5f));
144 ureg_MAD(shader, ureg_writemask(o_vmv[i], TGSI_WRITEMASK_XY), mv_scale, vmv[i], ureg_src(t_vpos));
145 ureg_MUL(shader, ureg_writemask(o_vmv[i], TGSI_WRITEMASK_ZW), mv_scale, vmv[i]);
194 ureg_CMP(shader, ureg_writemask(re
[all...]
H A Dvl_idct.c88 ureg_MOV(shader, ureg_writemask(addr[0], wm_start), ureg_scalar(start, sw_start));
89 ureg_MOV(shader, ureg_writemask(addr[0], wm_tc), ureg_scalar(tc, sw_tc));
91 ureg_ADD(shader, ureg_writemask(addr[1], wm_start), ureg_scalar(start, sw_start), ureg_imm1f(shader, 1.0f / size));
92 ureg_MOV(shader, ureg_writemask(addr[1], wm_tc), ureg_scalar(tc, sw_tc));
108 ureg_MOV(shader, ureg_writemask(daddr[0], wm_start), saddr[0]);
109 ureg_ADD(shader, ureg_writemask(daddr[0], wm_tc), saddr[0], ureg_imm1f(shader, pos / size));
110 ureg_MOV(shader, ureg_writemask(daddr[1], wm_start), saddr[1]);
111 ureg_ADD(shader, ureg_writemask(daddr[1], wm_tc), saddr[1], ureg_imm1f(shader, pos / size));
133 ureg_DP4(shader, ureg_writemask(tmp, TGSI_WRITEMASK_X), ureg_src(l[0]), ureg_src(r[0]));
134 ureg_DP4(shader, ureg_writemask(tm
[all...]
H A Dvl_zscan.c138 ureg_ADD(shader, ureg_writemask(tmp, TGSI_WRITEMASK_XY), vpos, vrect);
139 ureg_MUL(shader, ureg_writemask(o_vpos, TGSI_WRITEMASK_XY), ureg_src(tmp), scale);
140 ureg_MOV(shader, ureg_writemask(o_vpos, TGSI_WRITEMASK_ZW), ureg_imm1f(shader, 1.0f));
142 ureg_MUL(shader, ureg_writemask(tmp, TGSI_WRITEMASK_XW), ureg_scalar(block_num, TGSI_SWIZZLE_X),
145 ureg_FRC(shader, ureg_writemask(tmp, TGSI_WRITEMASK_Y), ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_X));
146 ureg_FLR(shader, ureg_writemask(tmp, TGSI_WRITEMASK_W), ureg_src(tmp));
149 ureg_ADD(shader, ureg_writemask(tmp, TGSI_WRITEMASK_X), ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_Y),
153 ureg_MAD(shader, ureg_writemask(o_vtex[i], TGSI_WRITEMASK_X), vrect,
155 ureg_MOV(shader, ureg_writemask(o_vtex[i], TGSI_WRITEMASK_Y), vrect);
156 ureg_MOV(shader, ureg_writemask(o_vte
[all...]
H A Dvl_compositor.c101 ureg_MUL(shader, ureg_writemask(tmp, TGSI_WRITEMASK_X),
103 ureg_MUL(shader, ureg_writemask(tmp, TGSI_WRITEMASK_Y),
106 ureg_MOV(shader, ureg_writemask(o_vtop, TGSI_WRITEMASK_X), vtex);
107 ureg_MAD(shader, ureg_writemask(o_vtop, TGSI_WRITEMASK_Y), ureg_scalar(vtex, TGSI_SWIZZLE_Y),
109 ureg_MAD(shader, ureg_writemask(o_vtop, TGSI_WRITEMASK_Z), ureg_scalar(vtex, TGSI_SWIZZLE_Y),
111 ureg_RCP(shader, ureg_writemask(o_vtop, TGSI_WRITEMASK_W),
114 ureg_MOV(shader, ureg_writemask(o_vbottom, TGSI_WRITEMASK_X), vtex);
115 ureg_MAD(shader, ureg_writemask(o_vbottom, TGSI_WRITEMASK_Y), ureg_scalar(vtex, TGSI_SWIZZLE_Y),
117 ureg_MAD(shader, ureg_writemask(o_vbottom, TGSI_WRITEMASK_Z), ureg_scalar(vtex, TGSI_SWIZZLE_Y),
119 ureg_RCP(shader, ureg_writemask(o_vbotto
[all...]
H A Dvl_matrix_filter.c113 ureg_ADD(shader, ureg_writemask(t_array[i], TGSI_WRITEMASK_XY),
115 ureg_MOV(shader, ureg_writemask(t_array[i], TGSI_WRITEMASK_ZW),
H A Dvl_median_filter.c123 ureg_ADD(shader, ureg_writemask(t_array[i], TGSI_WRITEMASK_XY),
125 ureg_MOV(shader, ureg_writemask(t_array[i], TGSI_WRITEMASK_ZW),
/external/mesa3d/src/gallium/auxiliary/vl/
H A Dvl_mc.c73 ureg_ADD(shader, ureg_writemask(t_vpos, TGSI_WRITEMASK_XY), vpos, vrect);
74 ureg_MUL(shader, ureg_writemask(t_vpos, TGSI_WRITEMASK_XY), ureg_src(t_vpos), block_scale);
75 ureg_MOV(shader, ureg_writemask(o_vpos, TGSI_WRITEMASK_XY), ureg_src(t_vpos));
76 ureg_MOV(shader, ureg_writemask(o_vpos, TGSI_WRITEMASK_ZW), ureg_imm1f(shader, 1.0f));
94 ureg_MUL(shader, ureg_writemask(tmp, TGSI_WRITEMASK_Y), pos, ureg_imm1f(shader, 0.5f));
95 ureg_FRC(shader, ureg_writemask(tmp, TGSI_WRITEMASK_Y), ureg_src(tmp));
96 ureg_SGE(shader, ureg_writemask(tmp, TGSI_WRITEMASK_Y), ureg_src(tmp), ureg_imm1f(shader, 0.5f));
144 ureg_MAD(shader, ureg_writemask(o_vmv[i], TGSI_WRITEMASK_XY), mv_scale, vmv[i], ureg_src(t_vpos));
145 ureg_MUL(shader, ureg_writemask(o_vmv[i], TGSI_WRITEMASK_ZW), mv_scale, vmv[i]);
194 ureg_CMP(shader, ureg_writemask(re
[all...]
H A Dvl_idct.c88 ureg_MOV(shader, ureg_writemask(addr[0], wm_start), ureg_scalar(start, sw_start));
89 ureg_MOV(shader, ureg_writemask(addr[0], wm_tc), ureg_scalar(tc, sw_tc));
91 ureg_ADD(shader, ureg_writemask(addr[1], wm_start), ureg_scalar(start, sw_start), ureg_imm1f(shader, 1.0f / size));
92 ureg_MOV(shader, ureg_writemask(addr[1], wm_tc), ureg_scalar(tc, sw_tc));
108 ureg_MOV(shader, ureg_writemask(daddr[0], wm_start), saddr[0]);
109 ureg_ADD(shader, ureg_writemask(daddr[0], wm_tc), saddr[0], ureg_imm1f(shader, pos / size));
110 ureg_MOV(shader, ureg_writemask(daddr[1], wm_start), saddr[1]);
111 ureg_ADD(shader, ureg_writemask(daddr[1], wm_tc), saddr[1], ureg_imm1f(shader, pos / size));
133 ureg_DP4(shader, ureg_writemask(tmp, TGSI_WRITEMASK_X), ureg_src(l[0]), ureg_src(r[0]));
134 ureg_DP4(shader, ureg_writemask(tm
[all...]
H A Dvl_zscan.c138 ureg_ADD(shader, ureg_writemask(tmp, TGSI_WRITEMASK_XY), vpos, vrect);
139 ureg_MUL(shader, ureg_writemask(o_vpos, TGSI_WRITEMASK_XY), ureg_src(tmp), scale);
140 ureg_MOV(shader, ureg_writemask(o_vpos, TGSI_WRITEMASK_ZW), ureg_imm1f(shader, 1.0f));
142 ureg_MUL(shader, ureg_writemask(tmp, TGSI_WRITEMASK_XW), ureg_scalar(block_num, TGSI_SWIZZLE_X),
145 ureg_FRC(shader, ureg_writemask(tmp, TGSI_WRITEMASK_Y), ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_X));
146 ureg_FLR(shader, ureg_writemask(tmp, TGSI_WRITEMASK_W), ureg_src(tmp));
149 ureg_ADD(shader, ureg_writemask(tmp, TGSI_WRITEMASK_X), ureg_scalar(ureg_src(tmp), TGSI_SWIZZLE_Y),
153 ureg_MAD(shader, ureg_writemask(o_vtex[i], TGSI_WRITEMASK_X), vrect,
155 ureg_MOV(shader, ureg_writemask(o_vtex[i], TGSI_WRITEMASK_Y), vrect);
156 ureg_MOV(shader, ureg_writemask(o_vte
[all...]
H A Dvl_compositor.c101 ureg_MUL(shader, ureg_writemask(tmp, TGSI_WRITEMASK_X),
103 ureg_MUL(shader, ureg_writemask(tmp, TGSI_WRITEMASK_Y),
106 ureg_MOV(shader, ureg_writemask(o_vtop, TGSI_WRITEMASK_X), vtex);
107 ureg_MAD(shader, ureg_writemask(o_vtop, TGSI_WRITEMASK_Y), ureg_scalar(vtex, TGSI_SWIZZLE_Y),
109 ureg_MAD(shader, ureg_writemask(o_vtop, TGSI_WRITEMASK_Z), ureg_scalar(vtex, TGSI_SWIZZLE_Y),
111 ureg_RCP(shader, ureg_writemask(o_vtop, TGSI_WRITEMASK_W),
114 ureg_MOV(shader, ureg_writemask(o_vbottom, TGSI_WRITEMASK_X), vtex);
115 ureg_MAD(shader, ureg_writemask(o_vbottom, TGSI_WRITEMASK_Y), ureg_scalar(vtex, TGSI_SWIZZLE_Y),
117 ureg_MAD(shader, ureg_writemask(o_vbottom, TGSI_WRITEMASK_Z), ureg_scalar(vtex, TGSI_SWIZZLE_Y),
119 ureg_RCP(shader, ureg_writemask(o_vbotto
[all...]
H A Dvl_matrix_filter.c113 ureg_ADD(shader, ureg_writemask(t_array[i], TGSI_WRITEMASK_XY),
115 ureg_MOV(shader, ureg_writemask(t_array[i], TGSI_WRITEMASK_ZW),
H A Dvl_median_filter.c123 ureg_ADD(shader, ureg_writemask(t_array[i], TGSI_WRITEMASK_XY),
125 ureg_MOV(shader, ureg_writemask(t_array[i], TGSI_WRITEMASK_ZW),
/external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/util/
H A Du_simple_shaders.c148 ureg_writemask(out, writemask),
210 ureg_writemask(depth, TGSI_WRITEMASK_Z),
261 ureg_writemask(depth, TGSI_WRITEMASK_Z),
264 ureg_writemask(stencil, TGSI_WRITEMASK_Y),
310 ureg_writemask(stencil, TGSI_WRITEMASK_Y),
/external/mesa3d/src/gallium/auxiliary/util/
H A Du_simple_shaders.c148 ureg_writemask(out, writemask),
210 ureg_writemask(depth, TGSI_WRITEMASK_Z),
261 ureg_writemask(depth, TGSI_WRITEMASK_Z),
264 ureg_writemask(stencil, TGSI_WRITEMASK_Y),
310 ureg_writemask(stencil, TGSI_WRITEMASK_Y),
/external/chromium_org/third_party/mesa/src/src/gallium/state_trackers/xorg/
H A Dxorg_exa_tgsi.c138 ureg_writemask(temp0, TGSI_WRITEMASK_XY), pos);
140 ureg_writemask(temp0, TGSI_WRITEMASK_Z),
150 ureg_MOV(ureg, ureg_writemask(temp4, TGSI_WRITEMASK_X),
152 ureg_MOV(ureg, ureg_writemask(temp4, TGSI_WRITEMASK_Y),
198 ureg_writemask(temp0, TGSI_WRITEMASK_XY),
201 ureg_writemask(temp0, TGSI_WRITEMASK_Z),
211 ureg_MOV(ureg, ureg_writemask(temp5, TGSI_WRITEMASK_X),
213 ureg_MOV(ureg, ureg_writemask(temp5, TGSI_WRITEMASK_Y),
376 ureg_MOV(ureg, ureg_writemask(rgb, TGSI_WRITEMASK_W),
429 ureg_writemask(tmp
[all...]
/external/mesa3d/src/gallium/state_trackers/xorg/
H A Dxorg_exa_tgsi.c138 ureg_writemask(temp0, TGSI_WRITEMASK_XY), pos);
140 ureg_writemask(temp0, TGSI_WRITEMASK_Z),
150 ureg_MOV(ureg, ureg_writemask(temp4, TGSI_WRITEMASK_X),
152 ureg_MOV(ureg, ureg_writemask(temp4, TGSI_WRITEMASK_Y),
198 ureg_writemask(temp0, TGSI_WRITEMASK_XY),
201 ureg_writemask(temp0, TGSI_WRITEMASK_Z),
211 ureg_MOV(ureg, ureg_writemask(temp5, TGSI_WRITEMASK_X),
213 ureg_MOV(ureg, ureg_writemask(temp5, TGSI_WRITEMASK_Y),
376 ureg_MOV(ureg, ureg_writemask(rgb, TGSI_WRITEMASK_W),
429 ureg_writemask(tmp
[all...]
/external/chromium_org/third_party/mesa/src/src/gallium/state_trackers/xa/
H A Dxa_tgsi.c159 ureg_MOV(ureg, ureg_writemask(temp0, TGSI_WRITEMASK_XY), pos);
161 ureg_writemask(temp0, TGSI_WRITEMASK_Z),
171 ureg_MOV(ureg, ureg_writemask(temp4, TGSI_WRITEMASK_X), ureg_src(temp1));
172 ureg_MOV(ureg, ureg_writemask(temp4, TGSI_WRITEMASK_Y), ureg_src(temp2));
210 ureg_MOV(ureg, ureg_writemask(temp0, TGSI_WRITEMASK_XY), pos);
212 ureg_writemask(temp0, TGSI_WRITEMASK_Z),
222 ureg_MOV(ureg, ureg_writemask(temp5, TGSI_WRITEMASK_X), ureg_src(temp1));
223 ureg_MOV(ureg, ureg_writemask(temp5, TGSI_WRITEMASK_Y), ureg_src(temp2));
404 ureg_writemask(tmp1, TGSI_WRITEMASK_W),
424 ureg_writemask(ds
[all...]
/external/mesa3d/src/gallium/state_trackers/xa/
H A Dxa_tgsi.c159 ureg_MOV(ureg, ureg_writemask(temp0, TGSI_WRITEMASK_XY), pos);
161 ureg_writemask(temp0, TGSI_WRITEMASK_Z),
171 ureg_MOV(ureg, ureg_writemask(temp4, TGSI_WRITEMASK_X), ureg_src(temp1));
172 ureg_MOV(ureg, ureg_writemask(temp4, TGSI_WRITEMASK_Y), ureg_src(temp2));
210 ureg_MOV(ureg, ureg_writemask(temp0, TGSI_WRITEMASK_XY), pos);
212 ureg_writemask(temp0, TGSI_WRITEMASK_Z),
222 ureg_MOV(ureg, ureg_writemask(temp5, TGSI_WRITEMASK_X), ureg_src(temp1));
223 ureg_MOV(ureg, ureg_writemask(temp5, TGSI_WRITEMASK_Y), ureg_src(temp2));
404 ureg_writemask(tmp1, TGSI_WRITEMASK_W),
424 ureg_writemask(ds
[all...]
/external/chromium_org/third_party/mesa/src/src/mesa/state_tracker/
H A Dst_mesa_to_tgsi.c301 dst = ureg_writemask( dst,
727 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY );
735 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XYZ );
833 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
841 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
1089 t->outputs[i] = ureg_writemask( t->outputs[i],
1096 t->outputs[i] = ureg_writemask( t->outputs[i],
1171 ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), t->systemValues[i]);
/external/mesa3d/src/mesa/state_tracker/
H A Dst_mesa_to_tgsi.c301 dst = ureg_writemask( dst,
727 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XY );
735 dst[0] = ureg_writemask(dst[0], TGSI_WRITEMASK_XYZ );
833 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
841 ureg_writemask(wpos_temp, TGSI_WRITEMASK_Y ),
1089 t->outputs[i] = ureg_writemask( t->outputs[i],
1096 t->outputs[i] = ureg_writemask( t->outputs[i],
1171 ureg_U2F( t->ureg, ureg_writemask(temp, TGSI_WRITEMASK_X), t->systemValues[i]);
/external/chromium_org/third_party/mesa/src/src/gallium/state_trackers/d3d1x/gd3d1x/
H A Dsm4_to_tgsi.cpp132 struct ureg_dst d = ureg_writemask(_reg(op), op.mask);
233 return ureg_writemask(_tmp(), d.WriteMask);
476 ureg_MOV(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), _src(1));
477 ureg_MOV(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_W), ureg_swizzle(_src(4), 0, 0, 0, 0));
/external/mesa3d/src/gallium/state_trackers/d3d1x/gd3d1x/
H A Dsm4_to_tgsi.cpp132 struct ureg_dst d = ureg_writemask(_reg(op), op.mask);
233 return ureg_writemask(_tmp(), d.WriteMask);
476 ureg_MOV(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_XYZ), _src(1));
477 ureg_MOV(ureg, ureg_writemask(tmp, TGSI_WRITEMASK_W), ureg_swizzle(_src(4), 0, 0, 0, 0));

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