Searched refs:value (Results 1 - 25 of 97) sorted by path

1234

/art/compiler/dex/
H A Dlocal_value_numbering.h27 // Key is s_reg, value is value name.
29 // Key is concatenation of quad, value is value name.
31 // Key represents a memory address, value is generation.
85 void SetOperandValue(uint16_t s_reg, uint16_t value) { argument
88 DCHECK_EQ(it->second, value);
90 sreg_value_map_.Put(s_reg, value);
107 void SetOperandValueWide(uint16_t s_reg, uint16_t value) { argument
110 DCHECK_EQ(it->second, value);
[all...]
H A Dmir_graph.h286 * blocks, key is the case value.
297 * value is located (i.e. - physical register, frame, spill, etc.). For each SSA name (SReg)
306 unsigned is_const:1; // Constant, value in mir_graph->constant_values[].
659 void SetConstant(int32_t ssa_reg, int value);
660 void SetConstantWide(int ssa_reg, int64_t value);
H A Dmir_optimization.cc27 /* Setup a constant value for opcodes thare have the DF_SETS_CONST attribute */
28 void MIRGraph::SetConstant(int32_t ssa_reg, int value) { argument
30 constant_values_[ssa_reg] = value;
33 void MIRGraph::SetConstantWide(int ssa_reg, int64_t value) { argument
35 constant_values_[ssa_reg] = Low32Bits(value);
36 constant_values_[ssa_reg + 1] = High32Bits(value);
220 // TUNING: use the returned value number for CSE.
853 return false; // Not iterative - return value will be ignored
/art/compiler/dex/portable/
H A Dmir_to_gbc.cc63 // Replace the placeholder value with the real definition
132 ::llvm::Value* value = GetLLVMValue(rl_src.orig_sreg); local
135 irb_->CreateSwitch(value, GetLLVMBlock(bb->fall_through->id),
159 ::llvm::Value* value = GetLLVMValue(rl_src.orig_sreg); local
162 irb_->CreateSwitch(value, GetLLVMBlock(bb->fall_through->id),
307 default: LOG(FATAL) << "Unexpected cc value " << cc;
468 * be different than shorty. For example, if a function return value
1683 // to store the value, so we have to increase arg_reg again.
1867 * o For each ssa name, create LLVM named value. Type these
1886 * Create an llvm named value fo
[all...]
/art/compiler/dex/quick/arm/
H A Dassemble_arm.cc1283 uint32_t value; local
1289 value = ((operand & 0xF0) >> 4) << encoder->field_loc[i].end;
1290 value |= (operand & 0x0F) << encoder->field_loc[i].start;
1291 bits |= value;
1294 value = ((operand & 0x80000) >> 19) << 26;
1295 value |= ((operand & 0x40000) >> 18) << 11;
1296 value |= ((operand & 0x20000) >> 17) << 13;
1297 value |= ((operand & 0x1f800) >> 11) << 16;
1298 value |= (operand & 0x007ff);
1299 bits |= value;
[all...]
H A Dcodegen_arm.h38 LIR* LoadConstantNoClobber(int r_dest, int value);
39 LIR* LoadConstantWide(int r_dest_lo, int r_dest_hi, int64_t value);
150 LIR* OpRegImm(OpKind op, int r_dest_src1, int value);
153 LIR* OpRegRegImm(OpKind op, int r_dest, int r_src1, int value);
172 int ModifiedImmediate(uint32_t value);
174 bool InexpensiveConstantInt(int32_t value);
175 bool InexpensiveConstantFloat(int32_t value);
176 bool InexpensiveConstantLong(int64_t value);
177 bool InexpensiveConstantDouble(int64_t value);
189 LIR* LoadFPConstantValue(int r_dest, int value);
[all...]
H A Dtarget_arm.cc280 static int ExpandImmediate(int value) { argument
281 int mode = (value & 0xf00) >> 8;
282 uint32_t bits = value & 0xff;
296 return bits >> (((value & 0xf80) >> 7) - 8);
H A Dutility_arm.cc25 static int EncodeImmSingle(int value) { argument
27 int bit_a = (value & 0x80000000) >> 31;
28 int not_bit_b = (value & 0x40000000) >> 30;
29 int bit_b = (value & 0x20000000) >> 29;
30 int b_smear = (value & 0x3e000000) >> 25;
31 int slice = (value & 0x01f80000) >> 19;
32 int zeroes = (value & 0x0007ffff);
47 * Determine whether value can be encoded as a Thumb2 floating point
48 * immediate. If not, return -1. If so return encoded 8-bit value.
50 static int EncodeImmDouble(int64_t value) { argument
71 LoadFPConstantValue(int r_dest, int value) argument
120 ModifiedImmediate(uint32_t value) argument
149 InexpensiveConstantInt(int32_t value) argument
153 InexpensiveConstantFloat(int32_t value) argument
157 InexpensiveConstantLong(int64_t value) argument
161 InexpensiveConstantDouble(int64_t value) argument
173 LoadConstantNoClobber(int r_dest, int value) argument
422 OpRegRegImm(OpKind op, int r_dest, int r_src1, int value) argument
546 OpRegImm(OpKind op, int r_dest_src1, int value) argument
590 LoadConstantWide(int r_dest_lo, int r_dest_hi, int64_t value) argument
[all...]
/art/compiler/dex/quick/
H A Dcodegen_util.cc286 LIR* Mir2Lir::ScanLiteralPool(LIR* data_target, int value, unsigned int delta) { argument
288 if ((static_cast<unsigned>(value - data_target->operands[0])) <= delta)
321 LIR* Mir2Lir::AddWordData(LIR* *constant_list_p, int value) { argument
325 new_value->operands[0] = value;
846 * ushort ident = 0x0200 magic value
867 * ushort ident = 0x0100 magic value
869 * int first_key first (and lowest) switch case value
H A Dgen_loadstore.cc27 * Load an immediate value into a fixed or temp register. Target
30 LIR* Mir2Lir::LoadConstant(int r_dest, int value) { argument
35 return LoadConstantNoClobber(r_dest, value);
H A Dmir_to_lir.h195 * native register (pair). The idea is to reuse the previously loaded value
196 * if possible, otherwise to keep the value in a native register as long as
207 int s_reg; // Name of live value.
270 LIR* ScanLiteralPool(LIR* data_target, int value, unsigned int delta);
272 LIR* AddWordData(LIR* *constant_list_p, int value);
506 LIR* LoadConstant(int r_dest, int value);
537 virtual LIR* LoadConstantNoClobber(int r_dest, int value) = 0;
538 virtual LIR* LoadConstantWide(int r_dest_lo, int r_dest_hi, int64_t value) = 0;
671 virtual LIR* OpRegImm(OpKind op, int r_dest_src1, int value) = 0;
674 virtual LIR* OpRegRegImm(OpKind op, int r_dest, int r_src1, int value)
[all...]
/art/compiler/dex/quick/mips/
H A Dassemble_mips.cc654 uint32_t value; local
661 value = operand;
663 value = (operand << encoder->field_loc[i].start) &
666 bits |= value;
669 value = (operand & 0x1f);
670 bits |= (value << encoder->field_loc[i].start);
671 bits |= (value << encoder->field_loc[i].end);
676 value = ((operand & MIPS_FP_REG_MASK) << encoder->field_loc[i].start) &
678 bits |= value;
683 value
[all...]
H A Dcodegen_mips.h39 LIR* LoadConstantNoClobber(int r_dest, int value);
40 LIR* LoadConstantWide(int r_dest_lo, int r_dest_hi, int64_t value);
151 LIR* OpRegImm(OpKind op, int r_dest_src1, int value);
154 LIR* OpRegRegImm(OpKind op, int r_dest, int r_src1, int value);
170 bool InexpensiveConstantInt(int32_t value);
171 bool InexpensiveConstantFloat(int32_t value);
172 bool InexpensiveConstantLong(int64_t value);
173 bool InexpensiveConstantDouble(int64_t value);
H A Dutility_mips.cc53 bool MipsMir2Lir::InexpensiveConstantInt(int32_t value) { argument
54 return ((value == 0) || IsUint(16, value) || ((value < 0) && (value >= -32768)));
57 bool MipsMir2Lir::InexpensiveConstantFloat(int32_t value) { argument
61 bool MipsMir2Lir::InexpensiveConstantLong(int64_t value) { argument
65 bool MipsMir2Lir::InexpensiveConstantDouble(int64_t value) { argument
78 LIR* MipsMir2Lir::LoadConstantNoClobber(int r_dest, int value) { argument
88 /* See if the value ca
130 OpRegImm(OpKind op, int r_dest_src1, int value) argument
202 OpRegRegImm(OpKind op, int r_dest, int r_src1, int value) argument
328 LoadConstantWide(int r_dest_lo, int r_dest_hi, int64_t value) argument
[all...]
/art/compiler/dex/quick/x86/
H A Dcodegen_x86.h39 LIR* LoadConstantNoClobber(int r_dest, int value);
40 LIR* LoadConstantWide(int r_dest_lo, int r_dest_hi, int64_t value);
151 LIR* OpRegImm(OpKind op, int r_dest_src1, int value);
154 LIR* OpRegRegImm(OpKind op, int r_dest, int r_src1, int value);
168 bool InexpensiveConstantInt(int32_t value);
169 bool InexpensiveConstantFloat(int32_t value);
170 bool InexpensiveConstantLong(int64_t value);
171 bool InexpensiveConstantDouble(int64_t value);
H A Dutility_x86.cc51 bool X86Mir2Lir::InexpensiveConstantInt(int32_t value) { argument
55 bool X86Mir2Lir::InexpensiveConstantFloat(int32_t value) { argument
59 bool X86Mir2Lir::InexpensiveConstantLong(int64_t value) { argument
63 bool X86Mir2Lir::InexpensiveConstantDouble(int64_t value) { argument
76 LIR* X86Mir2Lir::LoadConstantNoClobber(int r_dest, int value) { argument
79 if (value == 0) {
87 if (value == 0) {
91 res = NewLIR2(kX86Mov32RI, r_dest, value);
127 LIR* X86Mir2Lir::OpRegImm(OpKind op, int r_dest_src1, int value) { argument
129 bool byte_imm = IS_SIMM8(value);
269 OpRegRegImm(OpKind op, int r_dest, int r_src, int value) argument
317 LoadConstantWide(int r_dest_lo, int r_dest_hi, int64_t value) argument
[all...]
/art/compiler/
H A Delf_writer_test.cc32 #define EXPECT_ELF_FILE_ADDRESS(ef, value, name, build_map) \
33 EXPECT_EQ(value, reinterpret_cast<void*>(ef->FindSymbolAddress(::llvm::ELF::SHT_DYNSYM, name, build_map))); \
34 EXPECT_EQ(value, ef->FindDynamicSymbolAddress(name)); \
H A Dimage_writer.cc517 // OatWriter replaces the code_ with an offset value. Here we re-adjust to a pointer relative to
699 void ImageWriter::SetPatchLocation(const CompilerDriver::PatchInformation* patch, uint32_t value) { argument
712 CHECK(actual == expected || actual == value) << std::hex
715 << "value=" << value; local
717 *patch_location = value;
718 oat_header.UpdateChecksum(patch_location, sizeof(value));
H A Dimage_writer.h176 void SetPatchLocation(const CompilerDriver::PatchInformation* patch, uint32_t value)
H A Dleb128_encoder.h30 void PushBack(uint32_t value) { argument
33 uint8_t out = value & 0x7f;
34 if (out != value) {
36 value >>= 7;
/art/compiler/llvm/
H A Dgbc_expander.cc192 llvm::Value* SignOrZeroExtendCat1Types(llvm::Value* value, JType jty);
195 llvm::Value* TruncateCat1Types(llvm::Value* value, JType jty);
365 void EmitMarkGCCard(llvm::Value* value, llvm::Value* target_addr);
577 // Insert all incoming value into new_phi by rewrite_pair
583 // Delete all incoming value from phi by rewrite_pair
704 // The return value is ignored when there's an exception. MethodCompiler
705 // returns zero value under the the corresponding return type in this case.
706 // GBCExpander returns LLVM undef value here for brevity
1004 // The return value is ignored when there's an exception.
1372 llvm::Value* value) {
1371 Expand_SetVReg(llvm::Value* entry_idx, llvm::Value* value) argument
1528 SignOrZeroExtendCat1Types(llvm::Value* value, JType jty) argument
1549 TruncateCat1Types(llvm::Value* value, JType jty) argument
2549 EmitMarkGCCard(llvm::Value* value, llvm::Value* target_addr) argument
[all...]
H A Druntime_support_builder.cc71 void RuntimeSupportBuilder::EmitStoreToThreadOffset(int64_t offset, ::llvm::Value* value, argument
74 irb_.StoreToObjectOffset(thread, offset, value, s_ty);
253 void RuntimeSupportBuilder::EmitMarkGCCard(::llvm::Value* value, ::llvm::Value* target_addr) { argument
258 ::llvm::Value* not_null = irb_.CreateIsNotNull(value);
H A Druntime_support_builder.h48 virtual void EmitStoreToThreadOffset(int64_t offset, ::llvm::Value* value,
71 virtual void EmitMarkGCCard(::llvm::Value* value, ::llvm::Value* target_addr);
H A Druntime_support_builder_arm.cc85 void RuntimeSupportBuilderARM::EmitStoreToThreadOffset(int64_t offset, Value* value, argument
88 /*Params=*/value->getType(),
91 LDRSTRSuffixByType(irb_, value->getType()),
94 CallInst* call_inst = irb_.CreateCall(func, value);
99 // Separate to two InlineAsm: The first one produces the return value, while the second,
101 // LLVM can delete the first one if the caller in LLVM IR doesn't use the return value.
H A Druntime_support_builder_arm.h34 virtual void EmitStoreToThreadOffset(int64_t offset, ::llvm::Value* value,

Completed in 8326 milliseconds

1234