| /external/llvm/lib/Target/MSP430/ |
| H A D | MSP430ISelLowering.h | 64 /// SHL, SRA, SRL - Non-constant shifts.
65 SHL, SRA, SRL enumerator in enum:llvm::MSP430ISD::__anon21415
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| /external/libffi/src/mips/ |
| H A D | ffitarget.h | 128 # define SRL srl macro
135 # define SRL dsrl
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| /external/llvm/lib/Target/PowerPC/ |
| H A D | PPCISelLowering.h | 101 SRL, SRA, SHL, enumerator in enum:llvm::PPCISD::NodeType
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| /external/llvm/include/llvm/CodeGen/ |
| H A D | ISDOpcodes.h | 306 SHL, SRA, SRL, ROTL, ROTR, enumerator in enum:llvm::ISD::NodeType
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| /external/llvm/include/llvm/TableGen/ |
| H A D | Record.h | 930 enum BinaryOp { ADD, SHL, SRA, SRL, STRCONCAT, CONCAT, EQ }; enumerator in enum:llvm::BinOpInit::BinaryOp
|
| /external/llvm/lib/Target/Mips/ |
| H A D | MipsISelLowering.cpp | 576 if (ShiftRightOpc != ISD::SRA && ShiftRightOpc != ISD::SRL)
1686 SDValue SrlX = DAG.getNode(ISD::SRL, DL, MVT::i32, SllX, Const1);
1687 SDValue SrlY = DAG.getNode(ISD::SRL, DL, MVT::i32, Y, Const31);
1733 SDValue SrlX = DAG.getNode(ISD::SRL, DL, TyX, SllX, Const1);
1734 SDValue SrlY = DAG.getNode(ISD::SRL, DL, TyY, Y,
1774 Res = DAG.getNode(ISD::SRL, DL, MVT::i32, SllX, Const1);
1799 Res = DAG.getNode(ISD::SRL, DL, MVT::i64, SllX, Const1);
1897 SDValue ShiftRight1Lo = DAG.getNode(ISD::SRL, DL, MVT::i32, Lo,
1899 SDValue ShiftRightLo = DAG.getNode(ISD::SRL, DL, MVT::i32, ShiftRight1Lo,
1938 SDValue ShiftRightLo = DAG.getNode(ISD::SRL, D
2029 SDValue SRL = DAG.getNode(ISD::SRL, DL, MVT::i64, SLL, Const32); local
[all...] |
| /external/llvm/lib/CodeGen/SelectionDAG/ |
| H A D | DAGCombiner.cpp | 891 else if (Opc == ISD::SRL)
1132 case ISD::SRL: return visitSRL(N);
1215 case ISD::SRL:
1952 SDValue SRL = DAG.getNode(ISD::SRL, SDLoc(N), VT, SGN, local
1955 SDValue ADD = DAG.getNode(ISD::ADD, SDLoc(N), VT, N0, SRL);
1956 AddToWorkList(SRL.getNode());
2006 return DAG.getNode(ISD::SRL, SDLoc(N), VT, N0,
2020 return DAG.getNode(ISD::SRL, SDLoc(N), VT, N0, Add);
2164 N1 = DAG.getNode(ISD::SRL, D
[all...] |
| /external/llvm/lib/Target/X86/ |
| H A D | X86ISelLowering.cpp | 842 setOperationAction(ISD::SRL, VT, Expand);
1092 setOperationAction(ISD::SRL, MVT::v8i16, Custom);
1093 setOperationAction(ISD::SRL, MVT::v16i8, Custom);
1103 setOperationAction(ISD::SRL, MVT::v2i64, Custom);
1104 setOperationAction(ISD::SRL, MVT::v4i32, Custom);
1169 setOperationAction(ISD::SRL, MVT::v16i16, Custom);
1170 setOperationAction(ISD::SRL, MVT::v32i8, Custom);
1248 setOperationAction(ISD::SRL, MVT::v4i64, Custom);
1249 setOperationAction(ISD::SRL, MVT::v8i32, Custom);
1381 setOperationAction(ISD::SRL, MV
11981 SDValue SRL = getTargetVShiftNode(X86ISD::VSRLI, dl, VT, SGN, Amt, DAG); local
12040 SDValue SRL = DAG.getNode(X86ISD::VSRLI, dl, MVT::v8i16, R, local
12084 SDValue SRL = DAG.getNode(X86ISD::VSRLI, dl, MVT::v16i16, R, local
[all...] |