header.S revision 9a8c75adb2abf551d06dbf757bff558c1feded08
1ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* 2ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Copyright (C) 2008 The Android Open Source Project 3ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 4ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Licensed under the Apache License, Version 2.0 (the "License"); 5ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * you may not use this file except in compliance with the License. 6ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * You may obtain a copy of the License at 7ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 8ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * http://www.apache.org/licenses/LICENSE-2.0 9ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 10ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Unless required by applicable law or agreed to in writing, software 11ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * distributed under the License is distributed on an "AS IS" BASIS, 12ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. 13ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * See the License for the specific language governing permissions and 14ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * limitations under the License. 15ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng */ 16ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 17ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng#if defined(WITH_JIT) 18ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 19ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* 20ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * ARMv5 definitions and declarations. 21ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng */ 22ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 23ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* 24ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengARM EABI general notes: 25ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 26ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengr0-r3 hold first 4 args to a method; they are not preserved across method calls 27ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengr4-r8 are available for general use 28ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengr9 is given special treatment in some situations, but not for us 29ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengr10 (sl) seems to be generally available 30ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengr11 (fp) is used by gcc (unless -fomit-frame-pointer is set) 31ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengr12 (ip) is scratch -- not preserved across method calls 32ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengr13 (sp) should be managed carefully in case a signal arrives 33ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengr14 (lr) must be preserved 34ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengr15 (pc) can be tinkered with directly 35ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 36ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengr0 holds returns of <= 4 bytes 37ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengr0-r1 hold returns of 8 bytes, low word in r0 38ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 39ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengCallee must save/restore r4+ (except r12) if it modifies them. 40ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 41ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengStack is "full descending". Only the arguments that don't fit in the first 4 42ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengregisters are placed on the stack. "sp" points at the first stacked argument 43ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng(i.e. the 5th arg). 44ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 45ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengVFP: single-precision results in s0, double-precision results in d0. 46ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 47ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengIn the EABI, "sp" must be 64-bit aligned on entry to a function, and any 48ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng64-bit quantities (long long, double) must be 64-bit aligned. 49ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng*/ 50ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 51ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* 52ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengJIT and ARM notes: 53ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 54ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengThe following registers have fixed assignments: 55ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 56ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng reg nick purpose 57ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng r5 rFP interpreted frame pointer, used for accessing locals and args 58ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng r6 rGLUE MterpGlue pointer 59ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 60ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengThe following registers have fixed assignments in mterp but are scratch 61ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengregisters in compiled code 62ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 63ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng reg nick purpose 64ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng r4 rPC interpreted program counter, used for fetching instructions 651da12167d913efde56ec3b40491524b051679f2cAndy McFadden r7 rINST first 16-bit code unit of current instruction 661da12167d913efde56ec3b40491524b051679f2cAndy McFadden r8 rIBASE interpreted instruction base pointer, used for computed goto 67ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 68ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben ChengMacros are provided for common operations. Each macro MUST emit only 69ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengone instruction to make instruction-counting easier. They MUST NOT alter 70ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Chengunspecified registers or condition codes. 71ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng*/ 72ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 73ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* single-purpose registers, given names for clarity */ 74ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng#define rPC r4 75ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng#define rFP r5 76ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng#define rGLUE r6 771da12167d913efde56ec3b40491524b051679f2cAndy McFadden#define rINST r7 781da12167d913efde56ec3b40491524b051679f2cAndy McFadden#define rIBASE r8 79ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 80ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* 81ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * Given a frame pointer, find the stack save area. 82ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * 83ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * In C this is "((StackSaveArea*)(_fp) -1)". 84ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng */ 85ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng#define SAVEAREA_FROM_FP(_reg, _fpreg) \ 86ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng sub _reg, _fpreg, #sizeofStackSaveArea 87ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 889a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee#define EXPORT_PC() \ 899a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee str rPC, [rFP, #(-sizeofStackSaveArea + offStackSaveArea_currentPc)] 909a8c75adb2abf551d06dbf757bff558c1feded08Bill Buzbee 91ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng/* 92ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * This is a #include, not a %include, because we want the C pre-processor 93ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng * to expand the macros into assembler assignment statements. 94ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng */ 95ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng#include "../../../mterp/common/asm-constants.h" 96ba4fc8bfc1bccae048403bd1cea3b869dca61dd7Ben Cheng 97