1f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org//===-- R600RegisterInfo.cpp - R600 Register Information ------------------===// 2f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org// 3f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org// The LLVM Compiler Infrastructure 4f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org// 5f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org// This file is distributed under the University of Illinois Open Source 6f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org// License. See LICENSE.TXT for details. 7f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org// 8f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org//===----------------------------------------------------------------------===// 9f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org// 10f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org// The file contains the R600 implementation of the TargetRegisterInfo class. 11f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org// 12f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org//===----------------------------------------------------------------------===// 13f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 14f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "R600RegisterInfo.h" 15f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "AMDGPUTargetMachine.h" 16f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "R600MachineFunctionInfo.h" 17f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 18f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgusing namespace llvm; 19f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 20f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgR600RegisterInfo::R600RegisterInfo(AMDGPUTargetMachine &tm, 21f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org const TargetInstrInfo &tii) 22f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org: AMDGPURegisterInfo(tm, tii), 23f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org TM(tm), 24f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org TII(tii) 25f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org { } 26f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 27f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgBitVector R600RegisterInfo::getReservedRegs(const MachineFunction &MF) const 28f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 29f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org BitVector Reserved(getNumRegs()); 30f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org const R600MachineFunctionInfo * MFI = MF.getInfo<R600MachineFunctionInfo>(); 31f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 32f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org Reserved.set(AMDGPU::ZERO); 33f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org Reserved.set(AMDGPU::HALF); 34f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org Reserved.set(AMDGPU::ONE); 35f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org Reserved.set(AMDGPU::ONE_INT); 36f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org Reserved.set(AMDGPU::NEG_HALF); 37f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org Reserved.set(AMDGPU::NEG_ONE); 38f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org Reserved.set(AMDGPU::PV_X); 39f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org Reserved.set(AMDGPU::ALU_LITERAL_X); 40f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org Reserved.set(AMDGPU::PREDICATE_BIT); 41f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org Reserved.set(AMDGPU::PRED_SEL_OFF); 42f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org Reserved.set(AMDGPU::PRED_SEL_ZERO); 43f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org Reserved.set(AMDGPU::PRED_SEL_ONE); 44f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 45f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org for (TargetRegisterClass::iterator I = AMDGPU::R600_CReg32RegClass.begin(), 46f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org E = AMDGPU::R600_CReg32RegClass.end(); I != E; ++I) { 47f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org Reserved.set(*I); 48f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 49f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 50f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org for (std::vector<unsigned>::const_iterator I = MFI->ReservedRegs.begin(), 51f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org E = MFI->ReservedRegs.end(); I != E; ++I) { 52f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org Reserved.set(*I); 53f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 54f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 55f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return Reserved; 56f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 57f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 58f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgconst TargetRegisterClass * 59f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgR600RegisterInfo::getISARegClass(const TargetRegisterClass * rc) const 60f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 61f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch (rc->getID()) { 62f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case AMDGPU::GPRF32RegClassID: 63f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case AMDGPU::GPRI32RegClassID: 64f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return &AMDGPU::R600_Reg32RegClass; 65f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org default: return rc; 66f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 67f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 68f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 69f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgunsigned R600RegisterInfo::getHWRegIndex(unsigned reg) const 70f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 71f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch(reg) { 72f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case AMDGPU::ZERO: return 248; 73f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case AMDGPU::ONE: 74f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case AMDGPU::NEG_ONE: return 249; 75f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case AMDGPU::ONE_INT: return 250; 76f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case AMDGPU::HALF: 77f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case AMDGPU::NEG_HALF: return 252; 78f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case AMDGPU::ALU_LITERAL_X: return 253; 79f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case AMDGPU::PREDICATE_BIT: 80f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case AMDGPU::PRED_SEL_OFF: 81f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case AMDGPU::PRED_SEL_ZERO: 82f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case AMDGPU::PRED_SEL_ONE: 83f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return 0; 84f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org default: return getHWRegIndexGen(reg); 85f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 86f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 87f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 88f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgunsigned R600RegisterInfo::getHWRegChan(unsigned reg) const 89f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 90f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch(reg) { 91f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case AMDGPU::ZERO: 92f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case AMDGPU::ONE: 93f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case AMDGPU::ONE_INT: 94f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case AMDGPU::NEG_ONE: 95f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case AMDGPU::HALF: 96f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case AMDGPU::NEG_HALF: 97f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case AMDGPU::ALU_LITERAL_X: 98f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case AMDGPU::PREDICATE_BIT: 99f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case AMDGPU::PRED_SEL_OFF: 100f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case AMDGPU::PRED_SEL_ZERO: 101f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case AMDGPU::PRED_SEL_ONE: 102f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org return 0; 103f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org default: return getHWRegChanGen(reg); 104f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 105f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 106f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 107f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgconst TargetRegisterClass * R600RegisterInfo::getCFGStructurizerRegClass( 108f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org MVT VT) const 109f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 110f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch(VT.SimpleTy) { 111f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org default: 112f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case MVT::i32: return &AMDGPU::R600_TReg32RegClass; 113f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 114f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 115f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 116f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.orgunsigned R600RegisterInfo::getSubRegFromChannel(unsigned Channel) const 117f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org{ 118f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org switch (Channel) { 119f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org default: assert(!"Invalid channel index"); return 0; 120f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case 0: return AMDGPU::sel_x; 121f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case 1: return AMDGPU::sel_y; 122f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case 2: return AMDGPU::sel_z; 123f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org case 3: return AMDGPU::sel_w; 124f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org } 125f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org} 126f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org 127f2ba7591b1407a7ee9209f842c50696914dc2dedkbr@chromium.org#include "R600HwRegInfo.include" 128