1c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* 2c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * linux/include/linux/mtd/nand.h 3c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 4c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Copyright (c) 2000 David Woodhouse <dwmw2@mvhi.com> 5c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Steven J. Hill <sjhill@realitydiluted.com> 6c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Thomas Gleixner <tglx@linutronix.de> 7c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 8c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * $Id: nand.h,v 1.74 2005/09/15 13:58:50 vwool Exp $ 9c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 10c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * This program is free software; you can redistribute it and/or modify 11c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * it under the terms of the GNU General Public License version 2 as 12c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * published by the Free Software Foundation. 13c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 14c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Info: 15c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Contains standard defines and IDs for NAND flash devices 16c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 17c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Changelog: 18c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * See git changelog. 19c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 20c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#ifndef __LINUX_MTD_NAND_H 21c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define __LINUX_MTD_NAND_H 22c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 23c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#include <linux/wait.h> 24c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#include <linux/spinlock.h> 25c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#include <linux/mtd/mtd.h> 26c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 27c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querustruct mtd_info; 28c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Scan and identify a NAND device */ 29c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruextern int nand_scan (struct mtd_info *mtd, int max_chips); 30c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Free resources held by the NAND device */ 31c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruextern void nand_release (struct mtd_info *mtd); 32c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 33c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* The maximum number of NAND chips in an array */ 34c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_MAX_CHIPS 8 35c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 36c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* This constant declares the max. oobsize / page, which 37c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * is supported now. If you add a chip with bigger oobsize/page 38c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * adjust this accordingly. 39c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 40c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_MAX_OOBSIZE 64 41c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_MAX_PAGESIZE 2048 42c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 43c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* 44c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Constants for hardware specific CLE/ALE/NCE function 45c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 46c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * These are bits which can be or'ed to set/clear multiple 47c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * bits in one go. 48c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 49c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Select the chip by setting nCE to low */ 50c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_NCE 0x01 51c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Select the command latch by setting CLE to high */ 52c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CLE 0x02 53c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Select the address latch by setting ALE to high */ 54c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_ALE 0x04 55c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 56c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CTRL_CLE (NAND_NCE | NAND_CLE) 57c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CTRL_ALE (NAND_NCE | NAND_ALE) 58c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CTRL_CHANGE 0x80 59c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 60c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* 61c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Standard NAND flash commands 62c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 63c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_READ0 0 64c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_READ1 1 65c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_RNDOUT 5 66c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_PAGEPROG 0x10 67c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_READOOB 0x50 68c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_ERASE1 0x60 69c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_STATUS 0x70 70c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_STATUS_MULTI 0x71 71c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_SEQIN 0x80 72c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_RNDIN 0x85 73c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_READID 0x90 74c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_ERASE2 0xd0 75c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_RESET 0xff 76c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 77c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Extended commands for large page devices */ 78c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_READSTART 0x30 79c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_RNDOUTSTART 0xE0 80c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_CACHEDPROG 0x15 81c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 82c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Extended commands for AG-AND device */ 83c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* 84c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Note: the command for NAND_CMD_DEPLETE1 is really 0x00 but 85c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * there is no way to distinguish that from NAND_CMD_READ0 86c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * until the remaining sequence of commands has been completed 87c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * so add a high order bit and mask it off in the command. 88c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 89c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_DEPLETE1 0x100 90c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_DEPLETE2 0x38 91c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_STATUS_MULTI 0x71 92c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_STATUS_ERROR 0x72 93c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* multi-bank error status (banks 0-3) */ 94c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_STATUS_ERROR0 0x73 95c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_STATUS_ERROR1 0x74 96c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_STATUS_ERROR2 0x75 97c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_STATUS_ERROR3 0x76 98c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_STATUS_RESET 0x7f 99c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_STATUS_CLEAR 0xff 100c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 101c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CMD_NONE -1 102c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 103c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Status bits */ 104c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_STATUS_FAIL 0x01 105c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_STATUS_FAIL_N1 0x02 106c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_STATUS_TRUE_READY 0x20 107c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_STATUS_READY 0x40 108c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_STATUS_WP 0x80 109c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 110c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* 111c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Constants for ECC_MODES 112c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 113c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querutypedef enum { 114c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru NAND_ECC_NONE, 115c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru NAND_ECC_SOFT, 116c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru NAND_ECC_HW, 117c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru NAND_ECC_HW_SYNDROME, 118c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru} nand_ecc_modes_t; 119c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 120c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* 121c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Constants for Hardware ECC 122c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 123c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Reset Hardware ECC for read */ 124c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_ECC_READ 0 125c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Reset Hardware ECC for write */ 126c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_ECC_WRITE 1 127c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Enable Hardware ECC before syndrom is read back from flash */ 128c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_ECC_READSYN 2 129c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 130c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Bit mask for flags passed to do_nand_read_ecc */ 131c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_GET_DEVICE 0x80 132c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 133c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 134c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Option constants for bizarre disfunctionality and real 135c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru* features 136c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru*/ 137c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Chip can not auto increment pages */ 138c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_NO_AUTOINCR 0x00000001 139c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Buswitdh is 16 bit */ 140c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_BUSWIDTH_16 0x00000002 141c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Device supports partial programming without padding */ 142c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_NO_PADDING 0x00000004 143c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Chip has cache program function */ 144c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CACHEPRG 0x00000008 145c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Chip has copy back function */ 146c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_COPYBACK 0x00000010 147c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* AND Chip which has 4 banks and a confusing page / block 148c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * assignment. See Renesas datasheet for further information */ 149c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_IS_AND 0x00000020 150c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Chip has a array of 4 pages which can be read without 151c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * additional ready /busy waits */ 152c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_4PAGE_ARRAY 0x00000040 153c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Chip requires that BBT is periodically rewritten to prevent 154c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * bits from adjacent blocks from 'leaking' in altering data. 155c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * This happens with the Renesas AG-AND chips, possibly others. */ 156c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define BBT_AUTO_REFRESH 0x00000080 157c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Chip does not require ready check on read. True 158c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * for all large page devices, as they do not support 159c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * autoincrement.*/ 160c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_NO_READRDY 0x00000100 161c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 162c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Options valid for Samsung large page devices */ 163c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_SAMSUNG_LP_OPTIONS \ 164c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru (NAND_NO_PADDING | NAND_CACHEPRG | NAND_COPYBACK) 165c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 166c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Macros to identify the above */ 167c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CANAUTOINCR(chip) (!(chip->options & NAND_NO_AUTOINCR)) 168c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_MUST_PAD(chip) (!(chip->options & NAND_NO_PADDING)) 169c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_HAS_CACHEPROG(chip) ((chip->options & NAND_CACHEPRG)) 170c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_HAS_COPYBACK(chip) ((chip->options & NAND_COPYBACK)) 171c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 172c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Mask to zero out the chip options, which come from the id table */ 173c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CHIPOPTIONS_MSK (0x0000ffff & ~NAND_NO_AUTOINCR) 174c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 175c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Non chip related options */ 176c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Use a flash based bad block table. This option is passed to the 177c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * default bad block table function. */ 178c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_USE_FLASH_BBT 0x00010000 179c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* This option skips the bbt scan during initialization. */ 180c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_SKIP_BBTSCAN 0x00020000 181c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 182c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Options set by nand scan */ 183c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Nand scan has allocated controller struct */ 184c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_CONTROLLER_ALLOC 0x80000000 185c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 186c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 187c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* 188c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * nand_state_t - chip states 189c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Enumeration for NAND flash chip state 190c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 191c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querutypedef enum { 192c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru FL_READY, 193c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru FL_READING, 194c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru FL_WRITING, 195c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru FL_ERASING, 196c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru FL_SYNCING, 197c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru FL_CACHEDPRG, 198c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru FL_PM_SUSPENDED, 199c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru} nand_state_t; 200c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 201c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Keep gcc happy */ 202c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querustruct nand_chip; 203c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 204c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/** 205c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * struct nand_hw_control - Control structure for hardware controller (e.g ECC generator) shared among independent devices 206c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @lock: protection lock 207c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @active: the mtd device which holds the controller currently 208c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @wq: wait queue to sleep on if a NAND operation is in progress 209c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * used instead of the per chip wait queue when a hw controller is available 210c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 211c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querustruct nand_hw_control { 212c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru spinlock_t lock; 213c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru struct nand_chip *active; 214c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru wait_queue_head_t wq; 215c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru}; 216c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 217c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/** 218c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * struct nand_ecc_ctrl - Control structure for ecc 219c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @mode: ecc mode 220c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @steps: number of ecc steps per page 221c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @size: data bytes per ecc step 222c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @bytes: ecc bytes per step 223c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @total: total number of ecc bytes per page 224c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @prepad: padding information for syndrome based ecc generators 225c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @postpad: padding information for syndrome based ecc generators 226c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @layout: ECC layout control struct pointer 227c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @hwctl: function to control hardware ecc generator. Must only 228c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * be provided if an hardware ECC is available 229c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @calculate: function for ecc calculation or readback from ecc hardware 230c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @correct: function for ecc correction, matching to ecc generator (sw/hw) 231c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @read_page: function to read a page according to the ecc generator requirements 232c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @write_page: function to write a page according to the ecc generator requirements 233c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @read_oob: function to read chip OOB data 234c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @write_oob: function to write chip OOB data 235c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 236c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querustruct nand_ecc_ctrl { 237c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru nand_ecc_modes_t mode; 238c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int steps; 239c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int size; 240c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int bytes; 241c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int total; 242c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int prepad; 243c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int postpad; 244c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru struct nand_ecclayout *layout; 245c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru void (*hwctl)(struct mtd_info *mtd, int mode); 246c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int (*calculate)(struct mtd_info *mtd, 247c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru const uint8_t *dat, 248c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru uint8_t *ecc_code); 249c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int (*correct)(struct mtd_info *mtd, uint8_t *dat, 250c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru uint8_t *read_ecc, 251c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru uint8_t *calc_ecc); 252c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int (*read_page)(struct mtd_info *mtd, 253c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru struct nand_chip *chip, 254c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru uint8_t *buf); 255c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru void (*write_page)(struct mtd_info *mtd, 256c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru struct nand_chip *chip, 257c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru const uint8_t *buf); 258c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int (*read_oob)(struct mtd_info *mtd, 259c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru struct nand_chip *chip, 260c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int page, 261c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int sndcmd); 262c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int (*write_oob)(struct mtd_info *mtd, 263c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru struct nand_chip *chip, 264c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int page); 265c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru}; 266c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 267c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/** 268c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * struct nand_buffers - buffer structure for read/write 269c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @ecccalc: buffer for calculated ecc 270c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @ecccode: buffer for ecc read from flash 271c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @oobwbuf: buffer for write oob data 272c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @databuf: buffer for data - dynamically sized 273c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @oobrbuf: buffer to read oob data 274c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 275c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Do not change the order of buffers. databuf and oobrbuf must be in 276c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * consecutive order. 277c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 278c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querustruct nand_buffers { 279c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru uint8_t ecccalc[NAND_MAX_OOBSIZE]; 280c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru uint8_t ecccode[NAND_MAX_OOBSIZE]; 281c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru uint8_t oobwbuf[NAND_MAX_OOBSIZE]; 282c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru uint8_t databuf[NAND_MAX_PAGESIZE]; 283c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru uint8_t oobrbuf[NAND_MAX_OOBSIZE]; 284c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru}; 285c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 286c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/** 287c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * struct nand_chip - NAND Private Flash Chip Data 288c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @IO_ADDR_R: [BOARDSPECIFIC] address to read the 8 I/O lines of the flash device 289c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @IO_ADDR_W: [BOARDSPECIFIC] address to write the 8 I/O lines of the flash device 290c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @read_byte: [REPLACEABLE] read one byte from the chip 291c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @read_word: [REPLACEABLE] read one word from the chip 292c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @write_buf: [REPLACEABLE] write data from the buffer to the chip 293c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @read_buf: [REPLACEABLE] read data from the chip into the buffer 294c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @verify_buf: [REPLACEABLE] verify buffer contents against the chip data 295c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @select_chip: [REPLACEABLE] select chip nr 296c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @block_bad: [REPLACEABLE] check, if the block is bad 297c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @block_markbad: [REPLACEABLE] mark the block bad 298c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @cmd_ctrl: [BOARDSPECIFIC] hardwarespecific funtion for controlling 299c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * ALE/CLE/nCE. Also used to write command and address 300c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @dev_ready: [BOARDSPECIFIC] hardwarespecific function for accesing device ready/busy line 301c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * If set to NULL no access to ready/busy is available and the ready/busy information 302c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * is read from the chip status register 303c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @cmdfunc: [REPLACEABLE] hardwarespecific function for writing commands to the chip 304c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @waitfunc: [REPLACEABLE] hardwarespecific function for wait on ready 305c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @ecc: [BOARDSPECIFIC] ecc control ctructure 306c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @buffers: buffer structure for read/write 307c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @hwcontrol: platform-specific hardware control structure 308c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @ops: oob operation operands 309c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @erase_cmd: [INTERN] erase command write function, selectable due to AND support 310c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @scan_bbt: [REPLACEABLE] function to scan bad block table 311c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @chip_delay: [BOARDSPECIFIC] chip dependent delay for transfering data from array to read regs (tR) 312c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @wq: [INTERN] wait queue to sleep on if a NAND operation is in progress 313c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @state: [INTERN] the current state of the NAND device 314c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @oob_poi: poison value buffer 315c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @page_shift: [INTERN] number of address bits in a page (column address bits) 316c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @phys_erase_shift: [INTERN] number of address bits in a physical eraseblock 317c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @bbt_erase_shift: [INTERN] number of address bits in a bbt entry 318c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @chip_shift: [INTERN] number of address bits in one chip 319c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @datbuf: [INTERN] internal buffer for one page + oob 320c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @oobbuf: [INTERN] oob buffer for one eraseblock 321c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @oobdirty: [INTERN] indicates that oob_buf must be reinitialized 322c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @data_poi: [INTERN] pointer to a data buffer 323c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @options: [BOARDSPECIFIC] various chip options. They can partly be set to inform nand_scan about 324c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * special functionality. See the defines for further explanation 325c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @badblockpos: [INTERN] position of the bad block marker in the oob area 326c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @numchips: [INTERN] number of physical chips 327c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @chipsize: [INTERN] the size of one chip for multichip arrays 328c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @pagemask: [INTERN] page number mask = number of (pages / chip) - 1 329c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @pagebuf: [INTERN] holds the pagenumber which is currently in data_buf 330c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @ecclayout: [REPLACEABLE] the default ecc placement scheme 331c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @bbt: [INTERN] bad block table pointer 332c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @bbt_td: [REPLACEABLE] bad block table descriptor for flash lookup 333c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @bbt_md: [REPLACEABLE] bad block table mirror descriptor 334c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @badblock_pattern: [REPLACEABLE] bad block scan pattern used for initial bad block scan 335c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @controller: [REPLACEABLE] a pointer to a hardware controller structure 336c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * which is shared among multiple independend devices 337c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @priv: [OPTIONAL] pointer to private chip date 338c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @errstat: [OPTIONAL] hardware specific function to perform additional error status checks 339c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * (determine if errors are correctable) 340c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 341c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 342c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querustruct nand_chip { 343c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru void __iomem *IO_ADDR_R; 344c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru void __iomem *IO_ADDR_W; 345c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 346c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru uint8_t (*read_byte)(struct mtd_info *mtd); 347c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru u16 (*read_word)(struct mtd_info *mtd); 348c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru void (*write_buf)(struct mtd_info *mtd, const uint8_t *buf, int len); 349c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru void (*read_buf)(struct mtd_info *mtd, uint8_t *buf, int len); 350c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int (*verify_buf)(struct mtd_info *mtd, const uint8_t *buf, int len); 351c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru void (*select_chip)(struct mtd_info *mtd, int chip); 352c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int (*block_bad)(struct mtd_info *mtd, loff_t ofs, int getchip); 353c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int (*block_markbad)(struct mtd_info *mtd, loff_t ofs); 354c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru void (*cmd_ctrl)(struct mtd_info *mtd, int dat, 355c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned int ctrl); 356c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int (*dev_ready)(struct mtd_info *mtd); 357c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru void (*cmdfunc)(struct mtd_info *mtd, unsigned command, int column, int page_addr); 358c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int (*waitfunc)(struct mtd_info *mtd, struct nand_chip *this); 359c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru void (*erase_cmd)(struct mtd_info *mtd, int page); 360c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int (*scan_bbt)(struct mtd_info *mtd); 361c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int (*errstat)(struct mtd_info *mtd, struct nand_chip *this, int state, int status, int page); 362c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 363c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int chip_delay; 364c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned int options; 365c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 366c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int page_shift; 367c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int phys_erase_shift; 368c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int bbt_erase_shift; 369c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int chip_shift; 370c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int numchips; 371c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned long chipsize; 372c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int pagemask; 373c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int pagebuf; 374c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int badblockpos; 375c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 376c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru nand_state_t state; 377c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 378c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru uint8_t *oob_poi; 379c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru struct nand_hw_control *controller; 380c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru struct nand_ecclayout *ecclayout; 381c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 382c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru struct nand_ecc_ctrl ecc; 383c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru struct nand_buffers buffers; 384c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru struct nand_hw_control hwcontrol; 385c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 386c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru struct mtd_oob_ops ops; 387c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 388c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru uint8_t *bbt; 389c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru struct nand_bbt_descr *bbt_td; 390c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru struct nand_bbt_descr *bbt_md; 391c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 392c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru struct nand_bbt_descr *badblock_pattern; 393c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 394c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru void *priv; 395c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru}; 396c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 397c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* 398c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * NAND Flash Manufacturer ID Codes 399c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 400c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_MFR_TOSHIBA 0x98 401c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_MFR_SAMSUNG 0xec 402c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_MFR_FUJITSU 0x04 403c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_MFR_NATIONAL 0x8f 404c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_MFR_RENESAS 0x07 405c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_MFR_STMICRO 0x20 406c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_MFR_HYNIX 0xad 407c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 408c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/** 409c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * struct nand_flash_dev - NAND Flash Device ID Structure 410c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @name: Identify the device type 411c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @id: device ID code 412c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @pagesize: Pagesize in bytes. Either 256 or 512 or 0 413c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * If the pagesize is 0, then the real pagesize 414c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * and the eraseize are determined from the 415c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * extended id bytes in the chip 416c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @erasesize: Size of an erase block in the flash device. 417c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @chipsize: Total chipsize in Mega Bytes 418c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @options: Bitfield to store chip relevant options 419c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 420c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querustruct nand_flash_dev { 421c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru char *name; 422c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int id; 423c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned long pagesize; 424c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned long chipsize; 425c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned long erasesize; 426c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned long options; 427c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru}; 428c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 429c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/** 430c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * struct nand_manufacturers - NAND Flash Manufacturer ID Structure 431c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @name: Manufacturer name 432c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @id: manufacturer ID code of device. 433c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru*/ 434c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querustruct nand_manufacturers { 435c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int id; 436c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru char * name; 437c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru}; 438c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 439c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruextern struct nand_flash_dev nand_flash_ids[]; 440c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruextern struct nand_manufacturers nand_manuf_ids[]; 441c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 442c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/** 443c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * struct nand_bbt_descr - bad block table descriptor 444c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @options: options for this descriptor 445c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @pages: the page(s) where we find the bbt, used with option BBT_ABSPAGE 446c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * when bbt is searched, then we store the found bbts pages here. 447c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Its an array and supports up to 8 chips now 448c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @offs: offset of the pattern in the oob area of the page 449c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @veroffs: offset of the bbt version counter in the oob are of the page 450c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @version: version read from the bbt page during scan 451c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @len: length of the pattern, if 0 no pattern check is performed 452c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @maxblocks: maximum number of blocks to search for a bbt. This number of 453c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * blocks is reserved at the end of the device where the tables are 454c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * written. 455c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @reserved_block_code: if non-0, this pattern denotes a reserved (rather than 456c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * bad) block in the stored bbt 457c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @pattern: pattern to identify bad block table or factory marked good / 458c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * bad blocks, can be NULL, if len = 0 459c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 460c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * Descriptor for the bad block table marker and the descriptor for the 461c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * pattern which identifies good and bad blocks. The assumption is made 462c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * that the pattern and the version count are always located in the oob area 463c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * of the first block. 464c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 465c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querustruct nand_bbt_descr { 466c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int options; 467c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int pages[NAND_MAX_CHIPS]; 468c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int offs; 469c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int veroffs; 470c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru uint8_t version[NAND_MAX_CHIPS]; 471c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int len; 472c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int maxblocks; 473c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int reserved_block_code; 474c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru uint8_t *pattern; 475c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru}; 476c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 477c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Options for the bad block table descriptors */ 478c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 479c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* The number of bits used per block in the bbt on the device */ 480c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_BBT_NRBITS_MSK 0x0000000F 481c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_BBT_1BIT 0x00000001 482c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_BBT_2BIT 0x00000002 483c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_BBT_4BIT 0x00000004 484c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_BBT_8BIT 0x00000008 485c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* The bad block table is in the last good block of the device */ 486c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_BBT_LASTBLOCK 0x00000010 487c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* The bbt is at the given page, else we must scan for the bbt */ 488c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_BBT_ABSPAGE 0x00000020 489c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* The bbt is at the given page, else we must scan for the bbt */ 490c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_BBT_SEARCH 0x00000040 491c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* bbt is stored per chip on multichip devices */ 492c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_BBT_PERCHIP 0x00000080 493c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* bbt has a version counter at offset veroffs */ 494c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_BBT_VERSION 0x00000100 495c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Create a bbt if none axists */ 496c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_BBT_CREATE 0x00000200 497c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Search good / bad pattern through all pages of a block */ 498c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_BBT_SCANALLPAGES 0x00000400 499c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Scan block empty during good / bad block scan */ 500c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_BBT_SCANEMPTY 0x00000800 501c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Write bbt if neccecary */ 502c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_BBT_WRITE 0x00001000 503c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Read and write back block contents when writing bbt */ 504c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_BBT_SAVECONTENT 0x00002000 505c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Search good / bad pattern on the first and the second page */ 506c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_BBT_SCAN2NDPAGE 0x00004000 507c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 508c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* The maximum number of blocks to scan for a bbt */ 509c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_BBT_SCAN_MAXBLOCKS 4 510c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 511c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruextern int nand_scan_bbt(struct mtd_info *mtd, struct nand_bbt_descr *bd); 512c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruextern int nand_update_bbt(struct mtd_info *mtd, loff_t offs); 513c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruextern int nand_default_bbt(struct mtd_info *mtd); 514c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruextern int nand_isbad_bbt(struct mtd_info *mtd, loff_t offs, int allowbbt); 515c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruextern int nand_erase_nand(struct mtd_info *mtd, struct erase_info *instr, 516c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int allowbbt); 517c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queruextern int nand_do_read(struct mtd_info *mtd, loff_t from, size_t len, 518c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru size_t * retlen, uint8_t * buf); 519c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 520c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* 521c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru* Constants for oob configuration 522c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru*/ 523c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_SMALL_BADBLOCK_POS 5 524c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#define NAND_LARGE_BADBLOCK_POS 0 525c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 526c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/** 527c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * struct platform_nand_chip - chip level device structure 528c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @nr_chips: max. number of chips to scan for 529c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @chip_offset: chip number offset 530c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @nr_partitions: number of partitions pointed to by partitions (or zero) 531c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @partitions: mtd partition list 532c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @chip_delay: R/B delay value in us 533c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @options: Option flags, e.g. 16bit buswidth 534c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @ecclayout: ecc layout info structure 535c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @priv: hardware controller specific settings 536c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 537c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querustruct platform_nand_chip { 538c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int nr_chips; 539c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int chip_offset; 540c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int nr_partitions; 541c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru struct mtd_partition *partitions; 542c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru struct nand_ecclayout *ecclayout; 543c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int chip_delay; 544c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru unsigned int options; 545c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru void *priv; 546c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru}; 547c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 548c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/** 549c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * struct platform_nand_ctrl - controller level device structure 550c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @hwcontrol: platform specific hardware control structure 551c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @dev_ready: platform specific function to read ready/busy pin 552c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @select_chip: platform specific chip select function 553c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * @priv: private data to transport driver specific settings 554c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * 555c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru * All fields are optional and depend on the hardware driver requirements 556c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru */ 557c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querustruct platform_nand_ctrl { 558c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru void (*hwcontrol)(struct mtd_info *mtd, int cmd); 559c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru int (*dev_ready)(struct mtd_info *mtd); 560c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru void (*select_chip)(struct mtd_info *mtd, int chip); 561c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru void *priv; 562c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru}; 563c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 564c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru/* Some helpers to access the data structures */ 565c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querustatic inline 566c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Querustruct platform_nand_chip *get_platform_nandchip(struct mtd_info *mtd) 567c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru{ 568c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru struct nand_chip *chip = mtd->priv; 569c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 570c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru return chip->priv; 571c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru} 572c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru 573c559cd81139f97cecad1ad91a0b2e25a5936d53Jean-Baptiste Queru#endif /* __LINUX_MTD_NAND_H */ 574