CodeEmitterGen.cpp revision d0fde30ce850b78371fd1386338350591f9ff494 
1//===- CodeEmitterGen.cpp - Code Emitter Generator ------------------------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// FIXME: Document.
11//
12//===----------------------------------------------------------------------===//
13
14#include "CodeEmitterGen.h"
15#include "Record.h"
16#include "Support/Debug.h"
17
18namespace llvm {
19
20void CodeEmitterGen::run(std::ostream &o) {
21  std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
22
23  EmitSourceFileHeader("Machine Code Emitter", o);
24
25  std::string Namespace = "V9::";
26  std::string ClassName = "SparcV9CodeEmitter::";
27
28  //const std::string &Namespace = Inst->getValue("Namespace")->getName();
29  o << "unsigned " << ClassName
30    << "getBinaryCodeForInstr(MachineInstr &MI) {\n"
31    << "  unsigned Value = 0;\n"
32    << "  DEBUG(std::cerr << MI);\n"
33    << "  switch (MI.getOpcode()) {\n";
34  for (std::vector<Record*>::iterator I = Insts.begin(), E = Insts.end();
35       I != E; ++I) {
36    Record *R = *I;
37    o << "    case " << Namespace << R->getName() << ": {\n"
38      << "      DEBUG(std::cerr << \"Emitting " << R->getName() << "\\n\");\n";
39
40    BitsInit *BI = R->getValueAsBitsInit("Inst");
41
42    unsigned Value = 0;
43    const std::vector<RecordVal> &Vals = R->getValues();
44
45    DEBUG(o << "      // prefilling: ");
46    // Start by filling in fixed values...
47    for (unsigned i = 0, e = BI->getNumBits(); i != e; ++i) {
48      if (BitInit *B = dynamic_cast<BitInit*>(BI->getBit(e-i-1))) {
49        Value |= B->getValue() << (e-i-1);
50        DEBUG(o << B->getValue());
51      } else {
52        DEBUG(o << "0");
53      }
54    }
55    DEBUG(o << "\n");
56
57    DEBUG(o << "      // " << *R->getValue("Inst") << "\n");
58    o << "      Value = " << Value << "U;\n\n";
59
60    // Loop over all of the fields in the instruction determining which are the
61    // operands to the instruction.
62    //
63    unsigned op = 0;
64    std::map<std::string, unsigned> OpOrder;
65    std::map<std::string, bool> OpContinuous;
66    for (unsigned i = 0, e = Vals.size(); i != e; ++i) {
67      if (!Vals[i].getPrefix() &&  !Vals[i].getValue()->isComplete()) {
68        // Is the operand continuous? If so, we can just mask and OR it in
69        // instead of doing it bit-by-bit, saving a lot in runtime cost.
70        const BitsInit *InstInit = BI;
71        int beginBitInVar = -1, endBitInVar = -1;
72        int beginBitInInst = -1, endBitInInst = -1;
73        bool continuous = true;
74
75        for (int bit = InstInit->getNumBits()-1; bit >= 0; --bit) {
76          if (VarBitInit *VBI =
77              dynamic_cast<VarBitInit*>(InstInit->getBit(bit))) {
78            TypedInit *TI = VBI->getVariable();
79            if (VarInit *VI = dynamic_cast<VarInit*>(TI)) {
80              // only process the current variable
81              if (VI->getName() != Vals[i].getName())
82                continue;
83
84              if (beginBitInVar == -1)
85                beginBitInVar = VBI->getBitNum();
86
87              if (endBitInVar == -1)
88                endBitInVar = VBI->getBitNum();
89              else {
90                if (endBitInVar == (int)VBI->getBitNum() + 1)
91                  endBitInVar = VBI->getBitNum();
92                else {
93                  continuous = false;
94                  break;
95                }
96              }
97
98              if (beginBitInInst == -1)
99                beginBitInInst = bit;
100              if (endBitInInst == -1)
101                endBitInInst = bit;
102              else {
103                if (endBitInInst == bit + 1)
104                  endBitInInst = bit;
105                else {
106                  continuous = false;
107                  break;
108                }
109              }
110
111              // maintain same distance between bits in field and bits in
112              // instruction. if the relative distances stay the same
113              // throughout,
114              if (beginBitInVar - (int)VBI->getBitNum() !=
115                  beginBitInInst - bit) {
116                continuous = false;
117                break;
118              }
119            }
120          }
121        }
122
123        // If we have found no bit in "Inst" which comes from this field, then
124        // this is not an operand!!
125        if (beginBitInInst != -1) {
126          o << "      // op" << op << ": " << Vals[i].getName() << "\n"
127            << "      int64_t op" << op
128            <<" = getMachineOpValue(MI, MI.getOperand("<<op<<"));\n";
129          //<< "   MachineOperand &op" << op <<" = MI.getOperand("<<op<<");\n";
130          OpOrder[Vals[i].getName()] = op++;
131
132          DEBUG(o << "      // Var: begin = " << beginBitInVar
133                  << ", end = " << endBitInVar
134                  << "; Inst: begin = " << beginBitInInst
135                  << ", end = " << endBitInInst << "\n");
136
137          if (continuous) {
138            DEBUG(o << "      // continuous: op" << OpOrder[Vals[i].getName()]
139                    << "\n");
140
141            // Mask off the right bits
142            // Low mask (ie. shift, if necessary)
143            assert(endBitInVar >= 0 && "Negative shift amount in masking!");
144            if (endBitInVar != 0) {
145              o << "      op" << OpOrder[Vals[i].getName()]
146                << " >>= " << endBitInVar << ";\n";
147              beginBitInVar -= endBitInVar;
148              endBitInVar = 0;
149            }
150
151            // High mask
152            o << "      op" << OpOrder[Vals[i].getName()]
153              << " &= (1<<" << beginBitInVar+1 << ") - 1;\n";
154
155            // Shift the value to the correct place (according to place in inst)
156            assert(endBitInInst >= 0 && "Negative shift amount in inst position!");
157            if (endBitInInst != 0)
158              o << "      op" << OpOrder[Vals[i].getName()]
159              << " <<= " << endBitInInst << ";\n";
160
161            // Just OR in the result
162            o << "      Value |= op" << OpOrder[Vals[i].getName()] << ";\n";
163          }
164
165          // otherwise, will be taken care of in the loop below using this
166          // value:
167          OpContinuous[Vals[i].getName()] = continuous;
168        }
169      }
170    }
171
172    for (unsigned f = 0, e = Vals.size(); f != e; ++f) {
173      if (Vals[f].getPrefix()) {
174        BitsInit *FieldInitializer = (BitsInit*)Vals[f].getValue();
175
176        // Scan through the field looking for bit initializers of the current
177        // variable...
178        for (int i = FieldInitializer->getNumBits()-1; i >= 0; --i) {
179          if (BitInit *BI = dynamic_cast<BitInit*>(FieldInitializer->getBit(i)))
180          {
181            DEBUG(o << "      // bit init: f: " << f << ", i: " << i << "\n");
182          } else if (UnsetInit *UI =
183                     dynamic_cast<UnsetInit*>(FieldInitializer->getBit(i))) {
184            DEBUG(o << "      // unset init: f: " << f << ", i: " << i << "\n");
185          } else if (VarBitInit *VBI =
186                     dynamic_cast<VarBitInit*>(FieldInitializer->getBit(i))) {
187            TypedInit *TI = VBI->getVariable();
188            if (VarInit *VI = dynamic_cast<VarInit*>(TI)) {
189              // If the bits of the field are laid out consecutively in the
190              // instruction, then instead of separately ORing in bits, just
191              // mask and shift the entire field for efficiency.
192              if (OpContinuous[VI->getName()]) {
193                // already taken care of in the loop above, thus there is no
194                // need to individually OR in the bits
195
196                // for debugging, output the regular version anyway, commented
197                DEBUG(o << "      // Value |= getValueBit(op"
198                        << OpOrder[VI->getName()] << ", " << VBI->getBitNum()
199                        << ")" << " << " << i << ";\n");
200              } else {
201                o << "      Value |= getValueBit(op" << OpOrder[VI->getName()]
202                  << ", " << VBI->getBitNum()
203                  << ")" << " << " << i << ";\n";
204              }
205            } else if (FieldInit *FI = dynamic_cast<FieldInit*>(TI)) {
206              // FIXME: implement this!
207              o << "FIELD INIT not implemented yet!\n";
208            } else {
209              o << "Error: UNIMPLEMENTED\n";
210            }
211          }
212        }
213      }
214    }
215
216    o << "      break;\n"
217      << "    }\n";
218  }
219
220  o << "  default:\n"
221    << "    std::cerr << \"Not supported instr: \" << MI << \"\\n\";\n"
222    << "    abort();\n"
223    << "  }\n"
224    << "  return Value;\n"
225    << "}\n";
226
227  EmitSourceFileTail(o);
228}
229
230} // End llvm namespace
231