r300_chipset.h revision 536d52702034a03d94866cb6cf8fc05502860320 
1/*
2 * Copyright 2008 Corbin Simpson <MostAwesomeDude@gmail.com>
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * on the rights to use, copy, modify, merge, publish, distribute, sub
8 * license, and/or sell copies of the Software, and to permit persons to whom
9 * the Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
13 * Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */
22
23#ifndef R300_CHIPSET_H
24#define R300_CHIPSET_H
25
26#include "pipe/p_compiler.h"
27
28/* these are sizes in dwords */
29#define R300_HIZ_LIMIT 10240
30#define RV530_HIZ_LIMIT 15360
31
32/* rv3xx have only one pipe */
33#define PIPE_ZMASK_SIZE 4096
34#define RV3xx_ZMASK_SIZE 5120
35
36/* Structure containing all the possible information about a specific Radeon
37 * in the R3xx, R4xx, and R5xx families. */
38struct r300_capabilities {
39    /* PCI ID */
40    uint32_t pci_id;
41    /* Chipset family */
42    int family;
43    /* The number of vertex floating-point units */
44    unsigned num_vert_fpus;
45    /* The number of fragment pipes */
46    unsigned num_frag_pipes;
47    /* The number of z pipes */
48    unsigned num_z_pipes;
49    /* The number of texture units. */
50    unsigned num_tex_units;
51    /* Whether or not TCL is physically present */
52    boolean has_tcl;
53    /* Some chipsets do not have HiZ RAM - other have varying amounts . */
54    int hiz_ram;
55    /*  some chipsets have zmask ram per pipe some don't */
56    int zmask_ram;
57    /* Whether or not this is RV350 or newer, including all r400 and r500
58     * chipsets. The differences compared to the oldest r300 chips are:
59     * - Blend LTE/GTE thresholds
60     * - Better MACRO_SWITCH in texture tiling
61     * - Half float vertex
62     * - More HyperZ optimizations */
63    boolean is_rv350;
64    /* Whether or not this is R400. The differences compared their rv350
65     * cousins are:
66     * - Extended fragment shader registers
67     * - 3DC texture compression (RGTC2) */
68    boolean is_r400;
69    /* Whether or not this is an RV515 or newer; R500s have many differences
70     * that require extra consideration, compared to their rv350 cousins:
71     * - Extra bit of width and height on texture sizes
72     * - Blend color is split across two registers
73     * - Universal Shader (US) block used for fragment shaders
74     * - FP16 blending and multisampling
75     * - Full RGTC texture compression
76     * - 24-bit depth textures
77     * - Stencil back-face reference value
78     * - Ability to render up to 2^24 - 1 vertices with signed index offset */
79    boolean is_r500;
80    /* Whether or not the second pixel pipe is accessed with the high bit */
81    boolean high_second_pipe;
82    /* DXTC texture swizzling. */
83    boolean dxtc_swizzle;
84    /* Index bias (AKA index offset). */
85    boolean index_bias_supported;
86};
87
88/* Enumerations for legibility and telling which card we're running on. */
89enum {
90    CHIP_FAMILY_R300 = 0,
91    CHIP_FAMILY_R350,
92    CHIP_FAMILY_R360,
93    CHIP_FAMILY_RV350,
94    CHIP_FAMILY_RV370,
95    CHIP_FAMILY_RV380,
96    CHIP_FAMILY_R420,
97    CHIP_FAMILY_R423,
98    CHIP_FAMILY_R430,
99    CHIP_FAMILY_R480,
100    CHIP_FAMILY_R481,
101    CHIP_FAMILY_RV410,
102    CHIP_FAMILY_RS400,
103    CHIP_FAMILY_RC410,
104    CHIP_FAMILY_RS480,
105    CHIP_FAMILY_RS482,
106    CHIP_FAMILY_RS600,
107    CHIP_FAMILY_RS690,
108    CHIP_FAMILY_RS740,
109    CHIP_FAMILY_RV515,
110    CHIP_FAMILY_R520,
111    CHIP_FAMILY_RV530,
112    CHIP_FAMILY_R580,
113    CHIP_FAMILY_RV560,
114    CHIP_FAMILY_RV570
115};
116
117void r300_parse_chipset(struct r300_capabilities* caps);
118
119#endif /* R300_CHIPSET_H */
120