r300_render.c revision 1345c5bf94dd848bdb601061c7ae654dadc6e542
1/* 2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 22 23/* r300_render: Vertex and index buffer primitive emission. Contains both 24 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */ 25 26#include "draw/draw_context.h" 27#include "draw/draw_vbuf.h" 28 29#include "util/u_inlines.h" 30 31#include "util/u_format.h" 32#include "util/u_memory.h" 33#include "util/u_upload_mgr.h" 34#include "util/u_prim.h" 35 36#include "r300_cs.h" 37#include "r300_context.h" 38#include "r300_screen_buffer.h" 39#include "r300_emit.h" 40#include "r300_reg.h" 41#include "r300_state_derived.h" 42 43static uint32_t r300_translate_primitive(unsigned prim) 44{ 45 switch (prim) { 46 case PIPE_PRIM_POINTS: 47 return R300_VAP_VF_CNTL__PRIM_POINTS; 48 case PIPE_PRIM_LINES: 49 return R300_VAP_VF_CNTL__PRIM_LINES; 50 case PIPE_PRIM_LINE_LOOP: 51 return R300_VAP_VF_CNTL__PRIM_LINE_LOOP; 52 case PIPE_PRIM_LINE_STRIP: 53 return R300_VAP_VF_CNTL__PRIM_LINE_STRIP; 54 case PIPE_PRIM_TRIANGLES: 55 return R300_VAP_VF_CNTL__PRIM_TRIANGLES; 56 case PIPE_PRIM_TRIANGLE_STRIP: 57 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP; 58 case PIPE_PRIM_TRIANGLE_FAN: 59 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN; 60 case PIPE_PRIM_QUADS: 61 return R300_VAP_VF_CNTL__PRIM_QUADS; 62 case PIPE_PRIM_QUAD_STRIP: 63 return R300_VAP_VF_CNTL__PRIM_QUAD_STRIP; 64 case PIPE_PRIM_POLYGON: 65 return R300_VAP_VF_CNTL__PRIM_POLYGON; 66 default: 67 return 0; 68 } 69} 70 71static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300, 72 unsigned mode) 73{ 74 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state; 75 uint32_t color_control = rs->color_control; 76 77 /* By default (see r300_state.c:r300_create_rs_state) color_control is 78 * initialized to provoking the first vertex. 79 * 80 * Triangle fans must be reduced to the second vertex, not the first, in 81 * Gallium flatshade-first mode, as per the GL spec. 82 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt) 83 * 84 * Quads never provoke correctly in flatshade-first mode. The first 85 * vertex is never considered as provoking, so only the second, third, 86 * and fourth vertices can be selected, and both "third" and "last" modes 87 * select the fourth vertex. This is probably due to D3D lacking quads. 88 * 89 * Similarly, polygons reduce to the first, not the last, vertex, when in 90 * "last" mode, and all other modes start from the second vertex. 91 * 92 * ~ C. 93 */ 94 95 if (rs->rs.flatshade_first) { 96 switch (mode) { 97 case PIPE_PRIM_TRIANGLE_FAN: 98 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND; 99 break; 100 case PIPE_PRIM_QUADS: 101 case PIPE_PRIM_QUAD_STRIP: 102 case PIPE_PRIM_POLYGON: 103 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST; 104 break; 105 default: 106 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST; 107 break; 108 } 109 } else { 110 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST; 111 } 112 113 return color_control; 114} 115 116static void r500_emit_index_offset(struct r300_context *r300, int index_bias) 117{ 118 CS_LOCALS(r300); 119 120 if (r300->screen->caps.is_r500 && 121 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0)) { 122 BEGIN_CS(2); 123 OUT_CS_REG(R500_VAP_INDEX_OFFSET, 124 (index_bias & 0xFFFFFF) | (index_bias < 0 ? 1<<24 : 0)); 125 END_CS; 126 } else { 127 if (index_bias) { 128 fprintf(stderr, "r300: Non-zero index bias is unsupported " 129 "on this hardware.\n"); 130 assert(0); 131 } 132 } 133} 134 135enum r300_prepare_flags { 136 PREP_FIRST_DRAW = (1 << 0), 137 PREP_VALIDATE_VBOS = (1 << 1), 138 PREP_EMIT_AOS = (1 << 2), 139 PREP_EMIT_AOS_SWTCL = (1 << 3), 140 PREP_INDEXED = (1 << 4) 141}; 142 143/* Check if the requested number of dwords is available in the CS and 144 * if not, flush. Then validate buffers and emit dirty state. 145 * Return TRUE if flush occured. */ 146static void r300_prepare_for_rendering(struct r300_context *r300, 147 enum r300_prepare_flags flags, 148 struct pipe_resource *index_buffer, 149 unsigned cs_dwords, 150 unsigned aos_offset, 151 int index_bias, 152 unsigned *end_cs_dwords) 153{ 154 boolean flushed = FALSE; 155 boolean first_draw = flags & PREP_FIRST_DRAW; 156 boolean emit_aos = flags & PREP_EMIT_AOS; 157 boolean emit_aos_swtcl = flags & PREP_EMIT_AOS_SWTCL; 158 unsigned end_dwords = 0; 159 160 /* Stencil ref fallback. */ 161 if (r300->stencil_ref_bf_fallback) { 162 cs_dwords = cs_dwords * 2 + 10; 163 } 164 165 /* Add dirty state, index offset, and AOS. */ 166 if (first_draw) { 167 cs_dwords += r300_get_num_dirty_dwords(r300); 168 169 if (r300->screen->caps.is_r500) 170 cs_dwords += 2; /* emit_index_offset */ 171 172 if (emit_aos) 173 cs_dwords += 55; /* emit_aos */ 174 175 if (emit_aos_swtcl) 176 cs_dwords += 7; /* emit_aos_swtcl */ 177 } 178 179 /* Emitted in flush. */ 180 end_dwords += 26; /* emit_query_end */ 181 182 cs_dwords += end_dwords; 183 184 /* Reserve requested CS space. */ 185 if (!r300_check_cs(r300, cs_dwords)) { 186 r300->context.flush(&r300->context, 0, NULL); 187 flushed = TRUE; 188 } 189 190 /* Validate buffers and emit dirty state if needed. */ 191 if (first_draw || flushed) { 192 r300_emit_buffer_validate(r300, flags & PREP_VALIDATE_VBOS, index_buffer); 193 r300_emit_dirty_state(r300); 194 r500_emit_index_offset(r300, index_bias); 195 if (emit_aos) 196 r300_emit_aos(r300, aos_offset, flags & PREP_INDEXED); 197 if (emit_aos_swtcl) 198 r300_emit_aos_swtcl(r300, flags & PREP_INDEXED); 199 } 200 201 if (end_cs_dwords) 202 *end_cs_dwords = end_dwords; 203} 204 205static boolean immd_is_good_idea(struct r300_context *r300, 206 unsigned count) 207{ 208 struct pipe_vertex_element* velem; 209 struct pipe_vertex_buffer* vbuf; 210 boolean checked[PIPE_MAX_ATTRIBS] = {0}; 211 unsigned vertex_element_count = r300->velems->count; 212 unsigned i, vbi; 213 214 if (DBG_ON(r300, DBG_NO_IMMD)) { 215 return FALSE; 216 } 217 218 if (r300->draw) { 219 return FALSE; 220 } 221 222 if (count > 10) { 223 return FALSE; 224 } 225 226 /* We shouldn't map buffers referenced by CS, busy buffers, 227 * and ones placed in VRAM. */ 228 /* XXX Check for VRAM buffers. */ 229 for (i = 0; i < vertex_element_count; i++) { 230 velem = &r300->velems->velem[i]; 231 vbi = velem->vertex_buffer_index; 232 233 if (!checked[vbi]) { 234 vbuf = &r300->vertex_buffer[vbi]; 235 236 if (r300_buffer_is_referenced(&r300->context, 237 vbuf->buffer, 238 R300_REF_CS | R300_REF_HW)) { 239 /* It's a very bad idea to map it... */ 240 return FALSE; 241 } 242 checked[vbi] = TRUE; 243 } 244 } 245 return TRUE; 246} 247 248/***************************************************************************** 249 * The emission of draw packets for r500. Older GPUs may use these functions * 250 * after resolving fallback issues (e.g. stencil ref two-sided). * 251 ****************************************************************************/ 252 253static void r500_emit_draw_arrays_immediate(struct r300_context *r300, 254 unsigned mode, 255 unsigned start, 256 unsigned count) 257{ 258 struct pipe_vertex_element* velem; 259 struct pipe_vertex_buffer* vbuf; 260 unsigned vertex_element_count = r300->velems->count; 261 unsigned i, v, vbi, dw, elem_offset, dwords; 262 263 /* Size of the vertex, in dwords. */ 264 unsigned vertex_size = 0; 265 266 /* Offsets of the attribute, in dwords, from the start of the vertex. */ 267 unsigned offset[PIPE_MAX_ATTRIBS]; 268 269 /* Size of the vertex element, in dwords. */ 270 unsigned size[PIPE_MAX_ATTRIBS]; 271 272 /* Stride to the same attrib in the next vertex in the vertex buffer, 273 * in dwords. */ 274 unsigned stride[PIPE_MAX_ATTRIBS] = {0}; 275 276 /* Mapped vertex buffers. */ 277 uint32_t* map[PIPE_MAX_ATTRIBS] = {0}; 278 struct pipe_transfer* transfer[PIPE_MAX_ATTRIBS] = {NULL}; 279 280 CS_LOCALS(r300); 281 282 /* Calculate the vertex size, offsets, strides etc. and map the buffers. */ 283 for (i = 0; i < vertex_element_count; i++) { 284 velem = &r300->velems->velem[i]; 285 offset[i] = velem->src_offset / 4; 286 size[i] = util_format_get_blocksize(velem->src_format) / 4; 287 vertex_size += size[i]; 288 vbi = velem->vertex_buffer_index; 289 290 /* Map the buffer. */ 291 if (!map[vbi]) { 292 vbuf = &r300->vertex_buffer[vbi]; 293 map[vbi] = (uint32_t*)pipe_buffer_map(&r300->context, 294 vbuf->buffer, 295 PIPE_TRANSFER_READ, 296 &transfer[vbi]); 297 map[vbi] += vbuf->buffer_offset / 4; 298 stride[vbi] = vbuf->stride / 4; 299 } 300 } 301 302 dwords = 9 + count * vertex_size; 303 304 r300_prepare_for_rendering(r300, PREP_FIRST_DRAW, NULL, dwords, 0, 0, NULL); 305 306 BEGIN_CS(dwords); 307 OUT_CS_REG(R300_GA_COLOR_CONTROL, 308 r300_provoking_vertex_fixes(r300, mode)); 309 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size); 310 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2); 311 OUT_CS(count - 1); 312 OUT_CS(0); 313 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, count * vertex_size); 314 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (count << 16) | 315 r300_translate_primitive(mode)); 316 317 /* Emit vertices. */ 318 for (v = 0; v < count; v++) { 319 for (i = 0; i < vertex_element_count; i++) { 320 velem = &r300->velems->velem[i]; 321 vbi = velem->vertex_buffer_index; 322 elem_offset = offset[i] + stride[vbi] * (v + start); 323 324 for (dw = 0; dw < size[i]; dw++) { 325 OUT_CS(map[vbi][elem_offset + dw]); 326 } 327 } 328 } 329 END_CS; 330 331 /* Unmap buffers. */ 332 for (i = 0; i < vertex_element_count; i++) { 333 vbi = r300->velems->velem[i].vertex_buffer_index; 334 335 if (map[vbi]) { 336 vbuf = &r300->vertex_buffer[vbi]; 337 pipe_buffer_unmap(&r300->context, vbuf->buffer, transfer[vbi]); 338 map[vbi] = NULL; 339 } 340 } 341} 342 343static void r500_emit_draw_arrays(struct r300_context *r300, 344 unsigned mode, 345 unsigned count) 346{ 347 boolean alt_num_verts = count > 65535; 348 CS_LOCALS(r300); 349 350 if (count >= (1 << 24)) { 351 fprintf(stderr, "r300: Got a huge number of vertices: %i, " 352 "refusing to render.\n", count); 353 return; 354 } 355 356 BEGIN_CS(7 + (alt_num_verts ? 2 : 0)); 357 if (alt_num_verts) { 358 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count); 359 } 360 OUT_CS_REG(R300_GA_COLOR_CONTROL, 361 r300_provoking_vertex_fixes(r300, mode)); 362 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2); 363 OUT_CS(count - 1); 364 OUT_CS(0); 365 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0); 366 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) | 367 r300_translate_primitive(mode) | 368 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0)); 369 END_CS; 370} 371 372static void r500_emit_draw_elements(struct r300_context *r300, 373 struct pipe_resource* indexBuffer, 374 unsigned indexSize, 375 unsigned minIndex, 376 unsigned maxIndex, 377 unsigned mode, 378 unsigned start, 379 unsigned count) 380{ 381 uint32_t count_dwords; 382 uint32_t offset_dwords = indexSize * start / sizeof(uint32_t); 383 boolean alt_num_verts = count > 65535; 384 CS_LOCALS(r300); 385 386 if (count >= (1 << 24)) { 387 fprintf(stderr, "r300: Got a huge number of vertices: %i, " 388 "refusing to render.\n", count); 389 return; 390 } 391 392 maxIndex = MIN2(maxIndex, r300->vertex_buffer_max_index); 393 394 DBG(r300, DBG_DRAW, "r300: Indexbuf of %u indices, min %u max %u\n", 395 count, minIndex, maxIndex); 396 397 BEGIN_CS(13 + (alt_num_verts ? 2 : 0)); 398 if (alt_num_verts) { 399 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count); 400 } 401 OUT_CS_REG(R300_GA_COLOR_CONTROL, 402 r300_provoking_vertex_fixes(r300, mode)); 403 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2); 404 OUT_CS(maxIndex); 405 OUT_CS(minIndex); 406 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0); 407 if (indexSize == 4) { 408 count_dwords = count; 409 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | 410 R300_VAP_VF_CNTL__INDEX_SIZE_32bit | 411 r300_translate_primitive(mode) | 412 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0)); 413 } else { 414 count_dwords = (count + 1) / 2; 415 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | 416 r300_translate_primitive(mode) | 417 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0)); 418 } 419 420 /* INDX_BUFFER is a truly special packet3. 421 * Unlike most other packet3, where the offset is after the count, 422 * the order is reversed, so the relocation ends up carrying the 423 * size of the indexbuf instead of the offset. 424 */ 425 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2); 426 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) | 427 (0 << R300_INDX_BUFFER_SKIP_SHIFT)); 428 OUT_CS(offset_dwords << 2); 429 OUT_CS_BUF_RELOC(indexBuffer, count_dwords, 430 RADEON_GEM_DOMAIN_GTT, 0, 0); 431 432 END_CS; 433} 434 435/***************************************************************************** 436 * The emission of draw packets for r300 which take care of the two-sided * 437 * stencil ref fallback and call r500's functions. * 438 ****************************************************************************/ 439 440/* Set drawing for front faces. */ 441static void r300_begin_stencil_ref_fallback(struct r300_context *r300) 442{ 443 struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state; 444 CS_LOCALS(r300); 445 446 BEGIN_CS(2); 447 OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode | R300_CULL_BACK); 448 END_CS; 449} 450 451/* Set drawing for back faces. */ 452static void r300_switch_stencil_ref_side(struct r300_context *r300) 453{ 454 struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state; 455 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state; 456 CS_LOCALS(r300); 457 458 BEGIN_CS(4); 459 OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode | R300_CULL_FRONT); 460 OUT_CS_REG(R300_ZB_STENCILREFMASK, 461 dsa->stencil_ref_bf | r300->stencil_ref.ref_value[1]); 462 END_CS; 463} 464 465/* Restore the original state. */ 466static void r300_end_stencil_ref_fallback(struct r300_context *r300) 467{ 468 struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state; 469 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state; 470 CS_LOCALS(r300); 471 472 BEGIN_CS(4); 473 OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode); 474 OUT_CS_REG(R300_ZB_STENCILREFMASK, 475 dsa->stencil_ref_mask | r300->stencil_ref.ref_value[0]); 476 END_CS; 477} 478 479static void r300_emit_draw_arrays_immediate(struct r300_context *r300, 480 unsigned mode, 481 unsigned start, 482 unsigned count) 483{ 484 if (!r300->stencil_ref_bf_fallback) { 485 r500_emit_draw_arrays_immediate(r300, mode, start, count); 486 } else { 487 r300_begin_stencil_ref_fallback(r300); 488 r500_emit_draw_arrays_immediate(r300, mode, start, count); 489 r300_switch_stencil_ref_side(r300); 490 r500_emit_draw_arrays_immediate(r300, mode, start, count); 491 r300_end_stencil_ref_fallback(r300); 492 } 493} 494 495static void r300_emit_draw_arrays(struct r300_context *r300, 496 unsigned mode, 497 unsigned count) 498{ 499 if (!r300->stencil_ref_bf_fallback) { 500 r500_emit_draw_arrays(r300, mode, count); 501 } else { 502 r300_begin_stencil_ref_fallback(r300); 503 r500_emit_draw_arrays(r300, mode, count); 504 r300_switch_stencil_ref_side(r300); 505 r500_emit_draw_arrays(r300, mode, count); 506 r300_end_stencil_ref_fallback(r300); 507 } 508} 509 510static void r300_emit_draw_elements(struct r300_context *r300, 511 struct pipe_resource* indexBuffer, 512 unsigned indexSize, 513 unsigned minIndex, 514 unsigned maxIndex, 515 unsigned mode, 516 unsigned start, 517 unsigned count) 518{ 519 if (!r300->stencil_ref_bf_fallback) { 520 r500_emit_draw_elements(r300, indexBuffer, indexSize, 521 minIndex, maxIndex, mode, start, count); 522 } else { 523 r300_begin_stencil_ref_fallback(r300); 524 r500_emit_draw_elements(r300, indexBuffer, indexSize, 525 minIndex, maxIndex, mode, start, count); 526 r300_switch_stencil_ref_side(r300); 527 r500_emit_draw_elements(r300, indexBuffer, indexSize, 528 minIndex, maxIndex, mode, start, count); 529 r300_end_stencil_ref_fallback(r300); 530 } 531} 532 533static void r300_shorten_ubyte_elts(struct r300_context* r300, 534 struct pipe_resource** elts, 535 unsigned start, 536 unsigned count) 537{ 538 struct pipe_context* context = &r300->context; 539 struct pipe_screen* screen = r300->context.screen; 540 struct pipe_resource* new_elts; 541 unsigned char *in_map; 542 unsigned short *out_map; 543 struct pipe_transfer *src_transfer, *dst_transfer; 544 unsigned i; 545 546 new_elts = pipe_buffer_create(screen, 547 PIPE_BIND_INDEX_BUFFER, 548 2 * count); 549 550 in_map = pipe_buffer_map(context, *elts, PIPE_TRANSFER_READ, &src_transfer); 551 out_map = pipe_buffer_map(context, new_elts, PIPE_TRANSFER_WRITE, &dst_transfer); 552 553 in_map += start; 554 555 for (i = 0; i < count; i++) { 556 *out_map = (unsigned short)*in_map; 557 in_map++; 558 out_map++; 559 } 560 561 pipe_buffer_unmap(context, *elts, src_transfer); 562 pipe_buffer_unmap(context, new_elts, dst_transfer); 563 564 *elts = new_elts; 565} 566 567static void r300_align_ushort_elts(struct r300_context *r300, 568 struct pipe_resource **elts, 569 unsigned start, unsigned count) 570{ 571 struct pipe_context* context = &r300->context; 572 struct pipe_transfer *in_transfer = NULL; 573 struct pipe_transfer *out_transfer = NULL; 574 struct pipe_resource* new_elts; 575 unsigned short *in_map; 576 unsigned short *out_map; 577 578 new_elts = pipe_buffer_create(context->screen, 579 PIPE_BIND_INDEX_BUFFER, 580 2 * count); 581 582 in_map = pipe_buffer_map(context, *elts, 583 PIPE_TRANSFER_READ, &in_transfer); 584 out_map = pipe_buffer_map(context, new_elts, 585 PIPE_TRANSFER_WRITE, &out_transfer); 586 587 memcpy(out_map, in_map+start, 2 * count); 588 589 pipe_buffer_unmap(context, *elts, in_transfer); 590 pipe_buffer_unmap(context, new_elts, out_transfer); 591 592 *elts = new_elts; 593} 594 595/* This is the fast-path drawing & emission for HW TCL. */ 596static void r300_draw_range_elements(struct pipe_context* pipe, 597 struct pipe_resource* indexBuffer, 598 unsigned indexSize, 599 int indexBias, 600 unsigned minIndex, 601 unsigned maxIndex, 602 unsigned mode, 603 unsigned start, 604 unsigned count) 605{ 606 struct r300_context* r300 = r300_context(pipe); 607 struct pipe_resource* orgIndexBuffer = indexBuffer; 608 boolean alt_num_verts = r300->screen->caps.is_r500 && 609 count > 65536 && 610 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0); 611 unsigned short_count; 612 613 if (r300->skip_rendering) { 614 return; 615 } 616 617 if (!u_trim_pipe_prim(mode, &count)) { 618 return; 619 } 620 621 if (indexSize == 1) { 622 r300_shorten_ubyte_elts(r300, &indexBuffer, start, count); 623 indexSize = 2; 624 start = 0; 625 } else if (indexSize == 2 && start % 2 != 0) { 626 r300_align_ushort_elts(r300, &indexBuffer, start, count); 627 start = 0; 628 } 629 630 r300_update_derived_state(r300); 631 r300_upload_index_buffer(r300, &indexBuffer, indexSize, start, count); 632 633 /* 15 dwords for emit_draw_elements */ 634 r300_prepare_for_rendering(r300, 635 PREP_FIRST_DRAW | PREP_VALIDATE_VBOS | PREP_EMIT_AOS | PREP_INDEXED, 636 indexBuffer, 15, 0, indexBias, NULL); 637 638 u_upload_flush(r300->upload_vb); 639 u_upload_flush(r300->upload_ib); 640 if (alt_num_verts || count <= 65535) { 641 r300->emit_draw_elements(r300, indexBuffer, indexSize, 642 minIndex, maxIndex, mode, start, count); 643 } else { 644 do { 645 short_count = MIN2(count, 65534); 646 r300->emit_draw_elements(r300, indexBuffer, indexSize, 647 minIndex, maxIndex, 648 mode, start, short_count); 649 650 start += short_count; 651 count -= short_count; 652 653 /* 15 dwords for emit_draw_elements */ 654 if (count) { 655 r300_prepare_for_rendering(r300, 656 PREP_VALIDATE_VBOS | PREP_EMIT_AOS | PREP_INDEXED, 657 indexBuffer, 15, 0, indexBias, NULL); 658 } 659 } while (count); 660 } 661 662 if (indexBuffer != orgIndexBuffer) { 663 pipe_resource_reference( &indexBuffer, NULL ); 664 } 665} 666 667/* Simple helpers for context setup. Should probably be moved to util. */ 668static void r300_draw_elements(struct pipe_context* pipe, 669 struct pipe_resource* indexBuffer, 670 unsigned indexSize, int indexBias, unsigned mode, 671 unsigned start, unsigned count) 672{ 673 struct r300_context *r300 = r300_context(pipe); 674 675 pipe->draw_range_elements(pipe, indexBuffer, indexSize, indexBias, 676 0, r300->vertex_buffer_max_index, 677 mode, start, count); 678} 679 680static void r300_draw_arrays(struct pipe_context* pipe, unsigned mode, 681 unsigned start, unsigned count) 682{ 683 struct r300_context* r300 = r300_context(pipe); 684 boolean alt_num_verts = r300->screen->caps.is_r500 && 685 count > 65536 && 686 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0); 687 unsigned short_count; 688 689 if (r300->skip_rendering) { 690 return; 691 } 692 693 if (!u_trim_pipe_prim(mode, &count)) { 694 return; 695 } 696 697 r300_update_derived_state(r300); 698 699 if (immd_is_good_idea(r300, count)) { 700 r300->emit_draw_arrays_immediate(r300, mode, start, count); 701 } else { 702 /* 9 spare dwords for emit_draw_arrays. */ 703 r300_prepare_for_rendering(r300, PREP_FIRST_DRAW | PREP_VALIDATE_VBOS | PREP_EMIT_AOS, 704 NULL, 9, start, 0, NULL); 705 706 if (alt_num_verts || count <= 65535) { 707 r300->emit_draw_arrays(r300, mode, count); 708 } else { 709 do { 710 short_count = MIN2(count, 65535); 711 r300->emit_draw_arrays(r300, mode, short_count); 712 713 start += short_count; 714 count -= short_count; 715 716 /* 9 spare dwords for emit_draw_arrays. */ 717 if (count) { 718 r300_prepare_for_rendering(r300, 719 PREP_VALIDATE_VBOS | PREP_EMIT_AOS, NULL, 9, 720 start, 0, NULL); 721 } 722 } while (count); 723 } 724 u_upload_flush(r300->upload_vb); 725 } 726} 727 728/**************************************************************************** 729 * The rest of this file is for SW TCL rendering only. Please be polite and * 730 * keep these functions separated so that they are easier to locate. ~C. * 731 ***************************************************************************/ 732 733/* SW TCL arrays, using Draw. */ 734static void r300_swtcl_draw_arrays(struct pipe_context* pipe, 735 unsigned mode, 736 unsigned start, 737 unsigned count) 738{ 739 struct r300_context* r300 = r300_context(pipe); 740 struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS]; 741 int i; 742 743 if (r300->skip_rendering) { 744 return; 745 } 746 747 if (!u_trim_pipe_prim(mode, &count)) { 748 return; 749 } 750 751 r300_update_derived_state(r300); 752 753 for (i = 0; i < r300->vertex_buffer_count; i++) { 754 void* buf = pipe_buffer_map(pipe, 755 r300->vertex_buffer[i].buffer, 756 PIPE_TRANSFER_READ, 757 &vb_transfer[i]); 758 draw_set_mapped_vertex_buffer(r300->draw, i, buf); 759 } 760 761 draw_set_mapped_element_buffer(r300->draw, 0, 0, NULL); 762 763 draw_arrays(r300->draw, mode, start, count); 764 765 /* XXX Not sure whether this is the best fix. 766 * It prevents CS from being rejected and weird assertion failures. */ 767 draw_flush(r300->draw); 768 769 for (i = 0; i < r300->vertex_buffer_count; i++) { 770 pipe_buffer_unmap(pipe, r300->vertex_buffer[i].buffer, 771 vb_transfer[i]); 772 draw_set_mapped_vertex_buffer(r300->draw, i, NULL); 773 } 774} 775 776/* SW TCL elements, using Draw. */ 777static void r300_swtcl_draw_range_elements(struct pipe_context* pipe, 778 struct pipe_resource* indexBuffer, 779 unsigned indexSize, 780 int indexBias, 781 unsigned minIndex, 782 unsigned maxIndex, 783 unsigned mode, 784 unsigned start, 785 unsigned count) 786{ 787 struct r300_context* r300 = r300_context(pipe); 788 struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS]; 789 struct pipe_transfer *ib_transfer; 790 int i; 791 void* indices; 792 793 if (r300->skip_rendering) { 794 return; 795 } 796 797 if (!u_trim_pipe_prim(mode, &count)) { 798 return; 799 } 800 801 r300_update_derived_state(r300); 802 803 for (i = 0; i < r300->vertex_buffer_count; i++) { 804 void* buf = pipe_buffer_map(pipe, 805 r300->vertex_buffer[i].buffer, 806 PIPE_TRANSFER_READ, 807 &vb_transfer[i]); 808 draw_set_mapped_vertex_buffer(r300->draw, i, buf); 809 } 810 811 indices = pipe_buffer_map(pipe, indexBuffer, 812 PIPE_TRANSFER_READ, &ib_transfer); 813 draw_set_mapped_element_buffer_range(r300->draw, indexSize, indexBias, 814 minIndex, maxIndex, indices); 815 816 draw_arrays(r300->draw, mode, start, count); 817 818 /* XXX Not sure whether this is the best fix. 819 * It prevents CS from being rejected and weird assertion failures. */ 820 draw_flush(r300->draw); 821 822 for (i = 0; i < r300->vertex_buffer_count; i++) { 823 pipe_buffer_unmap(pipe, r300->vertex_buffer[i].buffer, 824 vb_transfer[i]); 825 draw_set_mapped_vertex_buffer(r300->draw, i, NULL); 826 } 827 828 pipe_buffer_unmap(pipe, indexBuffer, 829 ib_transfer); 830 draw_set_mapped_element_buffer_range(r300->draw, 0, 0, 831 start, start + count - 1, 832 NULL); 833} 834 835/* Object for rendering using Draw. */ 836struct r300_render { 837 /* Parent class */ 838 struct vbuf_render base; 839 840 /* Pipe context */ 841 struct r300_context* r300; 842 843 /* Vertex information */ 844 size_t vertex_size; 845 unsigned prim; 846 unsigned hwprim; 847 848 /* VBO */ 849 struct pipe_resource* vbo; 850 size_t vbo_size; 851 size_t vbo_offset; 852 size_t vbo_max_used; 853 void * vbo_ptr; 854 855 struct pipe_transfer *vbo_transfer; 856}; 857 858static INLINE struct r300_render* 859r300_render(struct vbuf_render* render) 860{ 861 return (struct r300_render*)render; 862} 863 864static const struct vertex_info* 865r300_render_get_vertex_info(struct vbuf_render* render) 866{ 867 struct r300_render* r300render = r300_render(render); 868 struct r300_context* r300 = r300render->r300; 869 870 return &r300->vertex_info; 871} 872 873static boolean r300_render_allocate_vertices(struct vbuf_render* render, 874 ushort vertex_size, 875 ushort count) 876{ 877 struct r300_render* r300render = r300_render(render); 878 struct r300_context* r300 = r300render->r300; 879 struct pipe_screen* screen = r300->context.screen; 880 size_t size = (size_t)vertex_size * (size_t)count; 881 882 if (size + r300render->vbo_offset > r300render->vbo_size) 883 { 884 pipe_resource_reference(&r300->vbo, NULL); 885 r300render->vbo = pipe_buffer_create(screen, 886 PIPE_BIND_VERTEX_BUFFER, 887 R300_MAX_DRAW_VBO_SIZE); 888 r300render->vbo_offset = 0; 889 r300render->vbo_size = R300_MAX_DRAW_VBO_SIZE; 890 } 891 892 r300render->vertex_size = vertex_size; 893 r300->vbo = r300render->vbo; 894 r300->vbo_offset = r300render->vbo_offset; 895 896 return (r300render->vbo) ? TRUE : FALSE; 897} 898 899static void* r300_render_map_vertices(struct vbuf_render* render) 900{ 901 struct r300_render* r300render = r300_render(render); 902 903 assert(!r300render->vbo_transfer); 904 905 r300render->vbo_ptr = pipe_buffer_map(&r300render->r300->context, 906 r300render->vbo, 907 PIPE_TRANSFER_WRITE, 908 &r300render->vbo_transfer); 909 910 return ((uint8_t*)r300render->vbo_ptr + r300render->vbo_offset); 911} 912 913static void r300_render_unmap_vertices(struct vbuf_render* render, 914 ushort min, 915 ushort max) 916{ 917 struct r300_render* r300render = r300_render(render); 918 struct pipe_context* context = &r300render->r300->context; 919 920 assert(r300render->vbo_transfer); 921 922 r300render->vbo_max_used = MAX2(r300render->vbo_max_used, 923 r300render->vertex_size * (max + 1)); 924 pipe_buffer_unmap(context, r300render->vbo, r300render->vbo_transfer); 925 926 r300render->vbo_transfer = NULL; 927} 928 929static void r300_render_release_vertices(struct vbuf_render* render) 930{ 931 struct r300_render* r300render = r300_render(render); 932 933 r300render->vbo_offset += r300render->vbo_max_used; 934 r300render->vbo_max_used = 0; 935} 936 937static boolean r300_render_set_primitive(struct vbuf_render* render, 938 unsigned prim) 939{ 940 struct r300_render* r300render = r300_render(render); 941 942 r300render->prim = prim; 943 r300render->hwprim = r300_translate_primitive(prim); 944 945 return TRUE; 946} 947 948static void r500_render_draw_arrays(struct vbuf_render* render, 949 unsigned start, 950 unsigned count) 951{ 952 struct r300_render* r300render = r300_render(render); 953 struct r300_context* r300 = r300render->r300; 954 uint8_t* ptr; 955 unsigned i; 956 unsigned dwords = 6; 957 958 CS_LOCALS(r300); 959 960 (void) i; (void) ptr; 961 962 r300_prepare_for_rendering(r300, PREP_FIRST_DRAW | PREP_EMIT_AOS_SWTCL, 963 NULL, dwords, 0, 0, NULL); 964 965 DBG(r300, DBG_DRAW, "r300: Doing vbuf render, count %d\n", count); 966 967 /* Uncomment to dump all VBOs rendered through this interface. 968 * Slow and noisy! 969 ptr = pipe_buffer_map(&r300render->r300->context, 970 r300render->vbo, PIPE_TRANSFER_READ, 971 &r300render->vbo_transfer); 972 973 for (i = 0; i < count; i++) { 974 printf("r300: Vertex %d\n", i); 975 draw_dump_emitted_vertex(&r300->vertex_info, ptr); 976 ptr += r300->vertex_info.size * 4; 977 printf("\n"); 978 } 979 980 pipe_buffer_unmap(&r300render->r300->context, r300render->vbo, 981 r300render->vbo_transfer); 982 */ 983 984 BEGIN_CS(dwords); 985 OUT_CS_REG(R300_GA_COLOR_CONTROL, 986 r300_provoking_vertex_fixes(r300, r300render->prim)); 987 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1); 988 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0); 989 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) | 990 r300render->hwprim); 991 END_CS; 992} 993 994static void r500_render_draw_elements(struct vbuf_render* render, 995 const ushort* indices, 996 uint count) 997{ 998 struct r300_render* r300render = r300_render(render); 999 struct r300_context* r300 = r300render->r300; 1000 int i; 1001 unsigned end_cs_dwords; 1002 unsigned max_index = (r300render->vbo_size - r300render->vbo_offset) / 1003 (r300render->r300->vertex_info.size * 4) - 1; 1004 unsigned short_count; 1005 struct r300_cs_info cs_info; 1006 1007 CS_LOCALS(r300); 1008 1009 /* Reserve at least 256 dwords. 1010 * 1011 * Below we manage the CS space manually because there may be more 1012 * indices than it can fit in CS. */ 1013 r300_prepare_for_rendering(r300, 1014 PREP_FIRST_DRAW | PREP_EMIT_AOS_SWTCL | PREP_INDEXED, 1015 NULL, 256, 0, 0, &end_cs_dwords); 1016 1017 while (count) { 1018 r300->rws->get_cs_info(r300->rws, &cs_info); 1019 1020 short_count = MIN2(count, (cs_info.free - end_cs_dwords - 6) * 2); 1021 1022 BEGIN_CS(6 + (short_count+1)/2); 1023 OUT_CS_REG(R300_GA_COLOR_CONTROL, 1024 r300_provoking_vertex_fixes(r300, r300render->prim)); 1025 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max_index); 1026 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (short_count+1)/2); 1027 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (short_count << 16) | 1028 r300render->hwprim); 1029 for (i = 0; i < short_count-1; i += 2) { 1030 OUT_CS(indices[i+1] << 16 | indices[i]); 1031 } 1032 if (short_count % 2) { 1033 OUT_CS(indices[short_count-1]); 1034 } 1035 END_CS; 1036 1037 /* OK now subtract the emitted indices and see if we need to emit 1038 * another draw packet. */ 1039 indices += short_count; 1040 count -= short_count; 1041 1042 if (count) { 1043 r300_prepare_for_rendering(r300, 1044 PREP_EMIT_AOS_SWTCL | PREP_INDEXED, 1045 NULL, 256, 0, 0, &end_cs_dwords); 1046 } 1047 } 1048} 1049 1050static void r300_render_draw_arrays(struct vbuf_render* render, 1051 unsigned start, 1052 unsigned count) 1053{ 1054 struct r300_context* r300 = r300_render(render)->r300; 1055 1056 if (!r300->stencil_ref_bf_fallback) { 1057 r500_render_draw_arrays(render, start, count); 1058 } else { 1059 r300_begin_stencil_ref_fallback(r300); 1060 r500_render_draw_arrays(render, start, count); 1061 r300_switch_stencil_ref_side(r300); 1062 r500_render_draw_arrays(render, start, count); 1063 r300_end_stencil_ref_fallback(r300); 1064 } 1065} 1066 1067static void r300_render_draw_elements(struct vbuf_render* render, 1068 const ushort* indices, 1069 uint count) 1070{ 1071 struct r300_context* r300 = r300_render(render)->r300; 1072 1073 if (!r300->stencil_ref_bf_fallback) { 1074 r500_render_draw_elements(render, indices, count); 1075 } else { 1076 r300_begin_stencil_ref_fallback(r300); 1077 r500_render_draw_elements(render, indices, count); 1078 r300_switch_stencil_ref_side(r300); 1079 r500_render_draw_elements(render, indices, count); 1080 r300_end_stencil_ref_fallback(r300); 1081 } 1082} 1083 1084static void r300_render_destroy(struct vbuf_render* render) 1085{ 1086 FREE(render); 1087} 1088 1089static struct vbuf_render* r300_render_create(struct r300_context* r300) 1090{ 1091 struct r300_render* r300render = CALLOC_STRUCT(r300_render); 1092 1093 r300render->r300 = r300; 1094 1095 /* XXX find real numbers plz */ 1096 r300render->base.max_vertex_buffer_bytes = 128 * 1024; 1097 r300render->base.max_indices = 16 * 1024; 1098 1099 r300render->base.get_vertex_info = r300_render_get_vertex_info; 1100 r300render->base.allocate_vertices = r300_render_allocate_vertices; 1101 r300render->base.map_vertices = r300_render_map_vertices; 1102 r300render->base.unmap_vertices = r300_render_unmap_vertices; 1103 r300render->base.set_primitive = r300_render_set_primitive; 1104 if (r300->screen->caps.is_r500) { 1105 r300render->base.draw_elements = r500_render_draw_elements; 1106 r300render->base.draw_arrays = r500_render_draw_arrays; 1107 } else { 1108 r300render->base.draw_elements = r300_render_draw_elements; 1109 r300render->base.draw_arrays = r300_render_draw_arrays; 1110 } 1111 r300render->base.release_vertices = r300_render_release_vertices; 1112 r300render->base.destroy = r300_render_destroy; 1113 1114 r300render->vbo = NULL; 1115 r300render->vbo_size = 0; 1116 r300render->vbo_offset = 0; 1117 1118 return &r300render->base; 1119} 1120 1121struct draw_stage* r300_draw_stage(struct r300_context* r300) 1122{ 1123 struct vbuf_render* render; 1124 struct draw_stage* stage; 1125 1126 render = r300_render_create(r300); 1127 1128 if (!render) { 1129 return NULL; 1130 } 1131 1132 stage = draw_vbuf_stage(r300->draw, render); 1133 1134 if (!stage) { 1135 render->destroy(render); 1136 return NULL; 1137 } 1138 1139 draw_set_render(r300->draw, render); 1140 1141 return stage; 1142} 1143 1144void r300_init_render_functions(struct r300_context *r300) 1145{ 1146 if (r300->screen->caps.has_tcl) { 1147 r300->context.draw_arrays = r300_draw_arrays; 1148 r300->context.draw_elements = r300_draw_elements; 1149 r300->context.draw_range_elements = r300_draw_range_elements; 1150 1151 if (r300->screen->caps.is_r500) { 1152 r300->emit_draw_arrays_immediate = r500_emit_draw_arrays_immediate; 1153 r300->emit_draw_arrays = r500_emit_draw_arrays; 1154 r300->emit_draw_elements = r500_emit_draw_elements; 1155 } else { 1156 r300->emit_draw_arrays_immediate = r300_emit_draw_arrays_immediate; 1157 r300->emit_draw_arrays = r300_emit_draw_arrays; 1158 r300->emit_draw_elements = r300_emit_draw_elements; 1159 } 1160 } else { 1161 r300->context.draw_arrays = r300_swtcl_draw_arrays; 1162 r300->context.draw_elements = r300_draw_elements; 1163 r300->context.draw_range_elements = r300_swtcl_draw_range_elements; 1164 } 1165} 1166