r300_render.c revision 847a24c011fda1fa21995a3e54848f15e75dccc9
1/* 2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 22 23/* r300_render: Vertex and index buffer primitive emission. Contains both 24 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */ 25 26#include "draw/draw_context.h" 27#include "draw/draw_vbuf.h" 28 29#include "util/u_inlines.h" 30 31#include "util/u_format.h" 32#include "util/u_memory.h" 33#include "util/u_upload_mgr.h" 34#include "util/u_prim.h" 35 36#include "r300_cs.h" 37#include "r300_context.h" 38#include "r300_screen_buffer.h" 39#include "r300_emit.h" 40#include "r300_reg.h" 41#include "r300_render.h" 42#include "r300_state_derived.h" 43 44static uint32_t r300_translate_primitive(unsigned prim) 45{ 46 switch (prim) { 47 case PIPE_PRIM_POINTS: 48 return R300_VAP_VF_CNTL__PRIM_POINTS; 49 case PIPE_PRIM_LINES: 50 return R300_VAP_VF_CNTL__PRIM_LINES; 51 case PIPE_PRIM_LINE_LOOP: 52 return R300_VAP_VF_CNTL__PRIM_LINE_LOOP; 53 case PIPE_PRIM_LINE_STRIP: 54 return R300_VAP_VF_CNTL__PRIM_LINE_STRIP; 55 case PIPE_PRIM_TRIANGLES: 56 return R300_VAP_VF_CNTL__PRIM_TRIANGLES; 57 case PIPE_PRIM_TRIANGLE_STRIP: 58 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP; 59 case PIPE_PRIM_TRIANGLE_FAN: 60 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN; 61 case PIPE_PRIM_QUADS: 62 return R300_VAP_VF_CNTL__PRIM_QUADS; 63 case PIPE_PRIM_QUAD_STRIP: 64 return R300_VAP_VF_CNTL__PRIM_QUAD_STRIP; 65 case PIPE_PRIM_POLYGON: 66 return R300_VAP_VF_CNTL__PRIM_POLYGON; 67 default: 68 return 0; 69 } 70} 71 72static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300, 73 unsigned mode) 74{ 75 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state; 76 uint32_t color_control = rs->color_control; 77 78 /* By default (see r300_state.c:r300_create_rs_state) color_control is 79 * initialized to provoking the first vertex. 80 * 81 * Triangle fans must be reduced to the second vertex, not the first, in 82 * Gallium flatshade-first mode, as per the GL spec. 83 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt) 84 * 85 * Quads never provoke correctly in flatshade-first mode. The first 86 * vertex is never considered as provoking, so only the second, third, 87 * and fourth vertices can be selected, and both "third" and "last" modes 88 * select the fourth vertex. This is probably due to D3D lacking quads. 89 * 90 * Similarly, polygons reduce to the first, not the last, vertex, when in 91 * "last" mode, and all other modes start from the second vertex. 92 * 93 * ~ C. 94 */ 95 96 if (rs->rs.flatshade_first) { 97 switch (mode) { 98 case PIPE_PRIM_TRIANGLE_FAN: 99 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND; 100 break; 101 case PIPE_PRIM_QUADS: 102 case PIPE_PRIM_QUAD_STRIP: 103 case PIPE_PRIM_POLYGON: 104 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST; 105 break; 106 default: 107 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST; 108 break; 109 } 110 } else { 111 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST; 112 } 113 114 return color_control; 115} 116 117/* Check if the requested number of dwords is available in the CS and 118 * if not, flush. Return TRUE if the flush occured. */ 119static boolean r300_reserve_cs_space(struct r300_context *r300, 120 unsigned dwords) 121{ 122 if (!r300->rws->check_cs(r300->rws, dwords)) { 123 r300->context.flush(&r300->context, 0, NULL); 124 return TRUE; 125 } 126 return FALSE; 127} 128 129static boolean immd_is_good_idea(struct r300_context *r300, 130 unsigned count) 131{ 132 struct pipe_vertex_element* velem; 133 struct pipe_vertex_buffer* vbuf; 134 boolean checked[PIPE_MAX_ATTRIBS] = {0}; 135 unsigned vertex_element_count = r300->velems->count; 136 unsigned i, vbi; 137 138 if (count > 10 || DBG_ON(r300, DBG_NO_IMMD)) { 139 return FALSE; 140 } 141 142 /* We shouldn't map buffers referenced by CS, busy buffers, 143 * and ones placed in VRAM. */ 144 /* XXX Check for VRAM buffers. */ 145 for (i = 0; i < vertex_element_count; i++) { 146 velem = &r300->velems->velem[i]; 147 vbi = velem->vertex_buffer_index; 148 149 if (!checked[vbi]) { 150 vbuf = &r300->vertex_buffer[vbi]; 151 152 if (r300_buffer_is_referenced(&r300->context, 153 vbuf->buffer, 154 R300_REF_CS | R300_REF_HW)) { 155 /* It's a very bad idea to map it... */ 156 return FALSE; 157 } 158 checked[vbi] = TRUE; 159 } 160 } 161 return TRUE; 162} 163 164/***************************************************************************** 165 * The emission of draw packets for r500. Older GPUs may use these functions * 166 * after resolving fallback issues (e.g. stencil ref two-sided). * 167 ****************************************************************************/ 168 169static boolean r500_emit_index_offset(struct r300_context *r300, int indexBias) 170{ 171 CS_LOCALS(r300); 172 173 if (r300->screen->caps.is_r500 && 174 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0)) { 175 BEGIN_CS(2); 176 OUT_CS_REG(R500_VAP_INDEX_OFFSET, 177 (indexBias & 0xFFFFFF) | (indexBias < 0 ? 1<<24 : 0)); 178 END_CS; 179 } else { 180 if (indexBias) 181 return FALSE; /* Can't do anything :( */ 182 } 183 184 return TRUE; 185} 186 187void r500_emit_draw_arrays_immediate(struct r300_context *r300, 188 unsigned mode, 189 unsigned start, 190 unsigned count) 191{ 192 struct pipe_vertex_element* velem; 193 struct pipe_vertex_buffer* vbuf; 194 unsigned vertex_element_count = r300->velems->count; 195 unsigned i, v, vbi, dw, elem_offset, dwords; 196 197 /* Size of the vertex, in dwords. */ 198 unsigned vertex_size = 0; 199 200 /* Offsets of the attribute, in dwords, from the start of the vertex. */ 201 unsigned offset[PIPE_MAX_ATTRIBS]; 202 203 /* Size of the vertex element, in dwords. */ 204 unsigned size[PIPE_MAX_ATTRIBS]; 205 206 /* Stride to the same attrib in the next vertex in the vertex buffer, 207 * in dwords. */ 208 unsigned stride[PIPE_MAX_ATTRIBS] = {0}; 209 210 /* Mapped vertex buffers. */ 211 uint32_t* map[PIPE_MAX_ATTRIBS] = {0}; 212 struct pipe_transfer* transfer[PIPE_MAX_ATTRIBS] = {NULL}; 213 214 CS_LOCALS(r300); 215 216 /* Calculate the vertex size, offsets, strides etc. and map the buffers. */ 217 for (i = 0; i < vertex_element_count; i++) { 218 velem = &r300->velems->velem[i]; 219 offset[i] = velem->src_offset / 4; 220 size[i] = util_format_get_blocksize(velem->src_format) / 4; 221 vertex_size += size[i]; 222 vbi = velem->vertex_buffer_index; 223 224 /* Map the buffer. */ 225 if (!map[vbi]) { 226 vbuf = &r300->vertex_buffer[vbi]; 227 map[vbi] = (uint32_t*)pipe_buffer_map(&r300->context, 228 vbuf->buffer, 229 PIPE_TRANSFER_READ, 230 &transfer[vbi]); 231 map[vbi] += vbuf->buffer_offset / 4; 232 stride[vbi] = vbuf->stride / 4; 233 } 234 } 235 236 dwords = 9 + count * vertex_size; 237 238 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 2 + dwords); 239 r300_emit_buffer_validate(r300, FALSE, NULL); 240 r300_emit_dirty_state(r300); 241 242 r500_emit_index_offset(r300, 0); 243 244 BEGIN_CS(dwords); 245 OUT_CS_REG(R300_GA_COLOR_CONTROL, 246 r300_provoking_vertex_fixes(r300, mode)); 247 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size); 248 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2); 249 OUT_CS(count - 1); 250 OUT_CS(0); 251 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, count * vertex_size); 252 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (count << 16) | 253 r300_translate_primitive(mode)); 254 255 /* Emit vertices. */ 256 for (v = 0; v < count; v++) { 257 for (i = 0; i < vertex_element_count; i++) { 258 velem = &r300->velems->velem[i]; 259 vbi = velem->vertex_buffer_index; 260 elem_offset = offset[i] + stride[vbi] * (v + start); 261 262 for (dw = 0; dw < size[i]; dw++) { 263 OUT_CS(map[vbi][elem_offset + dw]); 264 } 265 } 266 } 267 END_CS; 268 269 /* Unmap buffers. */ 270 for (i = 0; i < vertex_element_count; i++) { 271 vbi = r300->velems->velem[i].vertex_buffer_index; 272 273 if (map[vbi]) { 274 vbuf = &r300->vertex_buffer[vbi]; 275 pipe_buffer_unmap(&r300->context, vbuf->buffer, transfer[vbi]); 276 map[vbi] = NULL; 277 } 278 } 279} 280 281void r500_emit_draw_arrays(struct r300_context *r300, 282 unsigned mode, 283 unsigned count) 284{ 285 boolean alt_num_verts = count > 65535; 286 CS_LOCALS(r300); 287 288 if (count >= (1 << 24)) { 289 fprintf(stderr, "r300: Got a huge number of vertices: %i, " 290 "refusing to render.\n", count); 291 return; 292 } 293 294 r500_emit_index_offset(r300, 0); 295 296 BEGIN_CS(7 + (alt_num_verts ? 2 : 0)); 297 if (alt_num_verts) { 298 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count); 299 } 300 OUT_CS_REG(R300_GA_COLOR_CONTROL, 301 r300_provoking_vertex_fixes(r300, mode)); 302 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2); 303 OUT_CS(count - 1); 304 OUT_CS(0); 305 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0); 306 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) | 307 r300_translate_primitive(mode) | 308 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0)); 309 END_CS; 310} 311 312void r500_emit_draw_elements(struct r300_context *r300, 313 struct pipe_resource* indexBuffer, 314 unsigned indexSize, 315 int indexBias, 316 unsigned minIndex, 317 unsigned maxIndex, 318 unsigned mode, 319 unsigned start, 320 unsigned count) 321{ 322 uint32_t count_dwords; 323 uint32_t offset_dwords = indexSize * start / sizeof(uint32_t); 324 boolean alt_num_verts = count > 65535; 325 CS_LOCALS(r300); 326 327 if (count >= (1 << 24)) { 328 fprintf(stderr, "r300: Got a huge number of vertices: %i, " 329 "refusing to render.\n", count); 330 return; 331 } 332 333 maxIndex = MIN2(maxIndex, r300->vertex_buffer_max_index); 334 335 DBG(r300, DBG_DRAW, "r300: Indexbuf of %u indices, min %u max %u\n", 336 count, minIndex, maxIndex); 337 338 if (!r500_emit_index_offset(r300, indexBias)) { 339 fprintf(stderr, "r300: Got a non-zero index bias, " 340 "refusing to render.\n"); 341 return; 342 } 343 344 BEGIN_CS(13 + (alt_num_verts ? 2 : 0)); 345 if (alt_num_verts) { 346 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count); 347 } 348 OUT_CS_REG(R300_GA_COLOR_CONTROL, 349 r300_provoking_vertex_fixes(r300, mode)); 350 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2); 351 OUT_CS(maxIndex); 352 OUT_CS(minIndex); 353 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0); 354 if (indexSize == 4) { 355 count_dwords = count; 356 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | 357 R300_VAP_VF_CNTL__INDEX_SIZE_32bit | 358 r300_translate_primitive(mode) | 359 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0)); 360 } else { 361 count_dwords = (count + 1) / 2; 362 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | 363 r300_translate_primitive(mode) | 364 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0)); 365 } 366 367 /* INDX_BUFFER is a truly special packet3. 368 * Unlike most other packet3, where the offset is after the count, 369 * the order is reversed, so the relocation ends up carrying the 370 * size of the indexbuf instead of the offset. 371 */ 372 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2); 373 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) | 374 (0 << R300_INDX_BUFFER_SKIP_SHIFT)); 375 OUT_CS(offset_dwords << 2); 376 OUT_CS_BUF_RELOC(indexBuffer, count_dwords, 377 RADEON_GEM_DOMAIN_GTT, 0, 0); 378 379 END_CS; 380} 381 382/***************************************************************************** 383 * The emission of draw packets for r300 which take care of the two-sided * 384 * stencil ref fallback and call r500's functions. * 385 ****************************************************************************/ 386 387/* Set drawing for front faces. */ 388static void r300_begin_stencil_ref_fallback(struct r300_context *r300) 389{ 390 struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state; 391 CS_LOCALS(r300); 392 393 BEGIN_CS(2); 394 OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode | R300_CULL_BACK); 395 END_CS; 396} 397 398/* Set drawing for back faces. */ 399static void r300_switch_stencil_ref_side(struct r300_context *r300) 400{ 401 struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state; 402 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state; 403 CS_LOCALS(r300); 404 405 BEGIN_CS(4); 406 OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode | R300_CULL_FRONT); 407 OUT_CS_REG(R300_ZB_STENCILREFMASK, 408 dsa->stencil_ref_bf | r300->stencil_ref.ref_value[1]); 409 END_CS; 410} 411 412/* Restore the original state. */ 413static void r300_end_stencil_ref_fallback(struct r300_context *r300) 414{ 415 struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state; 416 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state; 417 CS_LOCALS(r300); 418 419 BEGIN_CS(4); 420 OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode); 421 OUT_CS_REG(R300_ZB_STENCILREFMASK, 422 dsa->stencil_ref_mask | r300->stencil_ref.ref_value[0]); 423 END_CS; 424} 425 426void r300_emit_draw_arrays_immediate(struct r300_context *r300, 427 unsigned mode, 428 unsigned start, 429 unsigned count) 430{ 431 if (!r300->stencil_ref_bf_fallback) { 432 r500_emit_draw_arrays_immediate(r300, mode, start, count); 433 } else { 434 r300_begin_stencil_ref_fallback(r300); 435 r500_emit_draw_arrays_immediate(r300, mode, start, count); 436 r300_switch_stencil_ref_side(r300); 437 r500_emit_draw_arrays_immediate(r300, mode, start, count); 438 r300_end_stencil_ref_fallback(r300); 439 } 440} 441 442void r300_emit_draw_arrays(struct r300_context *r300, 443 unsigned mode, 444 unsigned count) 445{ 446 if (!r300->stencil_ref_bf_fallback) { 447 r500_emit_draw_arrays(r300, mode, count); 448 } else { 449 r300_begin_stencil_ref_fallback(r300); 450 r500_emit_draw_arrays(r300, mode, count); 451 r300_switch_stencil_ref_side(r300); 452 r500_emit_draw_arrays(r300, mode, count); 453 r300_end_stencil_ref_fallback(r300); 454 } 455} 456 457void r300_emit_draw_elements(struct r300_context *r300, 458 struct pipe_resource* indexBuffer, 459 unsigned indexSize, 460 int indexBias, 461 unsigned minIndex, 462 unsigned maxIndex, 463 unsigned mode, 464 unsigned start, 465 unsigned count) 466{ 467 if (!r300->stencil_ref_bf_fallback) { 468 r500_emit_draw_elements(r300, indexBuffer, indexSize, indexBias, 469 minIndex, maxIndex, mode, start, count); 470 } else { 471 r300_begin_stencil_ref_fallback(r300); 472 r500_emit_draw_elements(r300, indexBuffer, indexSize, indexBias, 473 minIndex, maxIndex, mode, start, count); 474 r300_switch_stencil_ref_side(r300); 475 r500_emit_draw_elements(r300, indexBuffer, indexSize, indexBias, 476 minIndex, maxIndex, mode, start, count); 477 r300_end_stencil_ref_fallback(r300); 478 } 479} 480 481static void r300_shorten_ubyte_elts(struct r300_context* r300, 482 struct pipe_resource** elts, 483 unsigned start, 484 unsigned count) 485{ 486 struct pipe_context* context = &r300->context; 487 struct pipe_screen* screen = r300->context.screen; 488 struct pipe_resource* new_elts; 489 unsigned char *in_map; 490 unsigned short *out_map; 491 struct pipe_transfer *src_transfer, *dst_transfer; 492 unsigned i; 493 494 new_elts = pipe_buffer_create(screen, 495 PIPE_BIND_INDEX_BUFFER, 496 2 * count); 497 498 in_map = pipe_buffer_map(context, *elts, PIPE_TRANSFER_READ, &src_transfer); 499 out_map = pipe_buffer_map(context, new_elts, PIPE_TRANSFER_WRITE, &dst_transfer); 500 501 in_map += start; 502 503 for (i = 0; i < count; i++) { 504 *out_map = (unsigned short)*in_map; 505 in_map++; 506 out_map++; 507 } 508 509 pipe_buffer_unmap(context, *elts, src_transfer); 510 pipe_buffer_unmap(context, new_elts, dst_transfer); 511 512 *elts = new_elts; 513} 514 515static void r300_align_ushort_elts(struct r300_context *r300, 516 struct pipe_resource **elts, 517 unsigned start, unsigned count) 518{ 519 struct pipe_context* context = &r300->context; 520 struct pipe_transfer *in_transfer = NULL; 521 struct pipe_transfer *out_transfer = NULL; 522 struct pipe_resource* new_elts; 523 unsigned short *in_map; 524 unsigned short *out_map; 525 526 new_elts = pipe_buffer_create(context->screen, 527 PIPE_BIND_INDEX_BUFFER, 528 2 * count); 529 530 in_map = pipe_buffer_map(context, *elts, 531 PIPE_TRANSFER_READ, &in_transfer); 532 out_map = pipe_buffer_map(context, new_elts, 533 PIPE_TRANSFER_WRITE, &out_transfer); 534 535 memcpy(out_map, in_map+start, 2 * count); 536 537 pipe_buffer_unmap(context, *elts, in_transfer); 538 pipe_buffer_unmap(context, new_elts, out_transfer); 539 540 *elts = new_elts; 541} 542 543/* This is the fast-path drawing & emission for HW TCL. */ 544void r300_draw_range_elements(struct pipe_context* pipe, 545 struct pipe_resource* indexBuffer, 546 unsigned indexSize, 547 int indexBias, 548 unsigned minIndex, 549 unsigned maxIndex, 550 unsigned mode, 551 unsigned start, 552 unsigned count) 553{ 554 struct r300_context* r300 = r300_context(pipe); 555 struct pipe_resource* orgIndexBuffer = indexBuffer; 556 boolean alt_num_verts = r300->screen->caps.is_r500 && 557 count > 65536 && 558 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0); 559 unsigned short_count; 560 561 if (r300->skip_rendering) { 562 return; 563 } 564 565 if (!u_trim_pipe_prim(mode, &count)) { 566 return; 567 } 568 569 if (indexSize == 1) { 570 r300_shorten_ubyte_elts(r300, &indexBuffer, start, count); 571 indexSize = 2; 572 start = 0; 573 } else if (indexSize == 2 && start % 2 != 0) { 574 r300_align_ushort_elts(r300, &indexBuffer, start, count); 575 start = 0; 576 } 577 578 r300_update_derived_state(r300); 579 580 r300_upload_index_buffer(r300, &indexBuffer, indexSize, start, count); 581 582 /* 128 dwords for emit_aos and emit_draw_elements */ 583 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 128); 584 r300_emit_buffer_validate(r300, TRUE, indexBuffer); 585 r300_emit_dirty_state(r300); 586 r300_emit_aos(r300, 0, TRUE); 587 588 u_upload_flush(r300->upload_vb); 589 u_upload_flush(r300->upload_ib); 590 if (alt_num_verts || count <= 65535) { 591 r300->emit_draw_elements(r300, indexBuffer, indexSize, indexBias, 592 minIndex, maxIndex, mode, start, count); 593 } else { 594 do { 595 short_count = MIN2(count, 65534); 596 r300->emit_draw_elements(r300, indexBuffer, indexSize, indexBias, 597 minIndex, maxIndex, 598 mode, start, short_count); 599 600 start += short_count; 601 count -= short_count; 602 603 /* 16 spare dwords are enough for emit_draw_elements. 604 * Also reserve some space for emit_query_end. */ 605 if (count && r300_reserve_cs_space(r300, 74)) { 606 r300_emit_buffer_validate(r300, TRUE, indexBuffer); 607 r300_emit_dirty_state(r300); 608 r300_emit_aos(r300, 0, TRUE); 609 } 610 } while (count); 611 } 612 613 if (indexBuffer != orgIndexBuffer) { 614 pipe_resource_reference( &indexBuffer, NULL ); 615 } 616} 617 618/* Simple helpers for context setup. Should probably be moved to util. */ 619void r300_draw_elements(struct pipe_context* pipe, 620 struct pipe_resource* indexBuffer, 621 unsigned indexSize, int indexBias, unsigned mode, 622 unsigned start, unsigned count) 623{ 624 struct r300_context *r300 = r300_context(pipe); 625 626 pipe->draw_range_elements(pipe, indexBuffer, indexSize, indexBias, 627 0, r300->vertex_buffer_max_index, 628 mode, start, count); 629} 630 631void r300_draw_arrays(struct pipe_context* pipe, unsigned mode, 632 unsigned start, unsigned count) 633{ 634 struct r300_context* r300 = r300_context(pipe); 635 boolean alt_num_verts = r300->screen->caps.is_r500 && 636 count > 65536 && 637 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0); 638 unsigned short_count; 639 640 if (r300->skip_rendering) { 641 return; 642 } 643 644 if (!u_trim_pipe_prim(mode, &count)) { 645 return; 646 } 647 648 r300_update_derived_state(r300); 649 650 if (immd_is_good_idea(r300, count)) { 651 r300->emit_draw_arrays_immediate(r300, mode, start, count); 652 } else { 653 /* Make sure there are at least 128 spare dwords in the command buffer. 654 * (most of it being consumed by emit_aos) */ 655 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 128); 656 r300_emit_buffer_validate(r300, TRUE, NULL); 657 r300_emit_dirty_state(r300); 658 659 if (alt_num_verts || count <= 65535) { 660 r300_emit_aos(r300, start, FALSE); 661 r300->emit_draw_arrays(r300, mode, count); 662 } else { 663 do { 664 short_count = MIN2(count, 65535); 665 r300_emit_aos(r300, start, FALSE); 666 r300->emit_draw_arrays(r300, mode, short_count); 667 668 start += short_count; 669 count -= short_count; 670 671 /* Again, we emit both AOS and draw_arrays so there should be 672 * at least 128 spare dwords. 673 * Also reserve some space for emit_query_end. */ 674 if (count && r300_reserve_cs_space(r300, 186)) { 675 r300_emit_buffer_validate(r300, TRUE, NULL); 676 r300_emit_dirty_state(r300); 677 } 678 } while (count); 679 } 680 u_upload_flush(r300->upload_vb); 681 } 682} 683 684/**************************************************************************** 685 * The rest of this file is for SW TCL rendering only. Please be polite and * 686 * keep these functions separated so that they are easier to locate. ~C. * 687 ***************************************************************************/ 688 689/* SW TCL arrays, using Draw. */ 690void r300_swtcl_draw_arrays(struct pipe_context* pipe, 691 unsigned mode, 692 unsigned start, 693 unsigned count) 694{ 695 struct r300_context* r300 = r300_context(pipe); 696 struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS]; 697 int i; 698 699 if (r300->skip_rendering) { 700 return; 701 } 702 703 if (!u_trim_pipe_prim(mode, &count)) { 704 return; 705 } 706 707 for (i = 0; i < r300->vertex_buffer_count; i++) { 708 void* buf = pipe_buffer_map(pipe, 709 r300->vertex_buffer[i].buffer, 710 PIPE_TRANSFER_READ, 711 &vb_transfer[i]); 712 draw_set_mapped_vertex_buffer(r300->draw, i, buf); 713 } 714 715 draw_set_mapped_element_buffer(r300->draw, 0, 0, NULL); 716 717 draw_arrays(r300->draw, mode, start, count); 718 719 for (i = 0; i < r300->vertex_buffer_count; i++) { 720 pipe_buffer_unmap(pipe, r300->vertex_buffer[i].buffer, 721 vb_transfer[i]); 722 draw_set_mapped_vertex_buffer(r300->draw, i, NULL); 723 } 724} 725 726/* SW TCL elements, using Draw. */ 727void r300_swtcl_draw_range_elements(struct pipe_context* pipe, 728 struct pipe_resource* indexBuffer, 729 unsigned indexSize, 730 int indexBias, 731 unsigned minIndex, 732 unsigned maxIndex, 733 unsigned mode, 734 unsigned start, 735 unsigned count) 736{ 737 struct r300_context* r300 = r300_context(pipe); 738 struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS]; 739 struct pipe_transfer *ib_transfer; 740 int i; 741 void* indices; 742 743 if (r300->skip_rendering) { 744 return; 745 } 746 747 if (!u_trim_pipe_prim(mode, &count)) { 748 return; 749 } 750 751 for (i = 0; i < r300->vertex_buffer_count; i++) { 752 void* buf = pipe_buffer_map(pipe, 753 r300->vertex_buffer[i].buffer, 754 PIPE_TRANSFER_READ, 755 &vb_transfer[i]); 756 draw_set_mapped_vertex_buffer(r300->draw, i, buf); 757 } 758 759 indices = pipe_buffer_map(pipe, indexBuffer, 760 PIPE_TRANSFER_READ, &ib_transfer); 761 draw_set_mapped_element_buffer_range(r300->draw, indexSize, indexBias, 762 minIndex, maxIndex, indices); 763 764 draw_arrays(r300->draw, mode, start, count); 765 766 for (i = 0; i < r300->vertex_buffer_count; i++) { 767 pipe_buffer_unmap(pipe, r300->vertex_buffer[i].buffer, 768 vb_transfer[i]); 769 draw_set_mapped_vertex_buffer(r300->draw, i, NULL); 770 } 771 772 pipe_buffer_unmap(pipe, indexBuffer, 773 ib_transfer); 774 draw_set_mapped_element_buffer_range(r300->draw, 0, 0, 775 start, start + count - 1, 776 NULL); 777} 778 779/* Object for rendering using Draw. */ 780struct r300_render { 781 /* Parent class */ 782 struct vbuf_render base; 783 784 /* Pipe context */ 785 struct r300_context* r300; 786 787 /* Vertex information */ 788 size_t vertex_size; 789 unsigned prim; 790 unsigned hwprim; 791 792 /* VBO */ 793 struct pipe_resource* vbo; 794 size_t vbo_size; 795 size_t vbo_offset; 796 size_t vbo_max_used; 797 void * vbo_ptr; 798 799 struct pipe_transfer *vbo_transfer; 800}; 801 802static INLINE struct r300_render* 803r300_render(struct vbuf_render* render) 804{ 805 return (struct r300_render*)render; 806} 807 808static const struct vertex_info* 809r300_render_get_vertex_info(struct vbuf_render* render) 810{ 811 struct r300_render* r300render = r300_render(render); 812 struct r300_context* r300 = r300render->r300; 813 814 r300_update_derived_state(r300); 815 816 return &r300->vertex_info; 817} 818 819static boolean r300_render_allocate_vertices(struct vbuf_render* render, 820 ushort vertex_size, 821 ushort count) 822{ 823 struct r300_render* r300render = r300_render(render); 824 struct r300_context* r300 = r300render->r300; 825 struct pipe_screen* screen = r300->context.screen; 826 size_t size = (size_t)vertex_size * (size_t)count; 827 828 if (size + r300render->vbo_offset > r300render->vbo_size) 829 { 830 pipe_resource_reference(&r300->vbo, NULL); 831 r300render->vbo = pipe_buffer_create(screen, 832 PIPE_BIND_VERTEX_BUFFER, 833 R300_MAX_DRAW_VBO_SIZE); 834 r300render->vbo_offset = 0; 835 r300render->vbo_size = R300_MAX_DRAW_VBO_SIZE; 836 } 837 838 r300render->vertex_size = vertex_size; 839 r300->vbo = r300render->vbo; 840 r300->vbo_offset = r300render->vbo_offset; 841 842 return (r300render->vbo) ? TRUE : FALSE; 843} 844 845static void* r300_render_map_vertices(struct vbuf_render* render) 846{ 847 struct r300_render* r300render = r300_render(render); 848 849 r300render->vbo_ptr = pipe_buffer_map(&r300render->r300->context, 850 r300render->vbo, 851 PIPE_TRANSFER_WRITE, 852 &r300render->vbo_transfer); 853 854 return ((uint8_t*)r300render->vbo_ptr + r300render->vbo_offset); 855} 856 857static void r300_render_unmap_vertices(struct vbuf_render* render, 858 ushort min, 859 ushort max) 860{ 861 struct r300_render* r300render = r300_render(render); 862 struct pipe_context* context = &r300render->r300->context; 863 CS_LOCALS(r300render->r300); 864 BEGIN_CS(2); 865 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max); 866 END_CS; 867 868 r300render->vbo_max_used = MAX2(r300render->vbo_max_used, 869 r300render->vertex_size * (max + 1)); 870 pipe_buffer_unmap(context, r300render->vbo, r300render->vbo_transfer); 871} 872 873static void r300_render_release_vertices(struct vbuf_render* render) 874{ 875 struct r300_render* r300render = r300_render(render); 876 877 r300render->vbo_offset += r300render->vbo_max_used; 878 r300render->vbo_max_used = 0; 879} 880 881static boolean r300_render_set_primitive(struct vbuf_render* render, 882 unsigned prim) 883{ 884 struct r300_render* r300render = r300_render(render); 885 886 r300render->prim = prim; 887 r300render->hwprim = r300_translate_primitive(prim); 888 889 return TRUE; 890} 891 892static void r500_render_draw_arrays(struct vbuf_render* render, 893 unsigned start, 894 unsigned count) 895{ 896 struct r300_render* r300render = r300_render(render); 897 struct r300_context* r300 = r300render->r300; 898 899 CS_LOCALS(r300); 900 901 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 2); 902 r300_emit_buffer_validate(r300, FALSE, NULL); 903 r300_emit_dirty_state(r300); 904 905 DBG(r300, DBG_DRAW, "r300: Doing vbuf render, count %d\n", count); 906 907 r500_emit_index_offset(r300, 0); 908 909 BEGIN_CS(2); 910 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0); 911 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) | 912 r300render->hwprim); 913 END_CS; 914} 915 916static void r500_render_draw(struct vbuf_render* render, 917 const ushort* indices, 918 uint count) 919{ 920 struct r300_render* r300render = r300_render(render); 921 struct r300_context* r300 = r300render->r300; 922 int i; 923 unsigned dwords = 2 + (count+1)/2; 924 925 CS_LOCALS(r300); 926 927 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + dwords); 928 r300_emit_buffer_validate(r300, FALSE, NULL); 929 r300_emit_dirty_state(r300); 930 931 r500_emit_index_offset(r300, 0); 932 933 BEGIN_CS(dwords); 934 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (count+1)/2); 935 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | 936 r300render->hwprim); 937 for (i = 0; i < count-1; i += 2) { 938 OUT_CS(indices[i+1] << 16 | indices[i]); 939 } 940 if (count % 2) { 941 OUT_CS(indices[count-1]); 942 } 943 END_CS; 944} 945 946static void r300_render_draw_arrays(struct vbuf_render* render, 947 unsigned start, 948 unsigned count) 949{ 950 struct r300_context* r300 = r300_render(render)->r300; 951 952 if (!r300->stencil_ref_bf_fallback) { 953 r500_render_draw_arrays(render, start, count); 954 } else { 955 r300_begin_stencil_ref_fallback(r300); 956 r500_render_draw_arrays(render, start, count); 957 r300_switch_stencil_ref_side(r300); 958 r500_render_draw_arrays(render, start, count); 959 r300_end_stencil_ref_fallback(r300); 960 } 961} 962 963static void r300_render_draw(struct vbuf_render* render, 964 const ushort* indices, 965 uint count) 966{ 967 struct r300_context* r300 = r300_render(render)->r300; 968 969 if (!r300->stencil_ref_bf_fallback) { 970 r500_render_draw(render, indices, count); 971 } else { 972 r300_begin_stencil_ref_fallback(r300); 973 r500_render_draw(render, indices, count); 974 r300_switch_stencil_ref_side(r300); 975 r500_render_draw(render, indices, count); 976 r300_end_stencil_ref_fallback(r300); 977 } 978} 979 980static void r300_render_destroy(struct vbuf_render* render) 981{ 982 FREE(render); 983} 984 985static struct vbuf_render* r300_render_create(struct r300_context* r300) 986{ 987 struct r300_render* r300render = CALLOC_STRUCT(r300_render); 988 989 r300render->r300 = r300; 990 991 /* XXX find real numbers plz */ 992 r300render->base.max_vertex_buffer_bytes = 128 * 1024; 993 r300render->base.max_indices = 16 * 1024; 994 995 r300render->base.get_vertex_info = r300_render_get_vertex_info; 996 r300render->base.allocate_vertices = r300_render_allocate_vertices; 997 r300render->base.map_vertices = r300_render_map_vertices; 998 r300render->base.unmap_vertices = r300_render_unmap_vertices; 999 r300render->base.set_primitive = r300_render_set_primitive; 1000 if (r300->screen->caps.is_r500) { 1001 r300render->base.draw = r500_render_draw; 1002 r300render->base.draw_arrays = r500_render_draw_arrays; 1003 } else { 1004 r300render->base.draw = r300_render_draw; 1005 r300render->base.draw_arrays = r300_render_draw_arrays; 1006 } 1007 r300render->base.release_vertices = r300_render_release_vertices; 1008 r300render->base.destroy = r300_render_destroy; 1009 1010 r300render->vbo = NULL; 1011 r300render->vbo_size = 0; 1012 r300render->vbo_offset = 0; 1013 1014 return &r300render->base; 1015} 1016 1017struct draw_stage* r300_draw_stage(struct r300_context* r300) 1018{ 1019 struct vbuf_render* render; 1020 struct draw_stage* stage; 1021 1022 render = r300_render_create(r300); 1023 1024 if (!render) { 1025 return NULL; 1026 } 1027 1028 stage = draw_vbuf_stage(r300->draw, render); 1029 1030 if (!stage) { 1031 render->destroy(render); 1032 return NULL; 1033 } 1034 1035 draw_set_render(r300->draw, render); 1036 1037 return stage; 1038} 1039