r300_render.c revision d173f1ba8a3d77e46f73ecb00378ea9598fe2c68
1/* 2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * Copyright 2010 Marek Olšák <maraeo@gmail.com> 4 * 5 * Permission is hereby granted, free of charge, to any person obtaining a 6 * copy of this software and associated documentation files (the "Software"), 7 * to deal in the Software without restriction, including without limitation 8 * on the rights to use, copy, modify, merge, publish, distribute, sub 9 * license, and/or sell copies of the Software, and to permit persons to whom 10 * the Software is furnished to do so, subject to the following conditions: 11 * 12 * The above copyright notice and this permission notice (including the next 13 * paragraph) shall be included in all copies or substantial portions of the 14 * Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 20 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 21 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 22 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 23 24/* r300_render: Vertex and index buffer primitive emission. Contains both 25 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */ 26 27#include "draw/draw_context.h" 28#include "draw/draw_vbuf.h" 29 30#include "util/u_inlines.h" 31 32#include "util/u_format.h" 33#include "util/u_memory.h" 34#include "util/u_upload_mgr.h" 35#include "util/u_prim.h" 36 37#include "r300_cs.h" 38#include "r300_context.h" 39#include "r300_screen_buffer.h" 40#include "r300_emit.h" 41#include "r300_reg.h" 42 43#include <limits.h> 44 45#define IMMD_DWORDS 32 46 47static uint32_t r300_translate_primitive(unsigned prim) 48{ 49 switch (prim) { 50 case PIPE_PRIM_POINTS: 51 return R300_VAP_VF_CNTL__PRIM_POINTS; 52 case PIPE_PRIM_LINES: 53 return R300_VAP_VF_CNTL__PRIM_LINES; 54 case PIPE_PRIM_LINE_LOOP: 55 return R300_VAP_VF_CNTL__PRIM_LINE_LOOP; 56 case PIPE_PRIM_LINE_STRIP: 57 return R300_VAP_VF_CNTL__PRIM_LINE_STRIP; 58 case PIPE_PRIM_TRIANGLES: 59 return R300_VAP_VF_CNTL__PRIM_TRIANGLES; 60 case PIPE_PRIM_TRIANGLE_STRIP: 61 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP; 62 case PIPE_PRIM_TRIANGLE_FAN: 63 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN; 64 case PIPE_PRIM_QUADS: 65 return R300_VAP_VF_CNTL__PRIM_QUADS; 66 case PIPE_PRIM_QUAD_STRIP: 67 return R300_VAP_VF_CNTL__PRIM_QUAD_STRIP; 68 case PIPE_PRIM_POLYGON: 69 return R300_VAP_VF_CNTL__PRIM_POLYGON; 70 default: 71 return 0; 72 } 73} 74 75static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300, 76 unsigned mode) 77{ 78 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state; 79 uint32_t color_control = rs->color_control; 80 81 /* By default (see r300_state.c:r300_create_rs_state) color_control is 82 * initialized to provoking the first vertex. 83 * 84 * Triangle fans must be reduced to the second vertex, not the first, in 85 * Gallium flatshade-first mode, as per the GL spec. 86 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt) 87 * 88 * Quads never provoke correctly in flatshade-first mode. The first 89 * vertex is never considered as provoking, so only the second, third, 90 * and fourth vertices can be selected, and both "third" and "last" modes 91 * select the fourth vertex. This is probably due to D3D lacking quads. 92 * 93 * Similarly, polygons reduce to the first, not the last, vertex, when in 94 * "last" mode, and all other modes start from the second vertex. 95 * 96 * ~ C. 97 */ 98 99 if (rs->rs.flatshade_first) { 100 switch (mode) { 101 case PIPE_PRIM_TRIANGLE_FAN: 102 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND; 103 break; 104 case PIPE_PRIM_QUADS: 105 case PIPE_PRIM_QUAD_STRIP: 106 case PIPE_PRIM_POLYGON: 107 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST; 108 break; 109 default: 110 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST; 111 break; 112 } 113 } else { 114 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST; 115 } 116 117 return color_control; 118} 119 120void r500_emit_index_bias(struct r300_context *r300, int index_bias) 121{ 122 CS_LOCALS(r300); 123 124 BEGIN_CS(2); 125 OUT_CS_REG(R500_VAP_INDEX_OFFSET, 126 (index_bias & 0xFFFFFF) | (index_bias < 0 ? 1<<24 : 0)); 127 END_CS; 128} 129 130static void r300_emit_draw_init(struct r300_context *r300, unsigned mode, 131 unsigned min_index, unsigned max_index) 132{ 133 CS_LOCALS(r300); 134 135 BEGIN_CS(5); 136 OUT_CS_REG(R300_GA_COLOR_CONTROL, 137 r300_provoking_vertex_fixes(r300, mode)); 138 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2); 139 OUT_CS(max_index); 140 OUT_CS(min_index); 141 END_CS; 142} 143 144/* This function splits the index bias value into two parts: 145 * - buffer_offset: the value that can be safely added to buffer offsets 146 * in r300_emit_vertex_arrays (it must yield a positive offset when added to 147 * a vertex buffer offset) 148 * - index_offset: the value that must be manually subtracted from indices 149 * in an index buffer to achieve negative offsets. */ 150static void r300_split_index_bias(struct r300_context *r300, int index_bias, 151 int *buffer_offset, int *index_offset) 152{ 153 struct pipe_vertex_buffer *vb, *vbufs = r300->vbuf_mgr->vertex_buffer; 154 struct pipe_vertex_element *velem = r300->velems->velem; 155 unsigned i, size; 156 int max_neg_bias; 157 158 if (index_bias < 0) { 159 /* See how large index bias we may subtract. We must be careful 160 * here because negative buffer offsets are not allowed 161 * by the DRM API. */ 162 max_neg_bias = INT_MAX; 163 for (i = 0; i < r300->velems->count; i++) { 164 vb = &vbufs[velem[i].vertex_buffer_index]; 165 size = (vb->buffer_offset + velem[i].src_offset) / vb->stride; 166 max_neg_bias = MIN2(max_neg_bias, size); 167 } 168 169 /* Now set the minimum allowed value. */ 170 *buffer_offset = MAX2(-max_neg_bias, index_bias); 171 } else { 172 /* A positive index bias is OK. */ 173 *buffer_offset = index_bias; 174 } 175 176 *index_offset = index_bias - *buffer_offset; 177} 178 179enum r300_prepare_flags { 180 PREP_FIRST_DRAW = (1 << 0), /* call emit_dirty_state and friends? */ 181 PREP_VALIDATE_VBOS = (1 << 1), /* validate VBOs? */ 182 PREP_EMIT_AOS = (1 << 2), /* call emit_vertex_arrays? */ 183 PREP_EMIT_AOS_SWTCL = (1 << 3), /* call emit_vertex_arrays_swtcl? */ 184 PREP_INDEXED = (1 << 4) /* is this draw_elements? */ 185}; 186 187/** 188 * Check if the requested number of dwords is available in the CS and 189 * if not, flush. 190 * \param r300 The context. 191 * \param flags See r300_prepare_flags. 192 * \param cs_dwords The number of dwords to reserve in CS. 193 * \return TRUE if the CS was flushed 194 */ 195static boolean r300_reserve_cs_dwords(struct r300_context *r300, 196 enum r300_prepare_flags flags, 197 unsigned cs_dwords) 198{ 199 boolean flushed = FALSE; 200 boolean first_draw = flags & PREP_FIRST_DRAW; 201 boolean emit_vertex_arrays = flags & PREP_EMIT_AOS; 202 boolean emit_vertex_arrays_swtcl = flags & PREP_EMIT_AOS_SWTCL; 203 204 /* Add dirty state, index offset, and AOS. */ 205 if (first_draw) { 206 cs_dwords += r300_get_num_dirty_dwords(r300); 207 208 if (r300->screen->caps.index_bias_supported) 209 cs_dwords += 2; /* emit_index_offset */ 210 211 if (emit_vertex_arrays) 212 cs_dwords += 55; /* emit_vertex_arrays */ 213 214 if (emit_vertex_arrays_swtcl) 215 cs_dwords += 7; /* emit_vertex_arrays_swtcl */ 216 } 217 218 cs_dwords += r300_get_num_cs_end_dwords(r300); 219 220 /* Reserve requested CS space. */ 221 if (cs_dwords > (R300_MAX_CMDBUF_DWORDS - r300->cs->cdw)) { 222 r300->context.flush(&r300->context, 0, NULL); 223 flushed = TRUE; 224 } 225 226 return flushed; 227} 228 229/** 230 * Validate buffers and emit dirty state. 231 * \param r300 The context. 232 * \param flags See r300_prepare_flags. 233 * \param index_buffer The index buffer to validate. The parameter may be NULL. 234 * \param buffer_offset The offset passed to emit_vertex_arrays. 235 * \param index_bias The index bias to emit. 236 * \return TRUE if rendering should be skipped 237 */ 238static boolean r300_emit_states(struct r300_context *r300, 239 enum r300_prepare_flags flags, 240 struct pipe_resource *index_buffer, 241 int buffer_offset, 242 int index_bias, 243 boolean user_buffers) 244{ 245 boolean first_draw = flags & PREP_FIRST_DRAW; 246 boolean emit_vertex_arrays = flags & PREP_EMIT_AOS; 247 boolean emit_vertex_arrays_swtcl = flags & PREP_EMIT_AOS_SWTCL; 248 boolean indexed = flags & PREP_INDEXED; 249 boolean validate_vbos = flags & PREP_VALIDATE_VBOS; 250 251 /* Validate buffers and emit dirty state if needed. */ 252 if (first_draw) { 253 if (r300->validate_buffers) { 254 if (!r300_emit_buffer_validate(r300, validate_vbos, 255 index_buffer)) { 256 fprintf(stderr, "r300: CS space validation failed. " 257 "(not enough memory?) Skipping rendering.\n"); 258 return FALSE; 259 } 260 261 /* Consider the validation done only if everything was validated. */ 262 if (validate_vbos) { 263 r300->validate_buffers = FALSE; 264 if (user_buffers) 265 r300->upload_vb_validated = TRUE; 266 if (r300->index_buffer.buffer && 267 r300_resource(r300->index_buffer.buffer)->b.user_ptr) { 268 r300->upload_ib_validated = TRUE; 269 } 270 } 271 } 272 273 r300_emit_dirty_state(r300); 274 if (r300->screen->caps.index_bias_supported) { 275 if (r300->screen->caps.has_tcl) 276 r500_emit_index_bias(r300, index_bias); 277 else 278 r500_emit_index_bias(r300, 0); 279 } 280 281 if (emit_vertex_arrays && 282 (r300->vertex_arrays_dirty || 283 r300->vertex_arrays_indexed != indexed || 284 r300->vertex_arrays_offset != buffer_offset)) { 285 r300_emit_vertex_arrays(r300, buffer_offset, indexed); 286 287 r300->vertex_arrays_dirty = FALSE; 288 r300->vertex_arrays_indexed = indexed; 289 r300->vertex_arrays_offset = buffer_offset; 290 } 291 292 if (emit_vertex_arrays_swtcl) 293 r300_emit_vertex_arrays_swtcl(r300, indexed); 294 } 295 296 return TRUE; 297} 298 299/** 300 * Check if the requested number of dwords is available in the CS and 301 * if not, flush. Then validate buffers and emit dirty state. 302 * \param r300 The context. 303 * \param flags See r300_prepare_flags. 304 * \param index_buffer The index buffer to validate. The parameter may be NULL. 305 * \param cs_dwords The number of dwords to reserve in CS. 306 * \param buffer_offset The offset passed to emit_vertex_arrays. 307 * \param index_bias The index bias to emit. 308 * \return TRUE if rendering should be skipped 309 */ 310static boolean r300_prepare_for_rendering(struct r300_context *r300, 311 enum r300_prepare_flags flags, 312 struct pipe_resource *index_buffer, 313 unsigned cs_dwords, 314 int buffer_offset, 315 int index_bias, 316 boolean user_buffers) 317{ 318 if (r300_reserve_cs_dwords(r300, flags, cs_dwords)) 319 flags |= PREP_FIRST_DRAW; 320 321 return r300_emit_states(r300, flags, index_buffer, buffer_offset, 322 index_bias, user_buffers); 323} 324 325static boolean immd_is_good_idea(struct r300_context *r300, 326 unsigned count) 327{ 328 struct pipe_vertex_element* velem; 329 struct pipe_resource *buf; 330 boolean checked[PIPE_MAX_ATTRIBS] = {0}; 331 unsigned vertex_element_count = r300->velems->count; 332 unsigned i, vbi; 333 334 if (DBG_ON(r300, DBG_NO_IMMD)) { 335 return FALSE; 336 } 337 338 if (r300->draw) { 339 return FALSE; 340 } 341 342 if (count * r300->velems->vertex_size_dwords > IMMD_DWORDS) { 343 return FALSE; 344 } 345 346 /* We shouldn't map buffers referenced by CS, busy buffers, 347 * and ones placed in VRAM. */ 348 for (i = 0; i < vertex_element_count; i++) { 349 velem = &r300->velems->velem[i]; 350 vbi = velem->vertex_buffer_index; 351 352 if (!checked[vbi]) { 353 buf = r300->vbuf_mgr->real_vertex_buffer[vbi]; 354 355 if ((r300_resource(buf)->domain != R300_DOMAIN_GTT)) { 356 return FALSE; 357 } 358 359 checked[vbi] = TRUE; 360 } 361 } 362 return TRUE; 363} 364 365/***************************************************************************** 366 * The HWTCL draw functions. * 367 ****************************************************************************/ 368 369static void r300_emit_draw_arrays_immediate(struct r300_context *r300, 370 unsigned mode, 371 unsigned start, 372 unsigned count) 373{ 374 struct pipe_vertex_element* velem; 375 struct pipe_vertex_buffer* vbuf; 376 unsigned vertex_element_count = r300->velems->count; 377 unsigned i, v, vbi; 378 379 /* Size of the vertex, in dwords. */ 380 unsigned vertex_size = r300->velems->vertex_size_dwords; 381 382 /* The number of dwords for this draw operation. */ 383 unsigned dwords = 4 + count * vertex_size; 384 385 /* Size of the vertex element, in dwords. */ 386 unsigned size[PIPE_MAX_ATTRIBS]; 387 388 /* Stride to the same attrib in the next vertex in the vertex buffer, 389 * in dwords. */ 390 unsigned stride[PIPE_MAX_ATTRIBS]; 391 392 /* Mapped vertex buffers. */ 393 uint32_t* map[PIPE_MAX_ATTRIBS]; 394 uint32_t* mapelem[PIPE_MAX_ATTRIBS]; 395 struct pipe_transfer* transfer[PIPE_MAX_ATTRIBS] = {0}; 396 397 CS_LOCALS(r300); 398 399 if (!r300_prepare_for_rendering(r300, PREP_FIRST_DRAW, NULL, dwords, 0, 0, 400 FALSE)) 401 return; 402 403 /* Calculate the vertex size, offsets, strides etc. and map the buffers. */ 404 for (i = 0; i < vertex_element_count; i++) { 405 velem = &r300->velems->velem[i]; 406 size[i] = r300->velems->format_size[i] / 4; 407 vbi = velem->vertex_buffer_index; 408 vbuf = &r300->vbuf_mgr->vertex_buffer[vbi]; 409 stride[i] = vbuf->stride / 4; 410 411 /* Map the buffer. */ 412 if (!transfer[vbi]) { 413 map[vbi] = (uint32_t*)pipe_buffer_map(&r300->context, 414 r300->vbuf_mgr->real_vertex_buffer[vbi], 415 PIPE_TRANSFER_READ | 416 PIPE_TRANSFER_UNSYNCHRONIZED, 417 &transfer[vbi]); 418 map[vbi] += (vbuf->buffer_offset / 4) + stride[i] * start; 419 } 420 mapelem[i] = map[vbi] + (velem->src_offset / 4); 421 } 422 423 r300_emit_draw_init(r300, mode, 0, count-1); 424 425 BEGIN_CS(dwords); 426 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size); 427 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, count * vertex_size); 428 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (count << 16) | 429 r300_translate_primitive(mode)); 430 431 /* Emit vertices. */ 432 for (v = 0; v < count; v++) { 433 for (i = 0; i < vertex_element_count; i++) { 434 OUT_CS_TABLE(&mapelem[i][stride[i] * v], size[i]); 435 } 436 } 437 END_CS; 438 439 /* Unmap buffers. */ 440 for (i = 0; i < vertex_element_count; i++) { 441 vbi = r300->velems->velem[i].vertex_buffer_index; 442 443 if (transfer[vbi]) { 444 pipe_buffer_unmap(&r300->context, transfer[vbi]); 445 transfer[vbi] = NULL; 446 } 447 } 448} 449 450static void r300_emit_draw_arrays(struct r300_context *r300, 451 unsigned mode, 452 unsigned count) 453{ 454 boolean alt_num_verts = count > 65535; 455 CS_LOCALS(r300); 456 457 if (count >= (1 << 24)) { 458 fprintf(stderr, "r300: Got a huge number of vertices: %i, " 459 "refusing to render.\n", count); 460 return; 461 } 462 463 r300_emit_draw_init(r300, mode, 0, count-1); 464 465 BEGIN_CS(2 + (alt_num_verts ? 2 : 0)); 466 if (alt_num_verts) { 467 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count); 468 } 469 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0); 470 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) | 471 r300_translate_primitive(mode) | 472 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0)); 473 END_CS; 474} 475 476static void r300_emit_draw_elements(struct r300_context *r300, 477 struct pipe_resource* indexBuffer, 478 unsigned indexSize, 479 unsigned minIndex, 480 unsigned maxIndex, 481 unsigned mode, 482 unsigned start, 483 unsigned count, 484 uint16_t *imm_indices3) 485{ 486 uint32_t count_dwords, offset_dwords; 487 boolean alt_num_verts = count > 65535; 488 CS_LOCALS(r300); 489 490 if (count >= (1 << 24) || maxIndex >= (1 << 24)) { 491 fprintf(stderr, "r300: Got a huge number of vertices: %i, " 492 "refusing to render (maxIndex: %i).\n", count, maxIndex); 493 return; 494 } 495 496 DBG(r300, DBG_DRAW, "r300: Indexbuf of %u indices, min %u max %u\n", 497 count, minIndex, maxIndex); 498 499 r300_emit_draw_init(r300, mode, minIndex, maxIndex); 500 501 /* If start is odd, render the first triangle with indices embedded 502 * in the command stream. This will increase start by 3 and make it 503 * even. We can then proceed without a fallback. */ 504 if (indexSize == 2 && (start & 1) && 505 mode == PIPE_PRIM_TRIANGLES) { 506 BEGIN_CS(4); 507 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 2); 508 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (3 << 16) | 509 R300_VAP_VF_CNTL__PRIM_TRIANGLES); 510 OUT_CS(imm_indices3[1] << 16 | imm_indices3[0]); 511 OUT_CS(imm_indices3[2]); 512 END_CS; 513 514 start += 3; 515 count -= 3; 516 if (!count) 517 return; 518 } 519 520 offset_dwords = indexSize * start / sizeof(uint32_t); 521 522 BEGIN_CS(8 + (alt_num_verts ? 2 : 0)); 523 if (alt_num_verts) { 524 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count); 525 } 526 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0); 527 if (indexSize == 4) { 528 count_dwords = count; 529 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | 530 R300_VAP_VF_CNTL__INDEX_SIZE_32bit | 531 r300_translate_primitive(mode) | 532 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0)); 533 } else { 534 count_dwords = (count + 1) / 2; 535 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | 536 r300_translate_primitive(mode) | 537 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0)); 538 } 539 540 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2); 541 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) | 542 (0 << R300_INDX_BUFFER_SKIP_SHIFT)); 543 OUT_CS(offset_dwords << 2); 544 OUT_CS(count_dwords); 545 OUT_CS_RELOC(r300_resource(indexBuffer)); 546 END_CS; 547} 548 549/* This is the fast-path drawing & emission for HW TCL. */ 550static void r300_draw_range_elements(struct pipe_context* pipe, 551 int indexBias, 552 unsigned minIndex, 553 unsigned maxIndex, 554 unsigned mode, 555 unsigned start, 556 unsigned count, 557 boolean user_buffers) 558{ 559 struct r300_context* r300 = r300_context(pipe); 560 struct pipe_resource *indexBuffer = r300->index_buffer.buffer; 561 unsigned indexSize = r300->index_buffer.index_size; 562 struct pipe_resource* orgIndexBuffer = indexBuffer; 563 boolean alt_num_verts = r300->screen->caps.is_r500 && 564 count > 65536 && 565 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0); 566 unsigned short_count; 567 int buffer_offset = 0, index_offset = 0; /* for index bias emulation */ 568 uint16_t indices3[3]; 569 570 if (indexBias && !r300->screen->caps.index_bias_supported) { 571 r300_split_index_bias(r300, indexBias, &buffer_offset, &index_offset); 572 } 573 574 r300_translate_index_buffer(r300, &indexBuffer, &indexSize, index_offset, 575 &start, count); 576 577 /* Fallback for misaligned ushort indices. */ 578 if (indexSize == 2 && (start & 1) && 579 !r300_resource(indexBuffer)->b.user_ptr) { 580 struct pipe_transfer *transfer; 581 struct pipe_resource *userbuf; 582 583 uint16_t *ptr = pipe_buffer_map(pipe, indexBuffer, 584 PIPE_TRANSFER_READ | 585 PIPE_TRANSFER_UNSYNCHRONIZED, 586 &transfer); 587 588 if (mode == PIPE_PRIM_TRIANGLES) { 589 memcpy(indices3, ptr + start, 6); 590 } else { 591 /* Copy the mapped index buffer directly to the upload buffer. 592 * The start index will be aligned simply from the fact that 593 * every sub-buffer in u_upload_mgr is aligned. */ 594 userbuf = pipe->screen->user_buffer_create(pipe->screen, 595 ptr, 0, 596 PIPE_BIND_INDEX_BUFFER); 597 indexBuffer = userbuf; 598 r300_upload_index_buffer(r300, &indexBuffer, indexSize, &start, count); 599 pipe_resource_reference(&userbuf, NULL); 600 } 601 pipe_buffer_unmap(pipe, transfer); 602 } else { 603 if (r300_resource(indexBuffer)->b.user_ptr) 604 r300_upload_index_buffer(r300, &indexBuffer, indexSize, &start, count); 605 } 606 607 /* 19 dwords for emit_draw_elements. Give up if the function fails. */ 608 if (!r300_prepare_for_rendering(r300, 609 PREP_FIRST_DRAW | PREP_VALIDATE_VBOS | PREP_EMIT_AOS | 610 PREP_INDEXED, indexBuffer, 19, buffer_offset, indexBias, user_buffers)) 611 goto done; 612 613 if (alt_num_verts || count <= 65535) { 614 r300_emit_draw_elements(r300, indexBuffer, indexSize, 615 minIndex, maxIndex, mode, start, count, indices3); 616 } else { 617 do { 618 if (indexSize == 2 && (start & 1)) 619 short_count = MIN2(count, 65535); 620 else 621 short_count = MIN2(count, 65534); 622 623 r300_emit_draw_elements(r300, indexBuffer, indexSize, 624 minIndex, maxIndex, 625 mode, start, short_count, indices3); 626 627 start += short_count; 628 count -= short_count; 629 630 /* 15 dwords for emit_draw_elements */ 631 if (count) { 632 if (!r300_prepare_for_rendering(r300, 633 PREP_VALIDATE_VBOS | PREP_EMIT_AOS | PREP_INDEXED, 634 indexBuffer, 19, buffer_offset, indexBias, user_buffers)) 635 goto done; 636 } 637 } while (count); 638 } 639 640done: 641 if (indexBuffer != orgIndexBuffer) { 642 pipe_resource_reference( &indexBuffer, NULL ); 643 } 644} 645 646static void r300_draw_arrays(struct pipe_context* pipe, unsigned mode, 647 unsigned start, unsigned count, 648 boolean user_buffers) 649{ 650 struct r300_context* r300 = r300_context(pipe); 651 boolean alt_num_verts = r300->screen->caps.is_r500 && 652 count > 65536 && 653 r300->rws->get_value(r300->rws, R300_VID_DRM_2_3_0); 654 unsigned short_count; 655 656 if (immd_is_good_idea(r300, count)) { 657 r300_emit_draw_arrays_immediate(r300, mode, start, count); 658 } else { 659 /* 9 spare dwords for emit_draw_arrays. Give up if the function fails. */ 660 if (!r300_prepare_for_rendering(r300, 661 PREP_FIRST_DRAW | PREP_VALIDATE_VBOS | PREP_EMIT_AOS, 662 NULL, 9, start, 0, user_buffers)) 663 return; 664 665 if (alt_num_verts || count <= 65535) { 666 r300_emit_draw_arrays(r300, mode, count); 667 } else { 668 do { 669 short_count = MIN2(count, 65535); 670 r300_emit_draw_arrays(r300, mode, short_count); 671 672 start += short_count; 673 count -= short_count; 674 675 /* 9 spare dwords for emit_draw_arrays. Give up if the function fails. */ 676 if (count) { 677 if (!r300_prepare_for_rendering(r300, 678 PREP_VALIDATE_VBOS | PREP_EMIT_AOS, NULL, 9, 679 start, 0, user_buffers)) 680 return; 681 } 682 } while (count); 683 } 684 } 685} 686 687static void r300_draw_vbo(struct pipe_context* pipe, 688 const struct pipe_draw_info *info) 689{ 690 struct r300_context* r300 = r300_context(pipe); 691 unsigned count = info->count; 692 boolean buffers_updated, uploader_flushed; 693 boolean indexed = info->indexed && r300->index_buffer.buffer; 694 695 if (r300->skip_rendering) { 696 return; 697 } 698 699 if (!u_trim_pipe_prim(info->mode, &count)) { 700 return; 701 } 702 703 u_vbuf_mgr_draw_begin(r300->vbuf_mgr, info, 704 &buffers_updated, &uploader_flushed); 705 706 if (buffers_updated) { 707 r300->vertex_arrays_dirty = TRUE; 708 709 if (uploader_flushed || !r300->upload_vb_validated) { 710 r300->upload_vb_validated = FALSE; 711 r300->validate_buffers = TRUE; 712 } 713 } else { 714 r300->upload_vb_validated = FALSE; 715 } 716 717 if (indexed) { 718 /* Compute the start for draw_elements, taking the offset into account. */ 719 unsigned start_indexed = 720 info->start + 721 (r300->index_buffer.offset / r300->index_buffer.index_size); 722 int max_index = MIN2(r300->vbuf_mgr->max_index, info->max_index); 723 724 assert(r300->index_buffer.offset % r300->index_buffer.index_size == 0); 725 726 /* Index buffer range checking. */ 727 if ((start_indexed + count) * r300->index_buffer.index_size > 728 r300->index_buffer.buffer->width0) { 729 fprintf(stderr, "r300: Invalid index buffer range. Skipping rendering.\n"); 730 return; 731 } 732 733 if (max_index >= (1 << 24) - 1) { 734 fprintf(stderr, "r300: Invalid max_index: %i. Skipping rendering...\n", max_index); 735 return; 736 } 737 738 r300_update_derived_state(r300); 739 r300_draw_range_elements(pipe, info->index_bias, info->min_index, 740 max_index, info->mode, start_indexed, count, 741 buffers_updated); 742 } else { 743 r300_update_derived_state(r300); 744 r300_draw_arrays(pipe, info->mode, info->start, count, buffers_updated); 745 } 746 747 u_vbuf_mgr_draw_end(r300->vbuf_mgr); 748} 749 750/**************************************************************************** 751 * The rest of this file is for SW TCL rendering only. Please be polite and * 752 * keep these functions separated so that they are easier to locate. ~C. * 753 ***************************************************************************/ 754 755/* SW TCL elements, using Draw. */ 756static void r300_swtcl_draw_vbo(struct pipe_context* pipe, 757 const struct pipe_draw_info *info) 758{ 759 struct r300_context* r300 = r300_context(pipe); 760 struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS]; 761 struct pipe_transfer *ib_transfer = NULL; 762 unsigned count = info->count; 763 int i; 764 void *indices = NULL; 765 boolean indexed = info->indexed && r300->index_buffer.buffer; 766 767 if (r300->skip_rendering) { 768 return; 769 } 770 771 if (!u_trim_pipe_prim(info->mode, &count)) { 772 return; 773 } 774 775 r300_update_derived_state(r300); 776 777 r300_reserve_cs_dwords(r300, 778 PREP_FIRST_DRAW | PREP_EMIT_AOS_SWTCL | 779 (indexed ? PREP_INDEXED : 0), 780 indexed ? 256 : 6); 781 782 for (i = 0; i < r300->vbuf_mgr->nr_vertex_buffers; i++) { 783 if (r300->vbuf_mgr->vertex_buffer[i].buffer) { 784 void *buf = pipe_buffer_map(pipe, 785 r300->vbuf_mgr->vertex_buffer[i].buffer, 786 PIPE_TRANSFER_READ | 787 PIPE_TRANSFER_UNSYNCHRONIZED, 788 &vb_transfer[i]); 789 draw_set_mapped_vertex_buffer(r300->draw, i, buf); 790 } 791 } 792 793 if (indexed) { 794 indices = pipe_buffer_map(pipe, r300->index_buffer.buffer, 795 PIPE_TRANSFER_READ | 796 PIPE_TRANSFER_UNSYNCHRONIZED, &ib_transfer); 797 } 798 799 draw_set_mapped_index_buffer(r300->draw, indices); 800 801 r300->draw_vbo_locked = TRUE; 802 r300->draw_first_emitted = FALSE; 803 draw_vbo(r300->draw, info); 804 draw_flush(r300->draw); 805 r300->draw_vbo_locked = FALSE; 806 807 for (i = 0; i < r300->vbuf_mgr->nr_vertex_buffers; i++) { 808 if (r300->vbuf_mgr->vertex_buffer[i].buffer) { 809 pipe_buffer_unmap(pipe, vb_transfer[i]); 810 draw_set_mapped_vertex_buffer(r300->draw, i, NULL); 811 } 812 } 813 814 if (indexed) { 815 pipe_buffer_unmap(pipe, ib_transfer); 816 draw_set_mapped_index_buffer(r300->draw, NULL); 817 } 818} 819 820/* Object for rendering using Draw. */ 821struct r300_render { 822 /* Parent class */ 823 struct vbuf_render base; 824 825 /* Pipe context */ 826 struct r300_context* r300; 827 828 /* Vertex information */ 829 size_t vertex_size; 830 unsigned prim; 831 unsigned hwprim; 832 833 /* VBO */ 834 size_t vbo_max_used; 835 void * vbo_ptr; 836 837 struct pipe_transfer *vbo_transfer; 838}; 839 840static INLINE struct r300_render* 841r300_render(struct vbuf_render* render) 842{ 843 return (struct r300_render*)render; 844} 845 846static const struct vertex_info* 847r300_render_get_vertex_info(struct vbuf_render* render) 848{ 849 struct r300_render* r300render = r300_render(render); 850 struct r300_context* r300 = r300render->r300; 851 852 return &r300->vertex_info; 853} 854 855static boolean r300_render_allocate_vertices(struct vbuf_render* render, 856 ushort vertex_size, 857 ushort count) 858{ 859 struct r300_render* r300render = r300_render(render); 860 struct r300_context* r300 = r300render->r300; 861 struct pipe_screen* screen = r300->context.screen; 862 size_t size = (size_t)vertex_size * (size_t)count; 863 864 DBG(r300, DBG_DRAW, "r300: render_allocate_vertices (size: %d)\n", size); 865 866 if (size + r300->draw_vbo_offset > r300->draw_vbo_size) 867 { 868 pipe_resource_reference(&r300->vbo, NULL); 869 r300->vbo = pipe_buffer_create(screen, 870 PIPE_BIND_VERTEX_BUFFER, 871 R300_MAX_DRAW_VBO_SIZE); 872 r300->draw_vbo_offset = 0; 873 r300->draw_vbo_size = R300_MAX_DRAW_VBO_SIZE; 874 r300->validate_buffers = TRUE; 875 } 876 877 r300render->vertex_size = vertex_size; 878 879 return (r300->vbo) ? TRUE : FALSE; 880} 881 882static void* r300_render_map_vertices(struct vbuf_render* render) 883{ 884 struct r300_render* r300render = r300_render(render); 885 struct r300_context* r300 = r300render->r300; 886 887 assert(!r300render->vbo_transfer); 888 889 DBG(r300, DBG_DRAW, "r300: render_map_vertices\n"); 890 891 r300render->vbo_ptr = pipe_buffer_map(&r300render->r300->context, 892 r300->vbo, 893 PIPE_TRANSFER_WRITE | 894 PIPE_TRANSFER_UNSYNCHRONIZED, 895 &r300render->vbo_transfer); 896 897 assert(r300render->vbo_ptr); 898 899 return ((uint8_t*)r300render->vbo_ptr + r300->draw_vbo_offset); 900} 901 902static void r300_render_unmap_vertices(struct vbuf_render* render, 903 ushort min, 904 ushort max) 905{ 906 struct r300_render* r300render = r300_render(render); 907 struct pipe_context* context = &r300render->r300->context; 908 struct r300_context* r300 = r300render->r300; 909 910 assert(r300render->vbo_transfer); 911 912 DBG(r300, DBG_DRAW, "r300: render_unmap_vertices\n"); 913 914 r300render->vbo_max_used = MAX2(r300render->vbo_max_used, 915 r300render->vertex_size * (max + 1)); 916 pipe_buffer_unmap(context, r300render->vbo_transfer); 917 918 r300render->vbo_transfer = NULL; 919} 920 921static void r300_render_release_vertices(struct vbuf_render* render) 922{ 923 struct r300_render* r300render = r300_render(render); 924 struct r300_context* r300 = r300render->r300; 925 926 DBG(r300, DBG_DRAW, "r300: render_release_vertices\n"); 927 928 r300->draw_vbo_offset += r300render->vbo_max_used; 929 r300render->vbo_max_used = 0; 930} 931 932static boolean r300_render_set_primitive(struct vbuf_render* render, 933 unsigned prim) 934{ 935 struct r300_render* r300render = r300_render(render); 936 937 r300render->prim = prim; 938 r300render->hwprim = r300_translate_primitive(prim); 939 940 return TRUE; 941} 942 943static void r300_render_draw_arrays(struct vbuf_render* render, 944 unsigned start, 945 unsigned count) 946{ 947 struct r300_render* r300render = r300_render(render); 948 struct r300_context* r300 = r300render->r300; 949 uint8_t* ptr; 950 unsigned i; 951 unsigned dwords = 6; 952 953 CS_LOCALS(r300); 954 (void) i; (void) ptr; 955 956 DBG(r300, DBG_DRAW, "r300: render_draw_arrays (count: %d)\n", count); 957 958 if (r300->draw_first_emitted) { 959 if (!r300_prepare_for_rendering(r300, 960 PREP_FIRST_DRAW | PREP_EMIT_AOS_SWTCL, 961 NULL, dwords, 0, 0, FALSE)) 962 return; 963 } else { 964 if (!r300_emit_states(r300, 965 PREP_FIRST_DRAW | PREP_EMIT_AOS_SWTCL, 966 NULL, 0, 0, FALSE)) 967 return; 968 } 969 970 BEGIN_CS(dwords); 971 OUT_CS_REG(R300_GA_COLOR_CONTROL, 972 r300_provoking_vertex_fixes(r300, r300render->prim)); 973 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, count - 1); 974 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0); 975 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) | 976 r300render->hwprim); 977 END_CS; 978 979 r300->draw_first_emitted = TRUE; 980} 981 982static void r300_render_draw_elements(struct vbuf_render* render, 983 const ushort* indices, 984 uint count) 985{ 986 struct r300_render* r300render = r300_render(render); 987 struct r300_context* r300 = r300render->r300; 988 int i; 989 unsigned end_cs_dwords; 990 unsigned max_index = (r300->draw_vbo_size - r300->draw_vbo_offset) / 991 (r300render->r300->vertex_info.size * 4) - 1; 992 unsigned short_count; 993 unsigned free_dwords; 994 995 CS_LOCALS(r300); 996 DBG(r300, DBG_DRAW, "r300: render_draw_elements (count: %d)\n", count); 997 998 if (r300->draw_first_emitted) { 999 if (!r300_prepare_for_rendering(r300, 1000 PREP_FIRST_DRAW | PREP_EMIT_AOS_SWTCL | PREP_INDEXED, 1001 NULL, 256, 0, 0, FALSE)) 1002 return; 1003 } else { 1004 if (!r300_emit_states(r300, 1005 PREP_FIRST_DRAW | PREP_EMIT_AOS_SWTCL | PREP_INDEXED, 1006 NULL, 0, 0, FALSE)) 1007 return; 1008 } 1009 1010 /* Below we manage the CS space manually because there may be more 1011 * indices than it can fit in CS. */ 1012 1013 end_cs_dwords = r300_get_num_cs_end_dwords(r300); 1014 1015 while (count) { 1016 free_dwords = R300_MAX_CMDBUF_DWORDS - r300->cs->cdw; 1017 1018 short_count = MIN2(count, (free_dwords - end_cs_dwords - 6) * 2); 1019 1020 BEGIN_CS(6 + (short_count+1)/2); 1021 OUT_CS_REG(R300_GA_COLOR_CONTROL, 1022 r300_provoking_vertex_fixes(r300, r300render->prim)); 1023 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max_index); 1024 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (short_count+1)/2); 1025 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (short_count << 16) | 1026 r300render->hwprim); 1027 for (i = 0; i < short_count-1; i += 2) { 1028 OUT_CS(indices[i+1] << 16 | indices[i]); 1029 } 1030 if (short_count % 2) { 1031 OUT_CS(indices[short_count-1]); 1032 } 1033 END_CS; 1034 1035 /* OK now subtract the emitted indices and see if we need to emit 1036 * another draw packet. */ 1037 indices += short_count; 1038 count -= short_count; 1039 1040 if (count) { 1041 if (!r300_prepare_for_rendering(r300, 1042 PREP_EMIT_AOS_SWTCL | PREP_INDEXED, 1043 NULL, 256, 0, 0, FALSE)) 1044 return; 1045 1046 end_cs_dwords = r300_get_num_cs_end_dwords(r300); 1047 } 1048 } 1049 1050 r300->draw_first_emitted = TRUE; 1051} 1052 1053static void r300_render_destroy(struct vbuf_render* render) 1054{ 1055 FREE(render); 1056} 1057 1058static struct vbuf_render* r300_render_create(struct r300_context* r300) 1059{ 1060 struct r300_render* r300render = CALLOC_STRUCT(r300_render); 1061 1062 r300render->r300 = r300; 1063 1064 r300render->base.max_vertex_buffer_bytes = 1024 * 1024; 1065 r300render->base.max_indices = 16 * 1024; 1066 1067 r300render->base.get_vertex_info = r300_render_get_vertex_info; 1068 r300render->base.allocate_vertices = r300_render_allocate_vertices; 1069 r300render->base.map_vertices = r300_render_map_vertices; 1070 r300render->base.unmap_vertices = r300_render_unmap_vertices; 1071 r300render->base.set_primitive = r300_render_set_primitive; 1072 r300render->base.draw_elements = r300_render_draw_elements; 1073 r300render->base.draw_arrays = r300_render_draw_arrays; 1074 r300render->base.release_vertices = r300_render_release_vertices; 1075 r300render->base.destroy = r300_render_destroy; 1076 1077 return &r300render->base; 1078} 1079 1080struct draw_stage* r300_draw_stage(struct r300_context* r300) 1081{ 1082 struct vbuf_render* render; 1083 struct draw_stage* stage; 1084 1085 render = r300_render_create(r300); 1086 1087 if (!render) { 1088 return NULL; 1089 } 1090 1091 stage = draw_vbuf_stage(r300->draw, render); 1092 1093 if (!stage) { 1094 render->destroy(render); 1095 return NULL; 1096 } 1097 1098 draw_set_render(r300->draw, render); 1099 1100 return stage; 1101} 1102 1103void r300_draw_flush_vbuf(struct r300_context *r300) 1104{ 1105 pipe_resource_reference(&r300->vbo, NULL); 1106 r300->draw_vbo_size = 0; 1107} 1108 1109/**************************************************************************** 1110 * End of SW TCL functions * 1111 ***************************************************************************/ 1112 1113/* This functions is used to draw a rectangle for the blitter module. 1114 * 1115 * If we rendered a quad, the pixels on the main diagonal 1116 * would be computed and stored twice, which makes the clear/copy codepaths 1117 * somewhat inefficient. Instead we use a rectangular point sprite. */ 1118static void r300_blitter_draw_rectangle(struct blitter_context *blitter, 1119 unsigned x1, unsigned y1, 1120 unsigned x2, unsigned y2, 1121 float depth, 1122 enum blitter_attrib_type type, 1123 const float attrib[4]) 1124{ 1125 struct r300_context *r300 = r300_context(util_blitter_get_pipe(blitter)); 1126 unsigned last_sprite_coord_enable = r300->sprite_coord_enable; 1127 unsigned width = x2 - x1; 1128 unsigned height = y2 - y1; 1129 unsigned vertex_size = 1130 type == UTIL_BLITTER_ATTRIB_COLOR || !r300->draw ? 8 : 4; 1131 unsigned dwords = 13 + vertex_size + 1132 (type == UTIL_BLITTER_ATTRIB_TEXCOORD ? 7 : 0); 1133 const float zeros[4] = {0, 0, 0, 0}; 1134 CS_LOCALS(r300); 1135 1136 r300->context.set_vertex_buffers(&r300->context, 0, NULL); 1137 1138 if (type == UTIL_BLITTER_ATTRIB_TEXCOORD) 1139 r300->sprite_coord_enable = 1; 1140 1141 r300_update_derived_state(r300); 1142 1143 /* Mark some states we don't care about as non-dirty. */ 1144 r300->clip_state.dirty = FALSE; 1145 r300->viewport_state.dirty = FALSE; 1146 1147 if (!r300_prepare_for_rendering(r300, PREP_FIRST_DRAW, NULL, dwords, 0, 0, 1148 FALSE)) 1149 goto done; 1150 1151 DBG(r300, DBG_DRAW, "r300: draw_rectangle\n"); 1152 1153 BEGIN_CS(dwords); 1154 /* Set up GA. */ 1155 OUT_CS_REG(R300_GA_POINT_SIZE, (height * 6) | ((width * 6) << 16)); 1156 1157 if (type == UTIL_BLITTER_ATTRIB_TEXCOORD) { 1158 /* Set up the GA to generate texcoords. */ 1159 OUT_CS_REG(R300_GB_ENABLE, R300_GB_POINT_STUFF_ENABLE | 1160 (R300_GB_TEX_STR << R300_GB_TEX0_SOURCE_SHIFT)); 1161 OUT_CS_REG_SEQ(R300_GA_POINT_S0, 4); 1162 OUT_CS_32F(attrib[0]); 1163 OUT_CS_32F(attrib[3]); 1164 OUT_CS_32F(attrib[2]); 1165 OUT_CS_32F(attrib[1]); 1166 } 1167 1168 /* Set up VAP controls. */ 1169 OUT_CS_REG(R300_VAP_CLIP_CNTL, R300_CLIP_DISABLE); 1170 OUT_CS_REG(R300_VAP_VTE_CNTL, R300_VTX_XY_FMT | R300_VTX_Z_FMT); 1171 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size); 1172 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2); 1173 OUT_CS(1); 1174 OUT_CS(0); 1175 1176 /* Draw. */ 1177 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, vertex_size); 1178 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (1 << 16) | 1179 R300_VAP_VF_CNTL__PRIM_POINTS); 1180 1181 OUT_CS_32F(x1 + width * 0.5f); 1182 OUT_CS_32F(y1 + height * 0.5f); 1183 OUT_CS_32F(depth); 1184 OUT_CS_32F(1); 1185 1186 if (vertex_size == 8) { 1187 if (!attrib) 1188 attrib = zeros; 1189 OUT_CS_TABLE(attrib, 4); 1190 } 1191 END_CS; 1192 1193done: 1194 /* Restore the state. */ 1195 r300_mark_atom_dirty(r300, &r300->clip_state); 1196 r300_mark_atom_dirty(r300, &r300->rs_state); 1197 r300_mark_atom_dirty(r300, &r300->viewport_state); 1198 1199 r300->sprite_coord_enable = last_sprite_coord_enable; 1200} 1201 1202static void r300_resource_resolve(struct pipe_context* pipe, 1203 struct pipe_resource* dest, 1204 unsigned dst_layer, 1205 struct pipe_resource* src, 1206 unsigned src_layer) 1207{ 1208 struct r300_context* r300 = r300_context(pipe); 1209 struct pipe_surface* srcsurf, surf_tmpl; 1210 struct r300_aa_state *aa = (struct r300_aa_state*)r300->aa_state.state; 1211 float color[] = {0, 0, 0, 0}; 1212 1213 memset(&surf_tmpl, 0, sizeof(surf_tmpl)); 1214 surf_tmpl.format = src->format; 1215 surf_tmpl.usage = 0; /* not really a surface hence no bind flags */ 1216 surf_tmpl.u.tex.level = 0; /* msaa resources cannot have mipmaps */ 1217 surf_tmpl.u.tex.first_layer = src_layer; 1218 surf_tmpl.u.tex.last_layer = src_layer; 1219 srcsurf = pipe->create_surface(pipe, src, &surf_tmpl); 1220 surf_tmpl.format = dest->format; 1221 surf_tmpl.u.tex.first_layer = dst_layer; 1222 surf_tmpl.u.tex.last_layer = dst_layer; 1223 1224 DBG(r300, DBG_DRAW, "r300: Resolving resource...\n"); 1225 1226 /* Enable AA resolve. */ 1227 aa->dest = r300_surface(pipe->create_surface(pipe, dest, &surf_tmpl)); 1228 1229 aa->aaresolve_ctl = 1230 R300_RB3D_AARESOLVE_CTL_AARESOLVE_MODE_RESOLVE | 1231 R300_RB3D_AARESOLVE_CTL_AARESOLVE_ALPHA_AVERAGE; 1232 r300->aa_state.size = 10; 1233 r300_mark_atom_dirty(r300, &r300->aa_state); 1234 1235 /* Resolve the surface. */ 1236 r300->context.clear_render_target(pipe, 1237 srcsurf, color, 0, 0, src->width0, src->height0); 1238 1239 /* Disable AA resolve. */ 1240 aa->aaresolve_ctl = 0; 1241 r300->aa_state.size = 4; 1242 r300_mark_atom_dirty(r300, &r300->aa_state); 1243 1244 pipe_surface_reference((struct pipe_surface**)&srcsurf, NULL); 1245 pipe_surface_reference((struct pipe_surface**)&aa->dest, NULL); 1246} 1247 1248void r300_init_render_functions(struct r300_context *r300) 1249{ 1250 /* Set draw functions based on presence of HW TCL. */ 1251 if (r300->screen->caps.has_tcl) { 1252 r300->context.draw_vbo = r300_draw_vbo; 1253 } else { 1254 r300->context.draw_vbo = r300_swtcl_draw_vbo; 1255 } 1256 1257 r300->context.resource_resolve = r300_resource_resolve; 1258 r300->blitter->draw_rectangle = r300_blitter_draw_rectangle; 1259 1260 /* Plug in the two-sided stencil reference value fallback if needed. */ 1261 if (!r300->screen->caps.is_r500) 1262 r300_plug_in_stencil_ref_fallback(r300); 1263} 1264