r300_render.c revision dfadf5a579281c6dd4ecdd4ecd5568fbbb1de17e
1/* 2 * Copyright 2009 Corbin Simpson <MostAwesomeDude@gmail.com> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. */ 22 23/* r300_render: Vertex and index buffer primitive emission. Contains both 24 * HW TCL fastpath rendering, and SW TCL Draw-assisted rendering. */ 25 26#include "draw/draw_context.h" 27#include "draw/draw_vbuf.h" 28 29#include "util/u_inlines.h" 30 31#include "util/u_format.h" 32#include "util/u_memory.h" 33#include "util/u_upload_mgr.h" 34#include "util/u_prim.h" 35 36#include "r300_cs.h" 37#include "r300_context.h" 38#include "r300_screen_buffer.h" 39#include "r300_emit.h" 40#include "r300_reg.h" 41#include "r300_render.h" 42#include "r300_state_derived.h" 43 44/* XXX The DRM rejects VAP_ALT_NUM_VERTICES.. */ 45//#define ENABLE_ALT_NUM_VERTS 46 47static uint32_t r300_translate_primitive(unsigned prim) 48{ 49 switch (prim) { 50 case PIPE_PRIM_POINTS: 51 return R300_VAP_VF_CNTL__PRIM_POINTS; 52 case PIPE_PRIM_LINES: 53 return R300_VAP_VF_CNTL__PRIM_LINES; 54 case PIPE_PRIM_LINE_LOOP: 55 return R300_VAP_VF_CNTL__PRIM_LINE_LOOP; 56 case PIPE_PRIM_LINE_STRIP: 57 return R300_VAP_VF_CNTL__PRIM_LINE_STRIP; 58 case PIPE_PRIM_TRIANGLES: 59 return R300_VAP_VF_CNTL__PRIM_TRIANGLES; 60 case PIPE_PRIM_TRIANGLE_STRIP: 61 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_STRIP; 62 case PIPE_PRIM_TRIANGLE_FAN: 63 return R300_VAP_VF_CNTL__PRIM_TRIANGLE_FAN; 64 case PIPE_PRIM_QUADS: 65 return R300_VAP_VF_CNTL__PRIM_QUADS; 66 case PIPE_PRIM_QUAD_STRIP: 67 return R300_VAP_VF_CNTL__PRIM_QUAD_STRIP; 68 case PIPE_PRIM_POLYGON: 69 return R300_VAP_VF_CNTL__PRIM_POLYGON; 70 default: 71 return 0; 72 } 73} 74 75static uint32_t r300_provoking_vertex_fixes(struct r300_context *r300, 76 unsigned mode) 77{ 78 struct r300_rs_state* rs = (struct r300_rs_state*)r300->rs_state.state; 79 uint32_t color_control = rs->color_control; 80 81 /* By default (see r300_state.c:r300_create_rs_state) color_control is 82 * initialized to provoking the first vertex. 83 * 84 * Triangle fans must be reduced to the second vertex, not the first, in 85 * Gallium flatshade-first mode, as per the GL spec. 86 * (http://www.opengl.org/registry/specs/ARB/provoking_vertex.txt) 87 * 88 * Quads never provoke correctly in flatshade-first mode. The first 89 * vertex is never considered as provoking, so only the second, third, 90 * and fourth vertices can be selected, and both "third" and "last" modes 91 * select the fourth vertex. This is probably due to D3D lacking quads. 92 * 93 * Similarly, polygons reduce to the first, not the last, vertex, when in 94 * "last" mode, and all other modes start from the second vertex. 95 * 96 * ~ C. 97 */ 98 99 if (rs->rs.flatshade_first) { 100 switch (mode) { 101 case PIPE_PRIM_TRIANGLE_FAN: 102 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_SECOND; 103 break; 104 case PIPE_PRIM_QUADS: 105 case PIPE_PRIM_QUAD_STRIP: 106 case PIPE_PRIM_POLYGON: 107 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST; 108 break; 109 default: 110 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_FIRST; 111 break; 112 } 113 } else { 114 color_control |= R300_GA_COLOR_CONTROL_PROVOKING_VERTEX_LAST; 115 } 116 117 return color_control; 118} 119 120/* Check if the requested number of dwords is available in the CS and 121 * if not, flush. Return TRUE if the flush occured. */ 122static boolean r300_reserve_cs_space(struct r300_context *r300, 123 unsigned dwords) 124{ 125 if (!r300->rws->check_cs(r300->rws, dwords)) { 126 r300->context.flush(&r300->context, 0, NULL); 127 return TRUE; 128 } 129 return FALSE; 130} 131 132static boolean immd_is_good_idea(struct r300_context *r300, 133 unsigned count) 134{ 135 struct pipe_vertex_element* velem; 136 struct pipe_vertex_buffer* vbuf; 137 boolean checked[PIPE_MAX_ATTRIBS] = {0}; 138 unsigned vertex_element_count = r300->velems->count; 139 unsigned i, vbi; 140 141 if (count > 10 || DBG_ON(r300, DBG_NO_IMMD)) { 142 return FALSE; 143 } 144 145 /* We shouldn't map buffers referenced by CS, busy buffers, 146 * and ones placed in VRAM. */ 147 /* XXX Check for VRAM buffers. */ 148 for (i = 0; i < vertex_element_count; i++) { 149 velem = &r300->velems->velem[i]; 150 vbi = velem->vertex_buffer_index; 151 152 if (!checked[vbi]) { 153 vbuf = &r300->vertex_buffer[vbi]; 154 155 if (r300->context.is_resource_referenced(&r300->context, 156 vbuf->buffer, 157 0, 0)) { 158 /* It's a very bad idea to map it... */ 159 return FALSE; 160 } 161 checked[vbi] = TRUE; 162 } 163 } 164 return TRUE; 165} 166 167/***************************************************************************** 168 * The emission of draw packets for r500. Older GPUs may use these functions * 169 * after resolving fallback issues (e.g. stencil ref two-sided). * 170 ****************************************************************************/ 171 172void r500_emit_draw_arrays_immediate(struct r300_context *r300, 173 unsigned mode, 174 unsigned start, 175 unsigned count) 176{ 177 struct pipe_vertex_element* velem; 178 struct pipe_vertex_buffer* vbuf; 179 unsigned vertex_element_count = r300->velems->count; 180 unsigned i, v, vbi, dw, elem_offset, dwords; 181 182 /* Size of the vertex, in dwords. */ 183 unsigned vertex_size = 0; 184 185 /* Offsets of the attribute, in dwords, from the start of the vertex. */ 186 unsigned offset[PIPE_MAX_ATTRIBS]; 187 188 /* Size of the vertex element, in dwords. */ 189 unsigned size[PIPE_MAX_ATTRIBS]; 190 191 /* Stride to the same attrib in the next vertex in the vertex buffer, 192 * in dwords. */ 193 unsigned stride[PIPE_MAX_ATTRIBS] = {0}; 194 195 /* Mapped vertex buffers. */ 196 uint32_t* map[PIPE_MAX_ATTRIBS] = {0}; 197 struct pipe_transfer* transfer[PIPE_MAX_ATTRIBS] = {NULL}; 198 199 CS_LOCALS(r300); 200 201 /* Calculate the vertex size, offsets, strides etc. and map the buffers. */ 202 for (i = 0; i < vertex_element_count; i++) { 203 velem = &r300->velems->velem[i]; 204 offset[i] = velem->src_offset / 4; 205 size[i] = util_format_get_blocksize(velem->src_format) / 4; 206 vertex_size += size[i]; 207 vbi = velem->vertex_buffer_index; 208 209 /* Map the buffer. */ 210 if (!map[vbi]) { 211 vbuf = &r300->vertex_buffer[vbi]; 212 map[vbi] = (uint32_t*)pipe_buffer_map(&r300->context, 213 vbuf->buffer, 214 PIPE_TRANSFER_READ, 215 &transfer[vbi]); 216 map[vbi] += vbuf->buffer_offset / 4; 217 stride[vbi] = vbuf->stride / 4; 218 } 219 } 220 221 dwords = 9 + count * vertex_size; 222 223 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + dwords); 224 r300_emit_buffer_validate(r300, FALSE, NULL); 225 r300_emit_dirty_state(r300); 226 227 BEGIN_CS(dwords); 228 OUT_CS_REG(R300_GA_COLOR_CONTROL, 229 r300_provoking_vertex_fixes(r300, mode)); 230 OUT_CS_REG(R300_VAP_VTX_SIZE, vertex_size); 231 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2); 232 OUT_CS(count - 1); 233 OUT_CS(0); 234 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_IMMD_2, count * vertex_size); 235 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_EMBEDDED | (count << 16) | 236 r300_translate_primitive(mode)); 237 238 /* Emit vertices. */ 239 for (v = 0; v < count; v++) { 240 for (i = 0; i < vertex_element_count; i++) { 241 velem = &r300->velems->velem[i]; 242 vbi = velem->vertex_buffer_index; 243 elem_offset = offset[i] + stride[vbi] * (v + start); 244 245 for (dw = 0; dw < size[i]; dw++) { 246 OUT_CS(map[vbi][elem_offset + dw]); 247 } 248 } 249 } 250 END_CS; 251 252 /* Unmap buffers. */ 253 for (i = 0; i < vertex_element_count; i++) { 254 vbi = r300->velems->velem[i].vertex_buffer_index; 255 256 if (map[vbi]) { 257 vbuf = &r300->vertex_buffer[vbi]; 258 pipe_buffer_unmap(&r300->context, vbuf->buffer, transfer[vbi]); 259 map[vbi] = NULL; 260 } 261 } 262} 263 264void r500_emit_draw_arrays(struct r300_context *r300, 265 unsigned mode, 266 unsigned count) 267{ 268#if defined(ENABLE_ALT_NUM_VERTS) 269 boolean alt_num_verts = count > 65535; 270#else 271 boolean alt_num_verts = FALSE; 272#endif 273 CS_LOCALS(r300); 274 275 if (alt_num_verts) { 276 if (count >= (1 << 24)) { 277 fprintf(stderr, "r300: Got a huge number of vertices: %i, " 278 "refusing to render.\n", count); 279 return; 280 } 281 BEGIN_CS(9); 282 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count); 283 } else { 284 BEGIN_CS(7); 285 } 286 OUT_CS_REG(R300_GA_COLOR_CONTROL, 287 r300_provoking_vertex_fixes(r300, mode)); 288 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2); 289 OUT_CS(count - 1); 290 OUT_CS(0); 291 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0); 292 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) | 293 r300_translate_primitive(mode) | 294 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0)); 295 END_CS; 296} 297 298void r500_emit_draw_elements(struct r300_context *r300, 299 struct pipe_resource* indexBuffer, 300 unsigned indexSize, 301 int indexBias, 302 unsigned minIndex, 303 unsigned maxIndex, 304 unsigned mode, 305 unsigned start, 306 unsigned count) 307{ 308 uint32_t count_dwords; 309 uint32_t offset_dwords = indexSize * start / sizeof(uint32_t); 310#if defined(ENABLE_ALT_NUM_VERTS) 311 boolean alt_num_verts = count > 65535; 312#else 313 boolean alt_num_verts = FALSE; 314#endif 315 CS_LOCALS(r300); 316 317 if (count >= (1 << 24)) { 318 fprintf(stderr, "r300: Got a huge number of vertices: %i, " 319 "refusing to render.\n", count); 320 return; 321 } 322 323 assert(indexBias == 0); 324 325 maxIndex = MIN2(maxIndex, r300->vertex_buffer_max_index); 326 327 DBG(r300, DBG_DRAW, "r300: Indexbuf of %u indices, min %u max %u\n", 328 count, minIndex, maxIndex); 329 330 if (alt_num_verts) { 331 BEGIN_CS(15); 332 OUT_CS_REG(R500_VAP_ALT_NUM_VERTICES, count); 333 } else { 334 BEGIN_CS(13); 335 } 336 OUT_CS_REG(R300_GA_COLOR_CONTROL, 337 r300_provoking_vertex_fixes(r300, mode)); 338 OUT_CS_REG_SEQ(R300_VAP_VF_MAX_VTX_INDX, 2); 339 OUT_CS(maxIndex); 340 OUT_CS(minIndex); 341 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, 0); 342 if (indexSize == 4) { 343 count_dwords = count; 344 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | 345 R300_VAP_VF_CNTL__INDEX_SIZE_32bit | 346 r300_translate_primitive(mode) | 347 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0)); 348 } else { 349 count_dwords = (count + 1) / 2; 350 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | 351 r300_translate_primitive(mode) | 352 (alt_num_verts ? R500_VAP_VF_CNTL__USE_ALT_NUM_VERTS : 0)); 353 } 354 355 /* INDX_BUFFER is a truly special packet3. 356 * Unlike most other packet3, where the offset is after the count, 357 * the order is reversed, so the relocation ends up carrying the 358 * size of the indexbuf instead of the offset. 359 */ 360 OUT_CS_PKT3(R300_PACKET3_INDX_BUFFER, 2); 361 OUT_CS(R300_INDX_BUFFER_ONE_REG_WR | (R300_VAP_PORT_IDX0 >> 2) | 362 (0 << R300_INDX_BUFFER_SKIP_SHIFT)); 363 OUT_CS(offset_dwords << 2); 364 OUT_CS_BUF_RELOC(indexBuffer, count_dwords, 365 RADEON_GEM_DOMAIN_GTT, 0, 0); 366 367 END_CS; 368} 369 370/***************************************************************************** 371 * The emission of draw packets for r300 which take care of the two-sided * 372 * stencil ref fallback and call r500's functions. * 373 ****************************************************************************/ 374 375/* Set drawing for front faces. */ 376static void r300_begin_stencil_ref_fallback(struct r300_context *r300) 377{ 378 struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state; 379 CS_LOCALS(r300); 380 381 BEGIN_CS(2); 382 OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode | R300_CULL_BACK); 383 END_CS; 384} 385 386/* Set drawing for back faces. */ 387static void r300_switch_stencil_ref_side(struct r300_context *r300) 388{ 389 struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state; 390 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state; 391 CS_LOCALS(r300); 392 393 BEGIN_CS(4); 394 OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode | R300_CULL_FRONT); 395 OUT_CS_REG(R300_ZB_STENCILREFMASK, 396 dsa->stencil_ref_bf | r300->stencil_ref.ref_value[1]); 397 END_CS; 398} 399 400/* Restore the original state. */ 401static void r300_end_stencil_ref_fallback(struct r300_context *r300) 402{ 403 struct r300_rs_state *rs = (struct r300_rs_state*)r300->rs_state.state; 404 struct r300_dsa_state *dsa = (struct r300_dsa_state*)r300->dsa_state.state; 405 CS_LOCALS(r300); 406 407 BEGIN_CS(4); 408 OUT_CS_REG(R300_SU_CULL_MODE, rs->cull_mode); 409 OUT_CS_REG(R300_ZB_STENCILREFMASK, 410 dsa->stencil_ref_mask | r300->stencil_ref.ref_value[0]); 411 END_CS; 412} 413 414void r300_emit_draw_arrays_immediate(struct r300_context *r300, 415 unsigned mode, 416 unsigned start, 417 unsigned count) 418{ 419 if (!r300->stencil_ref_bf_fallback) { 420 r500_emit_draw_arrays_immediate(r300, mode, start, count); 421 } else { 422 r300_begin_stencil_ref_fallback(r300); 423 r500_emit_draw_arrays_immediate(r300, mode, start, count); 424 r300_switch_stencil_ref_side(r300); 425 r500_emit_draw_arrays_immediate(r300, mode, start, count); 426 r300_end_stencil_ref_fallback(r300); 427 } 428} 429 430void r300_emit_draw_arrays(struct r300_context *r300, 431 unsigned mode, 432 unsigned count) 433{ 434 if (!r300->stencil_ref_bf_fallback) { 435 r500_emit_draw_arrays(r300, mode, count); 436 } else { 437 r300_begin_stencil_ref_fallback(r300); 438 r500_emit_draw_arrays(r300, mode, count); 439 r300_switch_stencil_ref_side(r300); 440 r500_emit_draw_arrays(r300, mode, count); 441 r300_end_stencil_ref_fallback(r300); 442 } 443} 444 445void r300_emit_draw_elements(struct r300_context *r300, 446 struct pipe_resource* indexBuffer, 447 unsigned indexSize, 448 int indexBias, 449 unsigned minIndex, 450 unsigned maxIndex, 451 unsigned mode, 452 unsigned start, 453 unsigned count) 454{ 455 if (!r300->stencil_ref_bf_fallback) { 456 r500_emit_draw_elements(r300, indexBuffer, indexSize, indexBias, 457 minIndex, maxIndex, mode, start, count); 458 } else { 459 r300_begin_stencil_ref_fallback(r300); 460 r500_emit_draw_elements(r300, indexBuffer, indexSize, indexBias, 461 minIndex, maxIndex, mode, start, count); 462 r300_switch_stencil_ref_side(r300); 463 r500_emit_draw_elements(r300, indexBuffer, indexSize, indexBias, 464 minIndex, maxIndex, mode, start, count); 465 r300_end_stencil_ref_fallback(r300); 466 } 467} 468 469static void r300_shorten_ubyte_elts(struct r300_context* r300, 470 struct pipe_resource** elts, 471 unsigned start, 472 unsigned count) 473{ 474 struct pipe_context* context = &r300->context; 475 struct pipe_screen* screen = r300->context.screen; 476 struct pipe_resource* new_elts; 477 unsigned char *in_map; 478 unsigned short *out_map; 479 struct pipe_transfer *src_transfer, *dst_transfer; 480 unsigned i; 481 482 new_elts = pipe_buffer_create(screen, 483 PIPE_BIND_INDEX_BUFFER, 484 2 * count); 485 486 in_map = pipe_buffer_map(context, *elts, PIPE_TRANSFER_READ, &src_transfer); 487 out_map = pipe_buffer_map(context, new_elts, PIPE_TRANSFER_WRITE, &dst_transfer); 488 489 in_map += start; 490 491 for (i = 0; i < count; i++) { 492 *out_map = (unsigned short)*in_map; 493 in_map++; 494 out_map++; 495 } 496 497 pipe_buffer_unmap(context, *elts, src_transfer); 498 pipe_buffer_unmap(context, new_elts, dst_transfer); 499 500 *elts = new_elts; 501} 502 503static void r300_align_ushort_elts(struct r300_context *r300, 504 struct pipe_resource **elts, 505 unsigned start, unsigned count) 506{ 507 struct pipe_context* context = &r300->context; 508 struct pipe_transfer *in_transfer = NULL; 509 struct pipe_transfer *out_transfer = NULL; 510 struct pipe_resource* new_elts; 511 unsigned short *in_map; 512 unsigned short *out_map; 513 514 new_elts = pipe_buffer_create(context->screen, 515 PIPE_BIND_INDEX_BUFFER, 516 2 * count); 517 518 in_map = pipe_buffer_map(context, *elts, 519 PIPE_TRANSFER_READ, &in_transfer); 520 out_map = pipe_buffer_map(context, new_elts, 521 PIPE_TRANSFER_WRITE, &out_transfer); 522 523 memcpy(out_map, in_map+start, 2 * count); 524 525 pipe_buffer_unmap(context, *elts, in_transfer); 526 pipe_buffer_unmap(context, new_elts, out_transfer); 527 528 *elts = new_elts; 529} 530 531/* This is the fast-path drawing & emission for HW TCL. */ 532void r300_draw_range_elements(struct pipe_context* pipe, 533 struct pipe_resource* indexBuffer, 534 unsigned indexSize, 535 int indexBias, 536 unsigned minIndex, 537 unsigned maxIndex, 538 unsigned mode, 539 unsigned start, 540 unsigned count) 541{ 542 struct r300_context* r300 = r300_context(pipe); 543 struct pipe_resource* orgIndexBuffer = indexBuffer; 544#if defined(ENABLE_ALT_NUM_VERTS) 545 boolean alt_num_verts = r300->screen->caps.is_r500 && 546 count > 65536; 547#else 548 boolean alt_num_verts = FALSE; 549#endif 550 unsigned short_count; 551 552 if (r300->skip_rendering) { 553 return; 554 } 555 556 if (!u_trim_pipe_prim(mode, &count)) { 557 return; 558 } 559 560 if (indexSize == 1) { 561 r300_shorten_ubyte_elts(r300, &indexBuffer, start, count); 562 indexSize = 2; 563 start = 0; 564 } else if (indexSize == 2 && start % 2 != 0) { 565 r300_align_ushort_elts(r300, &indexBuffer, start, count); 566 start = 0; 567 } 568 569 r300_update_derived_state(r300); 570 571 r300_upload_index_buffer(r300, &indexBuffer, indexSize, start, count); 572 573 /* 128 dwords for emit_aos and emit_draw_elements */ 574 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 128); 575 r300_emit_buffer_validate(r300, TRUE, indexBuffer); 576 r300_emit_dirty_state(r300); 577 r300_emit_aos(r300, 0); 578 579 u_upload_flush(r300->upload_vb); 580 u_upload_flush(r300->upload_ib); 581 if (alt_num_verts || count <= 65535) { 582 r300->emit_draw_elements(r300, indexBuffer, indexSize, indexBias, 583 minIndex, maxIndex, mode, start, count); 584 } else { 585 do { 586 short_count = MIN2(count, 65534); 587 r300->emit_draw_elements(r300, indexBuffer, indexSize, indexBias, 588 minIndex, maxIndex, 589 mode, start, short_count); 590 591 start += short_count; 592 count -= short_count; 593 594 /* 16 spare dwords are enough for emit_draw_elements. */ 595 if (count && r300_reserve_cs_space(r300, 16)) { 596 r300_emit_buffer_validate(r300, TRUE, indexBuffer); 597 r300_emit_dirty_state(r300); 598 r300_emit_aos(r300, 0); 599 } 600 } while (count); 601 } 602 603 if (indexBuffer != orgIndexBuffer) { 604 pipe_resource_reference( &indexBuffer, NULL ); 605 } 606} 607 608/* Simple helpers for context setup. Should probably be moved to util. */ 609void r300_draw_elements(struct pipe_context* pipe, 610 struct pipe_resource* indexBuffer, 611 unsigned indexSize, int indexBias, unsigned mode, 612 unsigned start, unsigned count) 613{ 614 struct r300_context *r300 = r300_context(pipe); 615 616 pipe->draw_range_elements(pipe, indexBuffer, indexSize, indexBias, 617 0, r300->vertex_buffer_max_index, 618 mode, start, count); 619} 620 621void r300_draw_arrays(struct pipe_context* pipe, unsigned mode, 622 unsigned start, unsigned count) 623{ 624 struct r300_context* r300 = r300_context(pipe); 625#if defined(ENABLE_ALT_NUM_VERTS) 626 boolean alt_num_verts = r300->screen->caps.is_r500 && 627 count > 65536; 628#else 629 boolean alt_num_verts = FALSE; 630#endif 631 unsigned short_count; 632 633 if (r300->skip_rendering) { 634 return; 635 } 636 637 if (!u_trim_pipe_prim(mode, &count)) { 638 return; 639 } 640 641 r300_update_derived_state(r300); 642 643 if (immd_is_good_idea(r300, count)) { 644 r300->emit_draw_arrays_immediate(r300, mode, start, count); 645 } else { 646 /* Make sure there are at least 128 spare dwords in the command buffer. 647 * (most of it being consumed by emit_aos) */ 648 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 128); 649 r300_emit_buffer_validate(r300, TRUE, NULL); 650 r300_emit_dirty_state(r300); 651 652 if (alt_num_verts || count <= 65535) { 653 r300_emit_aos(r300, start); 654 r300->emit_draw_arrays(r300, mode, count); 655 } else { 656 do { 657 short_count = MIN2(count, 65535); 658 r300_emit_aos(r300, start); 659 r300->emit_draw_arrays(r300, mode, short_count); 660 661 start += short_count; 662 count -= short_count; 663 664 /* Again, we emit both AOS and draw_arrays so there should be 665 * at least 128 spare dwords. */ 666 if (count && r300_reserve_cs_space(r300, 128)) { 667 r300_emit_buffer_validate(r300, TRUE, NULL); 668 r300_emit_dirty_state(r300); 669 } 670 } while (count); 671 } 672 u_upload_flush(r300->upload_vb); 673 } 674} 675 676/**************************************************************************** 677 * The rest of this file is for SW TCL rendering only. Please be polite and * 678 * keep these functions separated so that they are easier to locate. ~C. * 679 ***************************************************************************/ 680 681/* SW TCL arrays, using Draw. */ 682void r300_swtcl_draw_arrays(struct pipe_context* pipe, 683 unsigned mode, 684 unsigned start, 685 unsigned count) 686{ 687 struct r300_context* r300 = r300_context(pipe); 688 struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS]; 689 int i; 690 691 if (r300->skip_rendering) { 692 return; 693 } 694 695 if (!u_trim_pipe_prim(mode, &count)) { 696 return; 697 } 698 699 for (i = 0; i < r300->vertex_buffer_count; i++) { 700 void* buf = pipe_buffer_map(pipe, 701 r300->vertex_buffer[i].buffer, 702 PIPE_TRANSFER_READ, 703 &vb_transfer[i]); 704 draw_set_mapped_vertex_buffer(r300->draw, i, buf); 705 } 706 707 draw_set_mapped_element_buffer(r300->draw, 0, 0, NULL); 708 709 draw_arrays(r300->draw, mode, start, count); 710 711 for (i = 0; i < r300->vertex_buffer_count; i++) { 712 pipe_buffer_unmap(pipe, r300->vertex_buffer[i].buffer, 713 vb_transfer[i]); 714 draw_set_mapped_vertex_buffer(r300->draw, i, NULL); 715 } 716} 717 718/* SW TCL elements, using Draw. */ 719void r300_swtcl_draw_range_elements(struct pipe_context* pipe, 720 struct pipe_resource* indexBuffer, 721 unsigned indexSize, 722 int indexBias, 723 unsigned minIndex, 724 unsigned maxIndex, 725 unsigned mode, 726 unsigned start, 727 unsigned count) 728{ 729 struct r300_context* r300 = r300_context(pipe); 730 struct pipe_transfer *vb_transfer[PIPE_MAX_ATTRIBS]; 731 struct pipe_transfer *ib_transfer; 732 int i; 733 void* indices; 734 735 if (r300->skip_rendering) { 736 return; 737 } 738 739 if (!u_trim_pipe_prim(mode, &count)) { 740 return; 741 } 742 743 for (i = 0; i < r300->vertex_buffer_count; i++) { 744 void* buf = pipe_buffer_map(pipe, 745 r300->vertex_buffer[i].buffer, 746 PIPE_TRANSFER_READ, 747 &vb_transfer[i]); 748 draw_set_mapped_vertex_buffer(r300->draw, i, buf); 749 } 750 751 indices = pipe_buffer_map(pipe, indexBuffer, 752 PIPE_TRANSFER_READ, &ib_transfer); 753 draw_set_mapped_element_buffer_range(r300->draw, indexSize, indexBias, 754 minIndex, maxIndex, indices); 755 756 draw_arrays(r300->draw, mode, start, count); 757 758 for (i = 0; i < r300->vertex_buffer_count; i++) { 759 pipe_buffer_unmap(pipe, r300->vertex_buffer[i].buffer, 760 vb_transfer[i]); 761 draw_set_mapped_vertex_buffer(r300->draw, i, NULL); 762 } 763 764 pipe_buffer_unmap(pipe, indexBuffer, 765 ib_transfer); 766 draw_set_mapped_element_buffer_range(r300->draw, 0, 0, 767 start, start + count - 1, 768 NULL); 769} 770 771/* Object for rendering using Draw. */ 772struct r300_render { 773 /* Parent class */ 774 struct vbuf_render base; 775 776 /* Pipe context */ 777 struct r300_context* r300; 778 779 /* Vertex information */ 780 size_t vertex_size; 781 unsigned prim; 782 unsigned hwprim; 783 784 /* VBO */ 785 struct pipe_resource* vbo; 786 size_t vbo_size; 787 size_t vbo_offset; 788 size_t vbo_max_used; 789 void * vbo_ptr; 790 791 struct pipe_transfer *vbo_transfer; 792}; 793 794static INLINE struct r300_render* 795r300_render(struct vbuf_render* render) 796{ 797 return (struct r300_render*)render; 798} 799 800static const struct vertex_info* 801r300_render_get_vertex_info(struct vbuf_render* render) 802{ 803 struct r300_render* r300render = r300_render(render); 804 struct r300_context* r300 = r300render->r300; 805 806 r300_update_derived_state(r300); 807 808 return &r300->vertex_info; 809} 810 811static boolean r300_render_allocate_vertices(struct vbuf_render* render, 812 ushort vertex_size, 813 ushort count) 814{ 815 struct r300_render* r300render = r300_render(render); 816 struct r300_context* r300 = r300render->r300; 817 struct pipe_screen* screen = r300->context.screen; 818 size_t size = (size_t)vertex_size * (size_t)count; 819 820 if (size + r300render->vbo_offset > r300render->vbo_size) 821 { 822 pipe_resource_reference(&r300->vbo, NULL); 823 r300render->vbo = pipe_buffer_create(screen, 824 PIPE_BIND_VERTEX_BUFFER, 825 R300_MAX_DRAW_VBO_SIZE); 826 r300render->vbo_offset = 0; 827 r300render->vbo_size = R300_MAX_DRAW_VBO_SIZE; 828 } 829 830 r300render->vertex_size = vertex_size; 831 r300->vbo = r300render->vbo; 832 r300->vbo_offset = r300render->vbo_offset; 833 834 return (r300render->vbo) ? TRUE : FALSE; 835} 836 837static void* r300_render_map_vertices(struct vbuf_render* render) 838{ 839 struct r300_render* r300render = r300_render(render); 840 841 r300render->vbo_ptr = pipe_buffer_map(&r300render->r300->context, 842 r300render->vbo, 843 PIPE_TRANSFER_WRITE, 844 &r300render->vbo_transfer); 845 846 return ((uint8_t*)r300render->vbo_ptr + r300render->vbo_offset); 847} 848 849static void r300_render_unmap_vertices(struct vbuf_render* render, 850 ushort min, 851 ushort max) 852{ 853 struct r300_render* r300render = r300_render(render); 854 struct pipe_context* context = &r300render->r300->context; 855 CS_LOCALS(r300render->r300); 856 BEGIN_CS(2); 857 OUT_CS_REG(R300_VAP_VF_MAX_VTX_INDX, max); 858 END_CS; 859 860 r300render->vbo_max_used = MAX2(r300render->vbo_max_used, 861 r300render->vertex_size * (max + 1)); 862 pipe_buffer_unmap(context, r300render->vbo, r300render->vbo_transfer); 863} 864 865static void r300_render_release_vertices(struct vbuf_render* render) 866{ 867 struct r300_render* r300render = r300_render(render); 868 869 r300render->vbo_offset += r300render->vbo_max_used; 870 r300render->vbo_max_used = 0; 871} 872 873static boolean r300_render_set_primitive(struct vbuf_render* render, 874 unsigned prim) 875{ 876 struct r300_render* r300render = r300_render(render); 877 878 r300render->prim = prim; 879 r300render->hwprim = r300_translate_primitive(prim); 880 881 return TRUE; 882} 883 884static void r500_render_draw_arrays(struct vbuf_render* render, 885 unsigned start, 886 unsigned count) 887{ 888 struct r300_render* r300render = r300_render(render); 889 struct r300_context* r300 = r300render->r300; 890 891 CS_LOCALS(r300); 892 893 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + 2); 894 r300_emit_buffer_validate(r300, FALSE, NULL); 895 r300_emit_dirty_state(r300); 896 897 DBG(r300, DBG_DRAW, "r300: Doing vbuf render, count %d\n", count); 898 899 BEGIN_CS(2); 900 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_VBUF_2, 0); 901 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_VERTEX_LIST | (count << 16) | 902 r300render->hwprim); 903 END_CS; 904} 905 906static void r500_render_draw(struct vbuf_render* render, 907 const ushort* indices, 908 uint count) 909{ 910 struct r300_render* r300render = r300_render(render); 911 struct r300_context* r300 = r300render->r300; 912 int i; 913 unsigned dwords = 2 + (count+1)/2; 914 915 CS_LOCALS(r300); 916 917 r300_reserve_cs_space(r300, r300_get_num_dirty_dwords(r300) + dwords); 918 r300_emit_buffer_validate(r300, FALSE, NULL); 919 r300_emit_dirty_state(r300); 920 921 BEGIN_CS(dwords); 922 OUT_CS_PKT3(R300_PACKET3_3D_DRAW_INDX_2, (count+1)/2); 923 OUT_CS(R300_VAP_VF_CNTL__PRIM_WALK_INDICES | (count << 16) | 924 r300render->hwprim); 925 for (i = 0; i < count-1; i += 2) { 926 OUT_CS(indices[i+1] << 16 | indices[i]); 927 } 928 if (count % 2) { 929 OUT_CS(indices[count-1]); 930 } 931 END_CS; 932} 933 934static void r300_render_draw_arrays(struct vbuf_render* render, 935 unsigned start, 936 unsigned count) 937{ 938 struct r300_context* r300 = r300_render(render)->r300; 939 940 if (!r300->stencil_ref_bf_fallback) { 941 r500_render_draw_arrays(render, start, count); 942 } else { 943 r300_begin_stencil_ref_fallback(r300); 944 r500_render_draw_arrays(render, start, count); 945 r300_switch_stencil_ref_side(r300); 946 r500_render_draw_arrays(render, start, count); 947 r300_end_stencil_ref_fallback(r300); 948 } 949} 950 951static void r300_render_draw(struct vbuf_render* render, 952 const ushort* indices, 953 uint count) 954{ 955 struct r300_context* r300 = r300_render(render)->r300; 956 957 if (!r300->stencil_ref_bf_fallback) { 958 r500_render_draw(render, indices, count); 959 } else { 960 r300_begin_stencil_ref_fallback(r300); 961 r500_render_draw(render, indices, count); 962 r300_switch_stencil_ref_side(r300); 963 r500_render_draw(render, indices, count); 964 r300_end_stencil_ref_fallback(r300); 965 } 966} 967 968static void r300_render_destroy(struct vbuf_render* render) 969{ 970 FREE(render); 971} 972 973static struct vbuf_render* r300_render_create(struct r300_context* r300) 974{ 975 struct r300_render* r300render = CALLOC_STRUCT(r300_render); 976 977 r300render->r300 = r300; 978 979 /* XXX find real numbers plz */ 980 r300render->base.max_vertex_buffer_bytes = 128 * 1024; 981 r300render->base.max_indices = 16 * 1024; 982 983 r300render->base.get_vertex_info = r300_render_get_vertex_info; 984 r300render->base.allocate_vertices = r300_render_allocate_vertices; 985 r300render->base.map_vertices = r300_render_map_vertices; 986 r300render->base.unmap_vertices = r300_render_unmap_vertices; 987 r300render->base.set_primitive = r300_render_set_primitive; 988 if (r300->screen->caps.is_r500) { 989 r300render->base.draw = r500_render_draw; 990 r300render->base.draw_arrays = r500_render_draw_arrays; 991 } else { 992 r300render->base.draw = r300_render_draw; 993 r300render->base.draw_arrays = r300_render_draw_arrays; 994 } 995 r300render->base.release_vertices = r300_render_release_vertices; 996 r300render->base.destroy = r300_render_destroy; 997 998 r300render->vbo = NULL; 999 r300render->vbo_size = 0; 1000 r300render->vbo_offset = 0; 1001 1002 return &r300render->base; 1003} 1004 1005struct draw_stage* r300_draw_stage(struct r300_context* r300) 1006{ 1007 struct vbuf_render* render; 1008 struct draw_stage* stage; 1009 1010 render = r300_render_create(r300); 1011 1012 if (!render) { 1013 return NULL; 1014 } 1015 1016 stage = draw_vbuf_stage(r300->draw, render); 1017 1018 if (!stage) { 1019 render->destroy(render); 1020 return NULL; 1021 } 1022 1023 draw_set_render(r300->draw, render); 1024 1025 return stage; 1026} 1027