r600.h revision ac8a1ebe55b08180945ffaebcff6b3bed336c9ec
1/* 2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: 24 * Jerome Glisse 25 */ 26#ifndef R600_H 27#define R600_H 28 29#include <assert.h> 30#include <stdint.h> 31#include <stdio.h> 32#include <util/u_double_list.h> 33#include <pipe/p_compiler.h> 34 35#define RADEON_CTX_MAX_PM4 (64 * 1024 / 4) 36 37#define R600_ERR(fmt, args...) \ 38 fprintf(stderr, "EE %s/%s:%d - "fmt, __FILE__, __func__, __LINE__, ##args) 39 40typedef uint64_t u64; 41typedef uint32_t u32; 42typedef uint16_t u16; 43typedef uint8_t u8; 44 45struct radeon; 46 47enum radeon_family { 48 CHIP_UNKNOWN, 49 CHIP_R100, 50 CHIP_RV100, 51 CHIP_RS100, 52 CHIP_RV200, 53 CHIP_RS200, 54 CHIP_R200, 55 CHIP_RV250, 56 CHIP_RS300, 57 CHIP_RV280, 58 CHIP_R300, 59 CHIP_R350, 60 CHIP_RV350, 61 CHIP_RV380, 62 CHIP_R420, 63 CHIP_R423, 64 CHIP_RV410, 65 CHIP_RS400, 66 CHIP_RS480, 67 CHIP_RS600, 68 CHIP_RS690, 69 CHIP_RS740, 70 CHIP_RV515, 71 CHIP_R520, 72 CHIP_RV530, 73 CHIP_RV560, 74 CHIP_RV570, 75 CHIP_R580, 76 CHIP_R600, 77 CHIP_RV610, 78 CHIP_RV630, 79 CHIP_RV670, 80 CHIP_RV620, 81 CHIP_RV635, 82 CHIP_RS780, 83 CHIP_RS880, 84 CHIP_RV770, 85 CHIP_RV730, 86 CHIP_RV710, 87 CHIP_RV740, 88 CHIP_CEDAR, 89 CHIP_REDWOOD, 90 CHIP_JUNIPER, 91 CHIP_CYPRESS, 92 CHIP_HEMLOCK, 93 CHIP_LAST, 94}; 95 96enum chip_class { 97 R600, 98 R700, 99 EVERGREEN, 100}; 101 102enum radeon_family r600_get_family(struct radeon *rw); 103enum chip_class r600_get_family_class(struct radeon *radeon); 104 105/* r600_bo.c */ 106struct r600_bo; 107struct r600_bo *r600_bo(struct radeon *radeon, 108 unsigned size, unsigned alignment, unsigned usage); 109struct r600_bo *r600_bo_handle(struct radeon *radeon, 110 unsigned handle); 111void *r600_bo_map(struct radeon *radeon, struct r600_bo *bo, unsigned usage, void *ctx); 112void r600_bo_unmap(struct radeon *radeon, struct r600_bo *bo); 113void r600_bo_reference(struct radeon *radeon, struct r600_bo **dst, 114 struct r600_bo *src); 115static INLINE unsigned r600_bo_offset(struct r600_bo *bo) 116{ 117 return 0; 118} 119 120 121/* R600/R700 STATES */ 122#define R600_GROUP_MAX 16 123#define R600_BLOCK_MAX_BO 32 124#define R600_BLOCK_MAX_REG 128 125 126struct r600_pipe_reg { 127 u32 offset; 128 u32 mask; 129 u32 value; 130 struct r600_bo *bo; 131}; 132 133struct r600_pipe_state { 134 unsigned id; 135 unsigned nregs; 136 struct r600_pipe_reg regs[R600_BLOCK_MAX_REG]; 137}; 138 139static inline void r600_pipe_state_add_reg(struct r600_pipe_state *state, 140 u32 offset, u32 value, u32 mask, 141 struct r600_bo *bo) 142{ 143 state->regs[state->nregs].offset = offset; 144 state->regs[state->nregs].value = value; 145 state->regs[state->nregs].mask = mask; 146 state->regs[state->nregs].bo = bo; 147 state->nregs++; 148 assert(state->nregs < R600_BLOCK_MAX_REG); 149} 150 151#define R600_BLOCK_STATUS_ENABLED (1 << 0) 152#define R600_BLOCK_STATUS_DIRTY (1 << 1) 153 154struct r600_block_reloc { 155 struct r600_bo *bo; 156 unsigned nreloc; 157 unsigned flush_flags; 158 unsigned flush_mask; 159 unsigned bo_pm4_index[R600_BLOCK_MAX_BO]; 160}; 161 162struct r600_block { 163 struct list_head list; 164 unsigned status; 165 unsigned start_offset; 166 unsigned pm4_ndwords; 167 unsigned pm4_flush_ndwords; 168 unsigned nbo; 169 unsigned nreg; 170 u32 *reg; 171 u32 pm4[R600_BLOCK_MAX_REG]; 172 unsigned pm4_bo_index[R600_BLOCK_MAX_REG]; 173 struct r600_block_reloc reloc[R600_BLOCK_MAX_BO]; 174}; 175 176struct r600_range { 177 unsigned start_offset; 178 unsigned end_offset; 179 struct r600_block **blocks; 180}; 181 182/* 183 * relocation 184 */ 185#pragma pack(1) 186struct r600_reloc { 187 uint32_t handle; 188 uint32_t read_domain; 189 uint32_t write_domain; 190 uint32_t flags; 191}; 192#pragma pack() 193 194/* 195 * query 196 */ 197struct r600_query { 198 u64 result; 199 /* The kind of query. Currently only OQ is supported. */ 200 unsigned type; 201 /* How many results have been written, in dwords. It's incremented 202 * after end_query and flush. */ 203 unsigned num_results; 204 /* if we've flushed the query */ 205 unsigned state; 206 /* The buffer where query results are stored. */ 207 struct r600_bo *buffer; 208 unsigned buffer_size; 209 /* linked list of queries */ 210 struct list_head list; 211}; 212 213#define R600_QUERY_STATE_STARTED (1 << 0) 214#define R600_QUERY_STATE_ENDED (1 << 1) 215#define R600_QUERY_STATE_SUSPENDED (1 << 2) 216 217 218struct r600_context { 219 struct radeon *radeon; 220 unsigned hash_size; 221 unsigned hash_shift; 222 struct r600_range range[256]; 223 unsigned nblocks; 224 struct r600_block **blocks; 225 struct list_head dirty; 226 unsigned pm4_ndwords; 227 unsigned pm4_cdwords; 228 unsigned pm4_dirty_cdwords; 229 unsigned ctx_pm4_ndwords; 230 unsigned nreloc; 231 unsigned creloc; 232 struct r600_reloc *reloc; 233 struct radeon_bo **bo; 234 u32 *pm4; 235 struct list_head query_list; 236 unsigned num_query_running; 237}; 238 239struct r600_draw { 240 u32 vgt_num_indices; 241 u32 vgt_num_instances; 242 u32 vgt_index_type; 243 u32 vgt_draw_initiator; 244 u32 indices_bo_offset; 245 struct r600_bo *indices; 246}; 247 248int r600_context_init(struct r600_context *ctx, struct radeon *radeon); 249void r600_context_fini(struct r600_context *ctx); 250void r600_context_pipe_state_set(struct r600_context *ctx, struct r600_pipe_state *state); 251void r600_context_pipe_state_set_ps_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); 252void r600_context_pipe_state_set_vs_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); 253void r600_context_pipe_state_set_ps_sampler(struct r600_context *ctx, struct r600_pipe_state *state, unsigned id); 254void r600_context_pipe_state_set_vs_sampler(struct r600_context *ctx, struct r600_pipe_state *state, unsigned id); 255void r600_context_flush(struct r600_context *ctx); 256void r600_context_dump_bof(struct r600_context *ctx, const char *file); 257void r600_context_draw(struct r600_context *ctx, const struct r600_draw *draw); 258 259struct r600_query *r600_context_query_create(struct r600_context *ctx, unsigned query_type); 260void r600_context_query_destroy(struct r600_context *ctx, struct r600_query *query); 261boolean r600_context_query_result(struct r600_context *ctx, 262 struct r600_query *query, 263 boolean wait, void *vresult); 264void r600_query_begin(struct r600_context *ctx, struct r600_query *query); 265void r600_query_end(struct r600_context *ctx, struct r600_query *query); 266void r600_context_queries_suspend(struct r600_context *ctx); 267void r600_context_queries_resume(struct r600_context *ctx); 268 269int evergreen_context_init(struct r600_context *ctx, struct radeon *radeon); 270void evergreen_context_draw(struct r600_context *ctx, const struct r600_draw *draw); 271void evergreen_ps_resource_set(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); 272void evergreen_vs_resource_set(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); 273 274void evergreen_context_pipe_state_set_ps_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); 275void evergreen_context_pipe_state_set_vs_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); 276void evergreen_context_pipe_state_set_ps_sampler(struct r600_context *ctx, struct r600_pipe_state *state, unsigned id); 277void evergreen_context_pipe_state_set_vs_sampler(struct r600_context *ctx, struct r600_pipe_state *state, unsigned id); 278 279#endif 280