r600.h revision edda44e0dc72302afa04a767772d5d97ab9d9aa6
1/* 2 * Copyright 2010 Jerome Glisse <glisse@freedesktop.org> 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * on the rights to use, copy, modify, merge, publish, distribute, sub 8 * license, and/or sell copies of the Software, and to permit persons to whom 9 * the Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, 19 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 20 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE 21 * USE OR OTHER DEALINGS IN THE SOFTWARE. 22 * 23 * Authors: 24 * Jerome Glisse 25 */ 26#ifndef R600_H 27#define R600_H 28 29#include <assert.h> 30#include <stdint.h> 31#include <stdio.h> 32#include <util/u_double_list.h> 33#include <pipe/p_compiler.h> 34 35#define RADEON_CTX_MAX_PM4 (64 * 1024 / 4) 36 37#define R600_ERR(fmt, args...) \ 38 fprintf(stderr, "EE %s/%s:%d - "fmt, __FILE__, __func__, __LINE__, ##args) 39 40typedef uint64_t u64; 41typedef uint32_t u32; 42typedef uint16_t u16; 43typedef uint8_t u8; 44 45struct radeon; 46struct winsys_handle; 47 48enum radeon_family { 49 CHIP_UNKNOWN, 50 CHIP_R100, 51 CHIP_RV100, 52 CHIP_RS100, 53 CHIP_RV200, 54 CHIP_RS200, 55 CHIP_R200, 56 CHIP_RV250, 57 CHIP_RS300, 58 CHIP_RV280, 59 CHIP_R300, 60 CHIP_R350, 61 CHIP_RV350, 62 CHIP_RV380, 63 CHIP_R420, 64 CHIP_R423, 65 CHIP_RV410, 66 CHIP_RS400, 67 CHIP_RS480, 68 CHIP_RS600, 69 CHIP_RS690, 70 CHIP_RS740, 71 CHIP_RV515, 72 CHIP_R520, 73 CHIP_RV530, 74 CHIP_RV560, 75 CHIP_RV570, 76 CHIP_R580, 77 CHIP_R600, 78 CHIP_RV610, 79 CHIP_RV630, 80 CHIP_RV670, 81 CHIP_RV620, 82 CHIP_RV635, 83 CHIP_RS780, 84 CHIP_RS880, 85 CHIP_RV770, 86 CHIP_RV730, 87 CHIP_RV710, 88 CHIP_RV740, 89 CHIP_CEDAR, 90 CHIP_REDWOOD, 91 CHIP_JUNIPER, 92 CHIP_CYPRESS, 93 CHIP_HEMLOCK, 94 CHIP_PALM, 95 CHIP_LAST, 96}; 97 98enum chip_class { 99 R600, 100 R700, 101 EVERGREEN, 102}; 103 104struct r600_tiling_info { 105 unsigned num_channels; 106 unsigned num_banks; 107 unsigned group_bytes; 108}; 109 110enum radeon_family r600_get_family(struct radeon *rw); 111enum chip_class r600_get_family_class(struct radeon *radeon); 112struct r600_tiling_info *r600_get_tiling_info(struct radeon *radeon); 113 114/* r600_bo.c */ 115struct r600_bo; 116struct r600_bo *r600_bo(struct radeon *radeon, 117 unsigned size, unsigned alignment, 118 unsigned binding, unsigned usage); 119struct r600_bo *r600_bo_handle(struct radeon *radeon, 120 unsigned handle, unsigned *array_mode); 121void *r600_bo_map(struct radeon *radeon, struct r600_bo *bo, unsigned usage, void *ctx); 122void r600_bo_unmap(struct radeon *radeon, struct r600_bo *bo); 123void r600_bo_reference(struct radeon *radeon, struct r600_bo **dst, 124 struct r600_bo *src); 125boolean r600_bo_get_winsys_handle(struct radeon *radeon, struct r600_bo *pb_bo, 126 unsigned stride, struct winsys_handle *whandle); 127static INLINE unsigned r600_bo_offset(struct r600_bo *bo) 128{ 129 return 0; 130} 131 132 133/* R600/R700 STATES */ 134#define R600_GROUP_MAX 16 135#define R600_BLOCK_MAX_BO 32 136#define R600_BLOCK_MAX_REG 128 137 138struct r600_pipe_reg { 139 u32 offset; 140 u32 mask; 141 u32 value; 142 struct r600_bo *bo; 143}; 144 145struct r600_pipe_state { 146 unsigned id; 147 unsigned nregs; 148 struct r600_pipe_reg regs[R600_BLOCK_MAX_REG]; 149}; 150 151static inline void r600_pipe_state_add_reg(struct r600_pipe_state *state, 152 u32 offset, u32 value, u32 mask, 153 struct r600_bo *bo) 154{ 155 state->regs[state->nregs].offset = offset; 156 state->regs[state->nregs].value = value; 157 state->regs[state->nregs].mask = mask; 158 state->regs[state->nregs].bo = bo; 159 state->nregs++; 160 assert(state->nregs < R600_BLOCK_MAX_REG); 161} 162 163#define R600_BLOCK_STATUS_ENABLED (1 << 0) 164#define R600_BLOCK_STATUS_DIRTY (1 << 1) 165 166struct r600_block_reloc { 167 struct r600_bo *bo; 168 unsigned flush_flags; 169 unsigned flush_mask; 170 unsigned bo_pm4_index; 171}; 172 173struct r600_block { 174 struct list_head list; 175 unsigned status; 176 unsigned start_offset; 177 unsigned pm4_ndwords; 178 unsigned pm4_flush_ndwords; 179 unsigned nbo; 180 unsigned nreg; 181 u32 *reg; 182 u32 pm4[R600_BLOCK_MAX_REG]; 183 unsigned pm4_bo_index[R600_BLOCK_MAX_REG]; 184 struct r600_block_reloc reloc[R600_BLOCK_MAX_BO]; 185}; 186 187struct r600_range { 188 unsigned start_offset; 189 unsigned end_offset; 190 struct r600_block **blocks; 191}; 192 193/* 194 * relocation 195 */ 196#pragma pack(1) 197struct r600_reloc { 198 uint32_t handle; 199 uint32_t read_domain; 200 uint32_t write_domain; 201 uint32_t flags; 202}; 203#pragma pack() 204 205/* 206 * query 207 */ 208struct r600_query { 209 u64 result; 210 /* The kind of query. Currently only OQ is supported. */ 211 unsigned type; 212 /* How many results have been written, in dwords. It's incremented 213 * after end_query and flush. */ 214 unsigned num_results; 215 /* if we've flushed the query */ 216 unsigned state; 217 /* The buffer where query results are stored. */ 218 struct r600_bo *buffer; 219 unsigned buffer_size; 220 /* linked list of queries */ 221 struct list_head list; 222}; 223 224#define R600_QUERY_STATE_STARTED (1 << 0) 225#define R600_QUERY_STATE_ENDED (1 << 1) 226#define R600_QUERY_STATE_SUSPENDED (1 << 2) 227 228 229struct r600_context { 230 struct radeon *radeon; 231 unsigned hash_size; 232 unsigned hash_shift; 233 struct r600_range range[256]; 234 unsigned nblocks; 235 struct r600_block **blocks; 236 struct list_head dirty; 237 unsigned pm4_ndwords; 238 unsigned pm4_cdwords; 239 unsigned pm4_dirty_cdwords; 240 unsigned ctx_pm4_ndwords; 241 unsigned nreloc; 242 unsigned creloc; 243 struct r600_reloc *reloc; 244 struct radeon_bo **bo; 245 u32 *pm4; 246 struct list_head query_list; 247 unsigned num_query_running; 248 unsigned fence; 249 struct list_head fenced_bo; 250 unsigned *cfence; 251 struct r600_bo *fence_bo; 252}; 253 254struct r600_draw { 255 u32 vgt_num_indices; 256 u32 vgt_num_instances; 257 u32 vgt_index_type; 258 u32 vgt_draw_initiator; 259 u32 indices_bo_offset; 260 struct r600_bo *indices; 261}; 262 263int r600_context_init(struct r600_context *ctx, struct radeon *radeon); 264void r600_context_fini(struct r600_context *ctx); 265void r600_context_pipe_state_set(struct r600_context *ctx, struct r600_pipe_state *state); 266void r600_context_pipe_state_set_ps_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); 267void r600_context_pipe_state_set_vs_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); 268void r600_context_pipe_state_set_fs_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); 269void r600_context_pipe_state_set_ps_sampler(struct r600_context *ctx, struct r600_pipe_state *state, unsigned id); 270void r600_context_pipe_state_set_vs_sampler(struct r600_context *ctx, struct r600_pipe_state *state, unsigned id); 271void r600_context_flush(struct r600_context *ctx); 272void r600_context_dump_bof(struct r600_context *ctx, const char *file); 273void r600_context_draw(struct r600_context *ctx, const struct r600_draw *draw); 274 275struct r600_query *r600_context_query_create(struct r600_context *ctx, unsigned query_type); 276void r600_context_query_destroy(struct r600_context *ctx, struct r600_query *query); 277boolean r600_context_query_result(struct r600_context *ctx, 278 struct r600_query *query, 279 boolean wait, void *vresult); 280void r600_query_begin(struct r600_context *ctx, struct r600_query *query); 281void r600_query_end(struct r600_context *ctx, struct r600_query *query); 282void r600_context_queries_suspend(struct r600_context *ctx); 283void r600_context_queries_resume(struct r600_context *ctx); 284 285int evergreen_context_init(struct r600_context *ctx, struct radeon *radeon); 286void evergreen_context_draw(struct r600_context *ctx, const struct r600_draw *draw); 287void evergreen_ps_resource_set(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); 288void evergreen_vs_resource_set(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); 289void evergreen_fs_resource_set(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); 290 291void evergreen_context_pipe_state_set_ps_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); 292void evergreen_context_pipe_state_set_vs_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); 293void evergreen_context_pipe_state_set_fs_resource(struct r600_context *ctx, struct r600_pipe_state *state, unsigned rid); 294void evergreen_context_pipe_state_set_ps_sampler(struct r600_context *ctx, struct r600_pipe_state *state, unsigned id); 295void evergreen_context_pipe_state_set_vs_sampler(struct r600_context *ctx, struct r600_pipe_state *state, unsigned id); 296 297struct radeon *radeon_decref(struct radeon *radeon); 298 299#endif 300