AMDILInstrInfo.td revision 8d53ddb375d2a82860b398bc463294373c5a62b0
1//===------------ AMDILInstrInfo.td - AMDIL Target ------*-tablegen-*------===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file is distributed under the University of Illinois Open Source
6// License. See LICENSE.TXT for details.
7//
8//==-----------------------------------------------------------------------===//
9//
10// This file describes the AMDIL instructions in TableGen format.
11//
12//===----------------------------------------------------------------------===//
13// AMDIL Instruction Predicate Definitions
14// Predicate that is set to true if the hardware supports double precision
15// divide
16def HasHWDDiv                 : Predicate<"Subtarget.device()"
17                           "->getGeneration() > AMDILDeviceInfo::HD4XXX && "
18              "Subtarget.device()->usesHardware(AMDILDeviceInfo::DoubleOps)">;
19
20// Predicate that is set to true if the hardware supports double, but not double
21// precision divide in hardware
22def HasSWDDiv             : Predicate<"Subtarget.device()"
23                           "->getGeneration() == AMDILDeviceInfo::HD4XXX &&"
24              "Subtarget.device()->usesHardware(AMDILDeviceInfo::DoubleOps)">;
25
26// Predicate that is set to true if the hardware support 24bit signed
27// math ops. Otherwise a software expansion to 32bit math ops is used instead.
28def HasHWSign24Bit          : Predicate<"Subtarget.device()"
29                            "->getGeneration() > AMDILDeviceInfo::HD5XXX">;
30
31// Predicate that is set to true if 64bit operations are supported or not
32def HasHW64Bit              : Predicate<"Subtarget.device()"
33                            "->usesHardware(AMDILDeviceInfo::LongOps)">;
34def HasSW64Bit              : Predicate<"Subtarget.device()"
35                            "->usesSoftware(AMDILDeviceInfo::LongOps)">;
36
37// Predicate that is set to true if the timer register is supported
38def HasTmrRegister          : Predicate<"Subtarget.device()"
39                            "->isSupported(AMDILDeviceInfo::TmrReg)">;
40// Predicate that is true if we are at least evergreen series
41def HasDeviceIDInst         : Predicate<"Subtarget.device()"
42                            "->getGeneration() >= AMDILDeviceInfo::HD5XXX">;
43
44// Predicate that is true if we have region address space.
45def hasRegionAS             : Predicate<"Subtarget.device()"
46                            "->usesHardware(AMDILDeviceInfo::RegionMem)">;
47
48// Predicate that is false if we don't have region address space.
49def noRegionAS             : Predicate<"!Subtarget.device()"
50                            "->isSupported(AMDILDeviceInfo::RegionMem)">;
51
52
53// Predicate that is set to true if 64bit Mul is supported in the IL or not
54def HasHW64Mul              : Predicate<"Subtarget.calVersion()" 
55                                          ">= CAL_VERSION_SC_139"
56                                          "&& Subtarget.device()"
57                                          "->getGeneration() >="
58                                          "AMDILDeviceInfo::HD5XXX">;
59def HasSW64Mul              : Predicate<"Subtarget.calVersion()" 
60                                          "< CAL_VERSION_SC_139">;
61// Predicate that is set to true if 64bit Div/Mod is supported in the IL or not
62def HasHW64DivMod           : Predicate<"Subtarget.device()"
63                            "->usesHardware(AMDILDeviceInfo::HW64BitDivMod)">;
64def HasSW64DivMod           : Predicate<"Subtarget.device()"
65                            "->usesSoftware(AMDILDeviceInfo::HW64BitDivMod)">;
66
67// Predicate that is set to true if 64bit pointer are used.
68def Has64BitPtr             : Predicate<"Subtarget.is64bit()">;
69def Has32BitPtr             : Predicate<"!Subtarget.is64bit()">;
70//===--------------------------------------------------------------------===//
71// Custom Operands
72//===--------------------------------------------------------------------===//
73include "AMDILOperands.td"
74
75//===--------------------------------------------------------------------===//
76// Custom Selection DAG Type Profiles
77//===--------------------------------------------------------------------===//
78include "AMDILProfiles.td"
79
80//===--------------------------------------------------------------------===//
81// Custom Selection DAG Nodes
82//===--------------------------------------------------------------------===//
83include "AMDILNodes.td"
84
85//===--------------------------------------------------------------------===//
86// Custom Pattern DAG Nodes
87//===--------------------------------------------------------------------===//
88include "AMDILPatterns.td"
89
90//===----------------------------------------------------------------------===//
91// Instruction format classes
92//===----------------------------------------------------------------------===//
93include "AMDILFormats.td"
94
95//===--------------------------------------------------------------------===//
96// Multiclass Instruction formats
97//===--------------------------------------------------------------------===//
98include "AMDILMultiClass.td"
99
100//===--------------------------------------------------------------------===//
101// Intrinsics support
102//===--------------------------------------------------------------------===//
103include "AMDILIntrinsics.td"
104
105//===--------------------------------------------------------------------===//
106// Instructions support
107//===--------------------------------------------------------------------===//
108include "AMDILInstructions.td"
109