11ced546577745d361ad06577914f44f484656d37Alex Deucher/* 21ced546577745d361ad06577914f44f484656d37Alex Deucher * Copyright (C) 2009 Maciej Cencora <m.cencora@gmail.com> 31ced546577745d361ad06577914f44f484656d37Alex Deucher * 41ced546577745d361ad06577914f44f484656d37Alex Deucher * All Rights Reserved. 51ced546577745d361ad06577914f44f484656d37Alex Deucher * 61ced546577745d361ad06577914f44f484656d37Alex Deucher * Permission is hereby granted, free of charge, to any person obtaining 71ced546577745d361ad06577914f44f484656d37Alex Deucher * a copy of this software and associated documentation files (the 81ced546577745d361ad06577914f44f484656d37Alex Deucher * "Software"), to deal in the Software without restriction, including 91ced546577745d361ad06577914f44f484656d37Alex Deucher * without limitation the rights to use, copy, modify, merge, publish, 101ced546577745d361ad06577914f44f484656d37Alex Deucher * distribute, sublicense, and/or sell copies of the Software, and to 111ced546577745d361ad06577914f44f484656d37Alex Deucher * permit persons to whom the Software is furnished to do so, subject to 121ced546577745d361ad06577914f44f484656d37Alex Deucher * the following conditions: 131ced546577745d361ad06577914f44f484656d37Alex Deucher * 141ced546577745d361ad06577914f44f484656d37Alex Deucher * The above copyright notice and this permission notice (including the 151ced546577745d361ad06577914f44f484656d37Alex Deucher * next paragraph) shall be included in all copies or substantial 161ced546577745d361ad06577914f44f484656d37Alex Deucher * portions of the Software. 171ced546577745d361ad06577914f44f484656d37Alex Deucher * 181ced546577745d361ad06577914f44f484656d37Alex Deucher * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 191ced546577745d361ad06577914f44f484656d37Alex Deucher * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 201ced546577745d361ad06577914f44f484656d37Alex Deucher * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 211ced546577745d361ad06577914f44f484656d37Alex Deucher * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 221ced546577745d361ad06577914f44f484656d37Alex Deucher * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 231ced546577745d361ad06577914f44f484656d37Alex Deucher * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 241ced546577745d361ad06577914f44f484656d37Alex Deucher * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 251ced546577745d361ad06577914f44f484656d37Alex Deucher * 261ced546577745d361ad06577914f44f484656d37Alex Deucher */ 271ced546577745d361ad06577914f44f484656d37Alex Deucher 281ced546577745d361ad06577914f44f484656d37Alex Deucher#include "radeon_common.h" 291ced546577745d361ad06577914f44f484656d37Alex Deucher#include "r200_context.h" 301ced546577745d361ad06577914f44f484656d37Alex Deucher#include "r200_blit.h" 311ced546577745d361ad06577914f44f484656d37Alex Deucher 321ced546577745d361ad06577914f44f484656d37Alex Deucherstatic inline uint32_t cmdpacket0(struct radeon_screen *rscrn, 331ced546577745d361ad06577914f44f484656d37Alex Deucher int reg, int count) 341ced546577745d361ad06577914f44f484656d37Alex Deucher{ 351ced546577745d361ad06577914f44f484656d37Alex Deucher if (count) 361ced546577745d361ad06577914f44f484656d37Alex Deucher return CP_PACKET0(reg, count - 1); 371ced546577745d361ad06577914f44f484656d37Alex Deucher return CP_PACKET2; 381ced546577745d361ad06577914f44f484656d37Alex Deucher} 391ced546577745d361ad06577914f44f484656d37Alex Deucher 402b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher/* common formats supported as both textures and render targets */ 41b2596c36c8f73e8bb7a0b1679b491662aeb2f9d9Dave Airlieunsigned r200_check_blit(gl_format mesa_format, uint32_t dst_pitch) 422b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher{ 432b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher /* XXX others? BE/LE? */ 442b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher switch (mesa_format) { 452b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher case MESA_FORMAT_ARGB8888: 462b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher case MESA_FORMAT_XRGB8888: 472b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher case MESA_FORMAT_RGB565: 482b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher case MESA_FORMAT_ARGB4444: 492b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher case MESA_FORMAT_ARGB1555: 502b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher case MESA_FORMAT_A8: 51a840bf4146b7e06cc94eb59d8265fe6593b232c4Alex Deucher case MESA_FORMAT_L8: 52a840bf4146b7e06cc94eb59d8265fe6593b232c4Alex Deucher case MESA_FORMAT_I8: 53644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher /* swizzled */ 54644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher case MESA_FORMAT_RGBA8888: 55644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher case MESA_FORMAT_RGBA8888_REV: 562b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher break; 572b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher default: 582b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher return 0; 592b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher } 602b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher 61b2596c36c8f73e8bb7a0b1679b491662aeb2f9d9Dave Airlie /* Rendering to small buffer doesn't work. 62b2596c36c8f73e8bb7a0b1679b491662aeb2f9d9Dave Airlie * Looks like a hw limitation. 63b2596c36c8f73e8bb7a0b1679b491662aeb2f9d9Dave Airlie */ 64b2596c36c8f73e8bb7a0b1679b491662aeb2f9d9Dave Airlie if (dst_pitch < 32) 65b2596c36c8f73e8bb7a0b1679b491662aeb2f9d9Dave Airlie return 0; 66b2596c36c8f73e8bb7a0b1679b491662aeb2f9d9Dave Airlie 672b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher /* ??? */ 682b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher if (_mesa_get_format_bits(mesa_format, GL_DEPTH_BITS) > 0) 692b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher return 0; 702b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher 712b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher return 1; 722b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher} 732b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher 741ced546577745d361ad06577914f44f484656d37Alex Deucherstatic inline void emit_vtx_state(struct r200_context *r200) 751ced546577745d361ad06577914f44f484656d37Alex Deucher{ 761ced546577745d361ad06577914f44f484656d37Alex Deucher BATCH_LOCALS(&r200->radeon); 771ced546577745d361ad06577914f44f484656d37Alex Deucher 781ced546577745d361ad06577914f44f484656d37Alex Deucher BEGIN_BATCH(14); 791ced546577745d361ad06577914f44f484656d37Alex Deucher if (r200->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) { 801ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH_REGVAL(R200_SE_VAP_CNTL_STATUS, 0); 811ced546577745d361ad06577914f44f484656d37Alex Deucher } else { 821ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH_REGVAL(R200_SE_VAP_CNTL_STATUS, RADEON_TCL_BYPASS); 831ced546577745d361ad06577914f44f484656d37Alex Deucher } 841ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH_REGVAL(R200_SE_VAP_CNTL, (R200_VAP_FORCE_W_TO_ONE | 851ced546577745d361ad06577914f44f484656d37Alex Deucher (9 << R200_VAP_VF_MAX_VTX_NUM__SHIFT))); 861ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH_REGVAL(R200_SE_VTX_STATE_CNTL, 0); 871ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH_REGVAL(R200_SE_VTE_CNTL, 0); 881ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH_REGVAL(R200_SE_VTX_FMT_0, R200_VTX_XY); 891ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH_REGVAL(R200_SE_VTX_FMT_1, (2 << R200_VTX_TEX0_COMP_CNT_SHIFT)); 901ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH_REGVAL(RADEON_SE_CNTL, (RADEON_DIFFUSE_SHADE_GOURAUD | 911ced546577745d361ad06577914f44f484656d37Alex Deucher RADEON_BFACE_SOLID | 921ced546577745d361ad06577914f44f484656d37Alex Deucher RADEON_FFACE_SOLID | 931ced546577745d361ad06577914f44f484656d37Alex Deucher RADEON_VTX_PIX_CENTER_OGL | 941ced546577745d361ad06577914f44f484656d37Alex Deucher RADEON_ROUND_MODE_ROUND | 951ced546577745d361ad06577914f44f484656d37Alex Deucher RADEON_ROUND_PREC_4TH_PIX)); 961ced546577745d361ad06577914f44f484656d37Alex Deucher END_BATCH(); 971ced546577745d361ad06577914f44f484656d37Alex Deucher} 981ced546577745d361ad06577914f44f484656d37Alex Deucher 991ced546577745d361ad06577914f44f484656d37Alex Deucherstatic void inline emit_tx_setup(struct r200_context *r200, 100644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher gl_format src_mesa_format, 101644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher gl_format dst_mesa_format, 1021ced546577745d361ad06577914f44f484656d37Alex Deucher struct radeon_bo *bo, 1031ced546577745d361ad06577914f44f484656d37Alex Deucher intptr_t offset, 1041ced546577745d361ad06577914f44f484656d37Alex Deucher unsigned width, 1051ced546577745d361ad06577914f44f484656d37Alex Deucher unsigned height, 1061ced546577745d361ad06577914f44f484656d37Alex Deucher unsigned pitch) 1071ced546577745d361ad06577914f44f484656d37Alex Deucher{ 1081ced546577745d361ad06577914f44f484656d37Alex Deucher uint32_t txformat = R200_TXFORMAT_NON_POWER2; 1091ced546577745d361ad06577914f44f484656d37Alex Deucher BATCH_LOCALS(&r200->radeon); 1101ced546577745d361ad06577914f44f484656d37Alex Deucher 1115b88a2a22daae4d09596804d8edc6b8796d05150Roland Scheidegger assert(width <= 2048); 1125b88a2a22daae4d09596804d8edc6b8796d05150Roland Scheidegger assert(height <= 2048); 1131ced546577745d361ad06577914f44f484656d37Alex Deucher assert(offset % 32 == 0); 1141ced546577745d361ad06577914f44f484656d37Alex Deucher 1151ced546577745d361ad06577914f44f484656d37Alex Deucher /* XXX others? BE/LE? */ 116644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher switch (src_mesa_format) { 1171ced546577745d361ad06577914f44f484656d37Alex Deucher case MESA_FORMAT_ARGB8888: 1181ced546577745d361ad06577914f44f484656d37Alex Deucher txformat |= R200_TXFORMAT_ARGB8888 | R200_TXFORMAT_ALPHA_IN_MAP; 1191ced546577745d361ad06577914f44f484656d37Alex Deucher break; 120a840bf4146b7e06cc94eb59d8265fe6593b232c4Alex Deucher case MESA_FORMAT_RGBA8888: 121a840bf4146b7e06cc94eb59d8265fe6593b232c4Alex Deucher txformat |= R200_TXFORMAT_RGBA8888 | R200_TXFORMAT_ALPHA_IN_MAP; 122a840bf4146b7e06cc94eb59d8265fe6593b232c4Alex Deucher break; 123a840bf4146b7e06cc94eb59d8265fe6593b232c4Alex Deucher case MESA_FORMAT_RGBA8888_REV: 124a840bf4146b7e06cc94eb59d8265fe6593b232c4Alex Deucher txformat |= R200_TXFORMAT_ABGR8888 | R200_TXFORMAT_ALPHA_IN_MAP; 125a840bf4146b7e06cc94eb59d8265fe6593b232c4Alex Deucher break; 1261ced546577745d361ad06577914f44f484656d37Alex Deucher case MESA_FORMAT_XRGB8888: 1271ced546577745d361ad06577914f44f484656d37Alex Deucher txformat |= R200_TXFORMAT_ARGB8888; 1281ced546577745d361ad06577914f44f484656d37Alex Deucher break; 1291ced546577745d361ad06577914f44f484656d37Alex Deucher case MESA_FORMAT_RGB565: 1301ced546577745d361ad06577914f44f484656d37Alex Deucher txformat |= R200_TXFORMAT_RGB565; 1311ced546577745d361ad06577914f44f484656d37Alex Deucher break; 132a67cd1994f3474dd638af76b2bf5b19490863cbaAlex Deucher case MESA_FORMAT_ARGB4444: 133a67cd1994f3474dd638af76b2bf5b19490863cbaAlex Deucher txformat |= R200_TXFORMAT_ARGB4444 | R200_TXFORMAT_ALPHA_IN_MAP; 134a67cd1994f3474dd638af76b2bf5b19490863cbaAlex Deucher break; 1351ced546577745d361ad06577914f44f484656d37Alex Deucher case MESA_FORMAT_ARGB1555: 1361ced546577745d361ad06577914f44f484656d37Alex Deucher txformat |= R200_TXFORMAT_ARGB1555 | R200_TXFORMAT_ALPHA_IN_MAP; 1371ced546577745d361ad06577914f44f484656d37Alex Deucher break; 1381ced546577745d361ad06577914f44f484656d37Alex Deucher case MESA_FORMAT_A8: 139a840bf4146b7e06cc94eb59d8265fe6593b232c4Alex Deucher case MESA_FORMAT_I8: 1401ced546577745d361ad06577914f44f484656d37Alex Deucher txformat |= R200_TXFORMAT_I8 | R200_TXFORMAT_ALPHA_IN_MAP; 1411ced546577745d361ad06577914f44f484656d37Alex Deucher break; 142a840bf4146b7e06cc94eb59d8265fe6593b232c4Alex Deucher case MESA_FORMAT_L8: 143a840bf4146b7e06cc94eb59d8265fe6593b232c4Alex Deucher txformat |= R200_TXFORMAT_I8; 144a840bf4146b7e06cc94eb59d8265fe6593b232c4Alex Deucher break; 145a840bf4146b7e06cc94eb59d8265fe6593b232c4Alex Deucher case MESA_FORMAT_AL88: 146a840bf4146b7e06cc94eb59d8265fe6593b232c4Alex Deucher txformat |= R200_TXFORMAT_AI88 | R200_TXFORMAT_ALPHA_IN_MAP; 147a840bf4146b7e06cc94eb59d8265fe6593b232c4Alex Deucher break; 1481ced546577745d361ad06577914f44f484656d37Alex Deucher default: 1491ced546577745d361ad06577914f44f484656d37Alex Deucher break; 1501ced546577745d361ad06577914f44f484656d37Alex Deucher } 1511ced546577745d361ad06577914f44f484656d37Alex Deucher 1524d4cecd05b9395316a0d8d2c82a68da9dc7e3ce4Dave Airlie if (bo->flags & RADEON_BO_FLAGS_MACRO_TILE) 1534d4cecd05b9395316a0d8d2c82a68da9dc7e3ce4Dave Airlie offset |= R200_TXO_MACRO_TILE; 1544d4cecd05b9395316a0d8d2c82a68da9dc7e3ce4Dave Airlie if (bo->flags & RADEON_BO_FLAGS_MICRO_TILE) 1554d4cecd05b9395316a0d8d2c82a68da9dc7e3ce4Dave Airlie offset |= R200_TXO_MICRO_TILE; 1564d4cecd05b9395316a0d8d2c82a68da9dc7e3ce4Dave Airlie 157644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher switch (dst_mesa_format) { 158644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher case MESA_FORMAT_ARGB8888: 159644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher case MESA_FORMAT_XRGB8888: 160644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher case MESA_FORMAT_RGB565: 161644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher case MESA_FORMAT_ARGB4444: 162644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher case MESA_FORMAT_ARGB1555: 163644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher case MESA_FORMAT_A8: 164644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher case MESA_FORMAT_L8: 165644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher case MESA_FORMAT_I8: 166644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher default: 167644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher /* no swizzle required */ 168644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher BEGIN_BATCH(10); 169644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(RADEON_PP_CNTL, (RADEON_TEX_0_ENABLE | 170644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher RADEON_TEX_BLEND_0_ENABLE)); 171644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(R200_PP_TXCBLEND_0, (R200_TXC_ARG_A_ZERO | 172644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_ARG_B_ZERO | 173644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_ARG_C_R0_COLOR | 174644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_OP_MADD)); 175644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(R200_PP_TXCBLEND2_0, (R200_TXC_CLAMP_0_1 | 176644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_OUTPUT_REG_R0)); 177644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(R200_PP_TXABLEND_0, (R200_TXA_ARG_A_ZERO | 178644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXA_ARG_B_ZERO | 179644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXA_ARG_C_R0_ALPHA | 180644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXA_OP_MADD)); 181644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(R200_PP_TXABLEND2_0, (R200_TXA_CLAMP_0_1 | 182644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXA_OUTPUT_REG_R0)); 183644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher END_BATCH(); 184644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher break; 185644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher case MESA_FORMAT_RGBA8888: 186644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher BEGIN_BATCH(10); 187644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(RADEON_PP_CNTL, (RADEON_TEX_0_ENABLE | 188644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher RADEON_TEX_BLEND_0_ENABLE)); 189644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(R200_PP_TXCBLEND_0, (R200_TXC_ARG_A_ZERO | 190644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_ARG_B_ZERO | 191644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_ARG_C_R0_COLOR | 192644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_OP_MADD)); 193644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(R200_PP_TXCBLEND2_0, (R200_TXC_CLAMP_0_1 | 194644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_OUTPUT_ROTATE_GBA | 195644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_OUTPUT_REG_R0)); 196644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(R200_PP_TXABLEND_0, (R200_TXA_ARG_A_ZERO | 197644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXA_ARG_B_ZERO | 198644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXA_ARG_C_R0_ALPHA | 199644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXA_OP_MADD)); 200644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(R200_PP_TXABLEND2_0, (R200_TXA_CLAMP_0_1 | 201644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher (R200_TXA_REPL_RED << R200_TXA_REPL_ARG_C_SHIFT) | 202644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXA_OUTPUT_REG_R0)); 203644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher END_BATCH(); 204644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher break; 205644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher case MESA_FORMAT_RGBA8888_REV: 206644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher BEGIN_BATCH(34); 207644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(RADEON_PP_CNTL, (RADEON_TEX_0_ENABLE | 208644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher RADEON_TEX_BLEND_0_ENABLE | 209644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher RADEON_TEX_BLEND_1_ENABLE | 210644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher RADEON_TEX_BLEND_2_ENABLE | 211644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher RADEON_TEX_BLEND_3_ENABLE)); 212644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher /* r1.r = r0.b */ 213644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(R200_PP_TXCBLEND_0, (R200_TXC_ARG_A_ZERO | 214644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_ARG_B_ZERO | 215644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_ARG_C_R0_COLOR | 216644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_OP_MADD)); 217644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(R200_PP_TXCBLEND2_0, (R200_TXC_CLAMP_0_1 | 218644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_OUTPUT_MASK_R | 219644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher (R200_TXC_REPL_BLUE << R200_TXC_REPL_ARG_C_SHIFT) | 220644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_OUTPUT_REG_R1)); 221644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher /* r1.a = r0.a */ 222644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(R200_PP_TXABLEND_0, (R200_TXA_ARG_A_ZERO | 223644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXA_ARG_B_ZERO | 224644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXA_ARG_C_R0_ALPHA | 225644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXA_OP_MADD)); 226644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(R200_PP_TXABLEND2_0, (R200_TXA_CLAMP_0_1 | 227644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXA_OUTPUT_REG_R1)); 228644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher /* r1.g = r0.g */ 229644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(R200_PP_TXCBLEND_1, (R200_TXC_ARG_A_ZERO | 230644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_ARG_B_ZERO | 231644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_ARG_C_R0_COLOR | 232644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_OP_MADD)); 233644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(R200_PP_TXCBLEND2_1, (R200_TXC_CLAMP_0_1 | 234644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_OUTPUT_MASK_G | 235644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher (R200_TXC_REPL_GREEN << R200_TXC_REPL_ARG_C_SHIFT) | 236644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_OUTPUT_REG_R1)); 237644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher /* r1.a = r0.a */ 238644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(R200_PP_TXABLEND_1, (R200_TXA_ARG_A_ZERO | 239644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXA_ARG_B_ZERO | 240644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXA_ARG_C_R0_ALPHA | 241644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXA_OP_MADD)); 242644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(R200_PP_TXABLEND2_1, (R200_TXA_CLAMP_0_1 | 243644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXA_OUTPUT_REG_R1)); 244644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher /* r1.b = r0.r */ 245644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(R200_PP_TXCBLEND_2, (R200_TXC_ARG_A_ZERO | 246644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_ARG_B_ZERO | 247644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_ARG_C_R0_COLOR | 248644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_OP_MADD)); 249644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(R200_PP_TXCBLEND2_2, (R200_TXC_CLAMP_0_1 | 250644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_OUTPUT_MASK_B | 251644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher (R200_TXC_REPL_RED << R200_TXC_REPL_ARG_C_SHIFT) | 252644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_OUTPUT_REG_R1)); 253644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher /* r1.a = r0.a */ 254644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(R200_PP_TXABLEND_2, (R200_TXA_ARG_A_ZERO | 255644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXA_ARG_B_ZERO | 256644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXA_ARG_C_R0_ALPHA | 257644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXA_OP_MADD)); 258644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(R200_PP_TXABLEND2_2, (R200_TXA_CLAMP_0_1 | 259644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXA_OUTPUT_REG_R1)); 260644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher /* r0.rgb = r1.rgb */ 261644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(R200_PP_TXCBLEND_3, (R200_TXC_ARG_A_ZERO | 262644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_ARG_B_ZERO | 263644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_ARG_C_R1_COLOR | 264644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_OP_MADD)); 265644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(R200_PP_TXCBLEND2_3, (R200_TXC_CLAMP_0_1 | 266644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXC_OUTPUT_REG_R0)); 267644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher /* r0.a = r1.a */ 268644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(R200_PP_TXABLEND_3, (R200_TXA_ARG_A_ZERO | 269644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXA_ARG_B_ZERO | 270644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXA_ARG_C_R1_ALPHA | 271644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXA_OP_MADD)); 272644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(R200_PP_TXABLEND2_3, (R200_TXA_CLAMP_0_1 | 273644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher R200_TXA_OUTPUT_REG_R0)); 274644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher END_BATCH(); 275644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher break; 276644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher } 277644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher 278644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher BEGIN_BATCH(18); 2791ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH_REGVAL(R200_PP_CNTL_X, 0); 2801ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH_REGVAL(R200_PP_TXMULTI_CTL_0, 0); 2811ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH_REGVAL(R200_PP_TXFILTER_0, (R200_CLAMP_S_CLAMP_LAST | 2821ced546577745d361ad06577914f44f484656d37Alex Deucher R200_CLAMP_T_CLAMP_LAST | 2831ced546577745d361ad06577914f44f484656d37Alex Deucher R200_MAG_FILTER_NEAREST | 2841ced546577745d361ad06577914f44f484656d37Alex Deucher R200_MIN_FILTER_NEAREST)); 2851ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH_REGVAL(R200_PP_TXFORMAT_0, txformat); 2861ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH_REGVAL(R200_PP_TXFORMAT_X_0, 0); 2871ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH_REGVAL(R200_PP_TXSIZE_0, ((width - 1) | 2881ced546577745d361ad06577914f44f484656d37Alex Deucher ((height - 1) << RADEON_TEX_VSIZE_SHIFT))); 289644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher OUT_BATCH_REGVAL(R200_PP_TXPITCH_0, pitch * _mesa_get_format_bytes(src_mesa_format) - 32); 2901ced546577745d361ad06577914f44f484656d37Alex Deucher 2911ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH_REGSEQ(R200_PP_TXOFFSET_0, 1); 29271f1d468b4e183c45e4f76f7951beb44dd74a707Dave Airlie OUT_BATCH_RELOC(offset, bo, offset, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0); 2931ced546577745d361ad06577914f44f484656d37Alex Deucher 2941ced546577745d361ad06577914f44f484656d37Alex Deucher END_BATCH(); 2951ced546577745d361ad06577914f44f484656d37Alex Deucher} 2961ced546577745d361ad06577914f44f484656d37Alex Deucher 2971ced546577745d361ad06577914f44f484656d37Alex Deucherstatic inline void emit_cb_setup(struct r200_context *r200, 2981ced546577745d361ad06577914f44f484656d37Alex Deucher struct radeon_bo *bo, 2991ced546577745d361ad06577914f44f484656d37Alex Deucher intptr_t offset, 3001ced546577745d361ad06577914f44f484656d37Alex Deucher gl_format mesa_format, 3011ced546577745d361ad06577914f44f484656d37Alex Deucher unsigned pitch, 3021ced546577745d361ad06577914f44f484656d37Alex Deucher unsigned width, 3031ced546577745d361ad06577914f44f484656d37Alex Deucher unsigned height) 3041ced546577745d361ad06577914f44f484656d37Alex Deucher{ 3051bb6b1d9dbabafdb864ee112526b1212744ac614Alex Deucher uint32_t dst_pitch = pitch; 3061ced546577745d361ad06577914f44f484656d37Alex Deucher uint32_t dst_format = 0; 3071ced546577745d361ad06577914f44f484656d37Alex Deucher BATCH_LOCALS(&r200->radeon); 3081ced546577745d361ad06577914f44f484656d37Alex Deucher 3091ced546577745d361ad06577914f44f484656d37Alex Deucher /* XXX others? BE/LE? */ 3101ced546577745d361ad06577914f44f484656d37Alex Deucher switch (mesa_format) { 3111ced546577745d361ad06577914f44f484656d37Alex Deucher case MESA_FORMAT_ARGB8888: 3121ced546577745d361ad06577914f44f484656d37Alex Deucher case MESA_FORMAT_XRGB8888: 313644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher case MESA_FORMAT_RGBA8888: 314644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher case MESA_FORMAT_RGBA8888_REV: 3151ced546577745d361ad06577914f44f484656d37Alex Deucher dst_format = RADEON_COLOR_FORMAT_ARGB8888; 3161ced546577745d361ad06577914f44f484656d37Alex Deucher break; 3171ced546577745d361ad06577914f44f484656d37Alex Deucher case MESA_FORMAT_RGB565: 3181ced546577745d361ad06577914f44f484656d37Alex Deucher dst_format = RADEON_COLOR_FORMAT_RGB565; 3191ced546577745d361ad06577914f44f484656d37Alex Deucher break; 320a67cd1994f3474dd638af76b2bf5b19490863cbaAlex Deucher case MESA_FORMAT_ARGB4444: 321a67cd1994f3474dd638af76b2bf5b19490863cbaAlex Deucher dst_format = RADEON_COLOR_FORMAT_ARGB4444; 322a67cd1994f3474dd638af76b2bf5b19490863cbaAlex Deucher break; 3231ced546577745d361ad06577914f44f484656d37Alex Deucher case MESA_FORMAT_ARGB1555: 3241ced546577745d361ad06577914f44f484656d37Alex Deucher dst_format = RADEON_COLOR_FORMAT_ARGB1555; 3251ced546577745d361ad06577914f44f484656d37Alex Deucher break; 3261ced546577745d361ad06577914f44f484656d37Alex Deucher case MESA_FORMAT_A8: 327a840bf4146b7e06cc94eb59d8265fe6593b232c4Alex Deucher case MESA_FORMAT_L8: 328a840bf4146b7e06cc94eb59d8265fe6593b232c4Alex Deucher case MESA_FORMAT_I8: 3291ced546577745d361ad06577914f44f484656d37Alex Deucher dst_format = RADEON_COLOR_FORMAT_RGB8; 3301ced546577745d361ad06577914f44f484656d37Alex Deucher break; 3311ced546577745d361ad06577914f44f484656d37Alex Deucher default: 3321ced546577745d361ad06577914f44f484656d37Alex Deucher break; 3331ced546577745d361ad06577914f44f484656d37Alex Deucher } 3341ced546577745d361ad06577914f44f484656d37Alex Deucher 3354d4cecd05b9395316a0d8d2c82a68da9dc7e3ce4Dave Airlie if (bo->flags & RADEON_BO_FLAGS_MACRO_TILE) 3364d4cecd05b9395316a0d8d2c82a68da9dc7e3ce4Dave Airlie dst_pitch |= R200_COLOR_TILE_ENABLE; 3374d4cecd05b9395316a0d8d2c82a68da9dc7e3ce4Dave Airlie if (bo->flags & RADEON_BO_FLAGS_MICRO_TILE) 3384d4cecd05b9395316a0d8d2c82a68da9dc7e3ce4Dave Airlie dst_pitch |= R200_COLOR_MICROTILE_ENABLE; 3394d4cecd05b9395316a0d8d2c82a68da9dc7e3ce4Dave Airlie 3401ced546577745d361ad06577914f44f484656d37Alex Deucher BEGIN_BATCH_NO_AUTOSTATE(22); 3411ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH_REGVAL(R200_RE_AUX_SCISSOR_CNTL, 0); 3421ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH_REGVAL(R200_RE_CNTL, 0); 3431ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH_REGVAL(RADEON_RE_TOP_LEFT, 0); 3445b88a2a22daae4d09596804d8edc6b8796d05150Roland Scheidegger OUT_BATCH_REGVAL(RADEON_RE_WIDTH_HEIGHT, (((width - 1) << RADEON_RE_WIDTH_SHIFT) | 3455b88a2a22daae4d09596804d8edc6b8796d05150Roland Scheidegger ((height - 1) << RADEON_RE_HEIGHT_SHIFT))); 3461ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH_REGVAL(RADEON_RB3D_PLANEMASK, 0xffffffff); 3471ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH_REGVAL(RADEON_RB3D_BLENDCNTL, RADEON_SRC_BLEND_GL_ONE | RADEON_DST_BLEND_GL_ZERO); 3481ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH_REGVAL(RADEON_RB3D_CNTL, dst_format); 3491ced546577745d361ad06577914f44f484656d37Alex Deucher 3501ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH_REGSEQ(RADEON_RB3D_COLOROFFSET, 1); 35171f1d468b4e183c45e4f76f7951beb44dd74a707Dave Airlie OUT_BATCH_RELOC(offset, bo, offset, 0, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0); 3521ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH_REGSEQ(RADEON_RB3D_COLORPITCH, 1); 3531ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH_RELOC(dst_pitch, bo, dst_pitch, 0, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0); 3541ced546577745d361ad06577914f44f484656d37Alex Deucher 3551ced546577745d361ad06577914f44f484656d37Alex Deucher END_BATCH(); 3561ced546577745d361ad06577914f44f484656d37Alex Deucher} 3571ced546577745d361ad06577914f44f484656d37Alex Deucher 3581ced546577745d361ad06577914f44f484656d37Alex Deucherstatic GLboolean validate_buffers(struct r200_context *r200, 3591ced546577745d361ad06577914f44f484656d37Alex Deucher struct radeon_bo *src_bo, 3601ced546577745d361ad06577914f44f484656d37Alex Deucher struct radeon_bo *dst_bo) 3611ced546577745d361ad06577914f44f484656d37Alex Deucher{ 3621ced546577745d361ad06577914f44f484656d37Alex Deucher int ret; 3637959274858fe66a90e6f97fed81141c39cb6702bAlex Deucher 3647959274858fe66a90e6f97fed81141c39cb6702bAlex Deucher radeon_cs_space_reset_bos(r200->radeon.cmdbuf.cs); 3657959274858fe66a90e6f97fed81141c39cb6702bAlex Deucher 366daf85c460875c944d6918fdf4041467d97cba41eDave Airlie ret = radeon_cs_space_check_with_bo(r200->radeon.cmdbuf.cs, 36739ab5ae30c303dd561252cb592d4de35814b6a70Alex Deucher src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0); 368daf85c460875c944d6918fdf4041467d97cba41eDave Airlie if (ret) 369daf85c460875c944d6918fdf4041467d97cba41eDave Airlie return GL_FALSE; 3701ced546577745d361ad06577914f44f484656d37Alex Deucher 371daf85c460875c944d6918fdf4041467d97cba41eDave Airlie ret = radeon_cs_space_check_with_bo(r200->radeon.cmdbuf.cs, 37239ab5ae30c303dd561252cb592d4de35814b6a70Alex Deucher dst_bo, 0, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT); 3731ced546577745d361ad06577914f44f484656d37Alex Deucher if (ret) 3741ced546577745d361ad06577914f44f484656d37Alex Deucher return GL_FALSE; 3751ced546577745d361ad06577914f44f484656d37Alex Deucher 3761ced546577745d361ad06577914f44f484656d37Alex Deucher return GL_TRUE; 3771ced546577745d361ad06577914f44f484656d37Alex Deucher} 3781ced546577745d361ad06577914f44f484656d37Alex Deucher 3791ced546577745d361ad06577914f44f484656d37Alex Deucher/** 3801ced546577745d361ad06577914f44f484656d37Alex Deucher * Calculate texcoords for given image region. 3811ced546577745d361ad06577914f44f484656d37Alex Deucher * Output values are [minx, maxx, miny, maxy] 3821ced546577745d361ad06577914f44f484656d37Alex Deucher */ 3831ced546577745d361ad06577914f44f484656d37Alex Deucherstatic inline void calc_tex_coords(float img_width, float img_height, 3841ced546577745d361ad06577914f44f484656d37Alex Deucher float x, float y, 3851ced546577745d361ad06577914f44f484656d37Alex Deucher float reg_width, float reg_height, 3861ced546577745d361ad06577914f44f484656d37Alex Deucher unsigned flip_y, float *buf) 3871ced546577745d361ad06577914f44f484656d37Alex Deucher{ 3881ced546577745d361ad06577914f44f484656d37Alex Deucher buf[0] = x / img_width; 3891ced546577745d361ad06577914f44f484656d37Alex Deucher buf[1] = buf[0] + reg_width / img_width; 3901ced546577745d361ad06577914f44f484656d37Alex Deucher buf[2] = y / img_height; 3911ced546577745d361ad06577914f44f484656d37Alex Deucher buf[3] = buf[2] + reg_height / img_height; 3921ced546577745d361ad06577914f44f484656d37Alex Deucher if (flip_y) 3931ced546577745d361ad06577914f44f484656d37Alex Deucher { 3945a99ca490fee65d37a4c7469888680b412d27f7fAlex Deucher buf[2] = 1.0 - buf[2]; 39576cf2618327a7f008dcfd0d91d64d6d9e01f9a9cAlex Deucher buf[3] = 1.0 - buf[3]; 3961ced546577745d361ad06577914f44f484656d37Alex Deucher } 3971ced546577745d361ad06577914f44f484656d37Alex Deucher} 3981ced546577745d361ad06577914f44f484656d37Alex Deucher 3991ced546577745d361ad06577914f44f484656d37Alex Deucherstatic inline void emit_draw_packet(struct r200_context *r200, 4001ced546577745d361ad06577914f44f484656d37Alex Deucher unsigned src_width, unsigned src_height, 4011ced546577745d361ad06577914f44f484656d37Alex Deucher unsigned src_x_offset, unsigned src_y_offset, 4021ced546577745d361ad06577914f44f484656d37Alex Deucher unsigned dst_x_offset, unsigned dst_y_offset, 4031ced546577745d361ad06577914f44f484656d37Alex Deucher unsigned reg_width, unsigned reg_height, 4041ced546577745d361ad06577914f44f484656d37Alex Deucher unsigned flip_y) 4051ced546577745d361ad06577914f44f484656d37Alex Deucher{ 4061ced546577745d361ad06577914f44f484656d37Alex Deucher float texcoords[4]; 4071ced546577745d361ad06577914f44f484656d37Alex Deucher float verts[12]; 4081ced546577745d361ad06577914f44f484656d37Alex Deucher BATCH_LOCALS(&r200->radeon); 4091ced546577745d361ad06577914f44f484656d37Alex Deucher 4101ced546577745d361ad06577914f44f484656d37Alex Deucher calc_tex_coords(src_width, src_height, 4111ced546577745d361ad06577914f44f484656d37Alex Deucher src_x_offset, src_y_offset, 4121ced546577745d361ad06577914f44f484656d37Alex Deucher reg_width, reg_height, 4131ced546577745d361ad06577914f44f484656d37Alex Deucher flip_y, texcoords); 4141ced546577745d361ad06577914f44f484656d37Alex Deucher 4151ced546577745d361ad06577914f44f484656d37Alex Deucher verts[0] = dst_x_offset; 4161ced546577745d361ad06577914f44f484656d37Alex Deucher verts[1] = dst_y_offset + reg_height; 4171ced546577745d361ad06577914f44f484656d37Alex Deucher verts[2] = texcoords[0]; 41876cf2618327a7f008dcfd0d91d64d6d9e01f9a9cAlex Deucher verts[3] = texcoords[3]; 4191ced546577745d361ad06577914f44f484656d37Alex Deucher 4201ced546577745d361ad06577914f44f484656d37Alex Deucher verts[4] = dst_x_offset + reg_width; 4211ced546577745d361ad06577914f44f484656d37Alex Deucher verts[5] = dst_y_offset + reg_height; 4221ced546577745d361ad06577914f44f484656d37Alex Deucher verts[6] = texcoords[1]; 42376cf2618327a7f008dcfd0d91d64d6d9e01f9a9cAlex Deucher verts[7] = texcoords[3]; 4241ced546577745d361ad06577914f44f484656d37Alex Deucher 4251ced546577745d361ad06577914f44f484656d37Alex Deucher verts[8] = dst_x_offset + reg_width; 4261ced546577745d361ad06577914f44f484656d37Alex Deucher verts[9] = dst_y_offset; 4271ced546577745d361ad06577914f44f484656d37Alex Deucher verts[10] = texcoords[1]; 42876cf2618327a7f008dcfd0d91d64d6d9e01f9a9cAlex Deucher verts[11] = texcoords[2]; 4291ced546577745d361ad06577914f44f484656d37Alex Deucher 4301ced546577745d361ad06577914f44f484656d37Alex Deucher BEGIN_BATCH(14); 4311ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH(R200_CP_CMD_3D_DRAW_IMMD_2 | (12 << 16)); 4321ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH(RADEON_CP_VC_CNTL_PRIM_WALK_RING | 4331ced546577745d361ad06577914f44f484656d37Alex Deucher RADEON_CP_VC_CNTL_PRIM_TYPE_RECT_LIST | 4341ced546577745d361ad06577914f44f484656d37Alex Deucher (3 << 16)); 4351ced546577745d361ad06577914f44f484656d37Alex Deucher OUT_BATCH_TABLE(verts, 12); 4361ced546577745d361ad06577914f44f484656d37Alex Deucher END_BATCH(); 4371ced546577745d361ad06577914f44f484656d37Alex Deucher} 4381ced546577745d361ad06577914f44f484656d37Alex Deucher 4391ced546577745d361ad06577914f44f484656d37Alex Deucher/** 4401ced546577745d361ad06577914f44f484656d37Alex Deucher * Copy a region of [@a width x @a height] pixels from source buffer 4411ced546577745d361ad06577914f44f484656d37Alex Deucher * to destination buffer. 4421ced546577745d361ad06577914f44f484656d37Alex Deucher * @param[in] r200 r200 context 4431ced546577745d361ad06577914f44f484656d37Alex Deucher * @param[in] src_bo source radeon buffer object 4441ced546577745d361ad06577914f44f484656d37Alex Deucher * @param[in] src_offset offset of the source image in the @a src_bo 4451ced546577745d361ad06577914f44f484656d37Alex Deucher * @param[in] src_mesaformat source image format 4461ced546577745d361ad06577914f44f484656d37Alex Deucher * @param[in] src_pitch aligned source image width 4471ced546577745d361ad06577914f44f484656d37Alex Deucher * @param[in] src_width source image width 4481ced546577745d361ad06577914f44f484656d37Alex Deucher * @param[in] src_height source image height 4491ced546577745d361ad06577914f44f484656d37Alex Deucher * @param[in] src_x_offset x offset in the source image 4501ced546577745d361ad06577914f44f484656d37Alex Deucher * @param[in] src_y_offset y offset in the source image 4511ced546577745d361ad06577914f44f484656d37Alex Deucher * @param[in] dst_bo destination radeon buffer object 4521ced546577745d361ad06577914f44f484656d37Alex Deucher * @param[in] dst_offset offset of the destination image in the @a dst_bo 4531ced546577745d361ad06577914f44f484656d37Alex Deucher * @param[in] dst_mesaformat destination image format 4541ced546577745d361ad06577914f44f484656d37Alex Deucher * @param[in] dst_pitch aligned destination image width 4551ced546577745d361ad06577914f44f484656d37Alex Deucher * @param[in] dst_width destination image width 4561ced546577745d361ad06577914f44f484656d37Alex Deucher * @param[in] dst_height destination image height 4571ced546577745d361ad06577914f44f484656d37Alex Deucher * @param[in] dst_x_offset x offset in the destination image 4581ced546577745d361ad06577914f44f484656d37Alex Deucher * @param[in] dst_y_offset y offset in the destination image 4591ced546577745d361ad06577914f44f484656d37Alex Deucher * @param[in] width region width 4601ced546577745d361ad06577914f44f484656d37Alex Deucher * @param[in] height region height 4611ced546577745d361ad06577914f44f484656d37Alex Deucher * @param[in] flip_y set if y coords of the source image need to be flipped 4621ced546577745d361ad06577914f44f484656d37Alex Deucher */ 463f9995b30756140724f41daf963fa06167912be7fKristian Høgsbergunsigned r200_blit(struct gl_context *ctx, 4642706bc6a8898c7d7e155440cfa793035e56186b8Maciej Cencora struct radeon_bo *src_bo, 4652706bc6a8898c7d7e155440cfa793035e56186b8Maciej Cencora intptr_t src_offset, 4662706bc6a8898c7d7e155440cfa793035e56186b8Maciej Cencora gl_format src_mesaformat, 4672706bc6a8898c7d7e155440cfa793035e56186b8Maciej Cencora unsigned src_pitch, 4682706bc6a8898c7d7e155440cfa793035e56186b8Maciej Cencora unsigned src_width, 4692706bc6a8898c7d7e155440cfa793035e56186b8Maciej Cencora unsigned src_height, 4702706bc6a8898c7d7e155440cfa793035e56186b8Maciej Cencora unsigned src_x_offset, 4712706bc6a8898c7d7e155440cfa793035e56186b8Maciej Cencora unsigned src_y_offset, 4722706bc6a8898c7d7e155440cfa793035e56186b8Maciej Cencora struct radeon_bo *dst_bo, 4732706bc6a8898c7d7e155440cfa793035e56186b8Maciej Cencora intptr_t dst_offset, 4742706bc6a8898c7d7e155440cfa793035e56186b8Maciej Cencora gl_format dst_mesaformat, 4752706bc6a8898c7d7e155440cfa793035e56186b8Maciej Cencora unsigned dst_pitch, 4762706bc6a8898c7d7e155440cfa793035e56186b8Maciej Cencora unsigned dst_width, 4772706bc6a8898c7d7e155440cfa793035e56186b8Maciej Cencora unsigned dst_height, 4782706bc6a8898c7d7e155440cfa793035e56186b8Maciej Cencora unsigned dst_x_offset, 4792706bc6a8898c7d7e155440cfa793035e56186b8Maciej Cencora unsigned dst_y_offset, 4802706bc6a8898c7d7e155440cfa793035e56186b8Maciej Cencora unsigned reg_width, 4812706bc6a8898c7d7e155440cfa793035e56186b8Maciej Cencora unsigned reg_height, 4822706bc6a8898c7d7e155440cfa793035e56186b8Maciej Cencora unsigned flip_y) 4831ced546577745d361ad06577914f44f484656d37Alex Deucher{ 4842706bc6a8898c7d7e155440cfa793035e56186b8Maciej Cencora struct r200_context *r200 = R200_CONTEXT(ctx); 4852706bc6a8898c7d7e155440cfa793035e56186b8Maciej Cencora 486b2596c36c8f73e8bb7a0b1679b491662aeb2f9d9Dave Airlie if (!r200_check_blit(dst_mesaformat, dst_pitch)) 4871ced546577745d361ad06577914f44f484656d37Alex Deucher return GL_FALSE; 4881ced546577745d361ad06577914f44f484656d37Alex Deucher 4891ced546577745d361ad06577914f44f484656d37Alex Deucher /* Make sure that colorbuffer has even width - hw limitation */ 4901ced546577745d361ad06577914f44f484656d37Alex Deucher if (dst_pitch % 2 > 0) 4911ced546577745d361ad06577914f44f484656d37Alex Deucher ++dst_pitch; 4921ced546577745d361ad06577914f44f484656d37Alex Deucher 4931ced546577745d361ad06577914f44f484656d37Alex Deucher /* Need to clamp the region size to make sure 4941ced546577745d361ad06577914f44f484656d37Alex Deucher * we don't read outside of the source buffer 4951ced546577745d361ad06577914f44f484656d37Alex Deucher * or write outside of the destination buffer. 4961ced546577745d361ad06577914f44f484656d37Alex Deucher */ 4971ced546577745d361ad06577914f44f484656d37Alex Deucher if (reg_width + src_x_offset > src_width) 4981ced546577745d361ad06577914f44f484656d37Alex Deucher reg_width = src_width - src_x_offset; 4991ced546577745d361ad06577914f44f484656d37Alex Deucher if (reg_height + src_y_offset > src_height) 5001ced546577745d361ad06577914f44f484656d37Alex Deucher reg_height = src_height - src_y_offset; 5011ced546577745d361ad06577914f44f484656d37Alex Deucher if (reg_width + dst_x_offset > dst_width) 5021ced546577745d361ad06577914f44f484656d37Alex Deucher reg_width = dst_width - dst_x_offset; 5031ced546577745d361ad06577914f44f484656d37Alex Deucher if (reg_height + dst_y_offset > dst_height) 5041ced546577745d361ad06577914f44f484656d37Alex Deucher reg_height = dst_height - dst_y_offset; 5051ced546577745d361ad06577914f44f484656d37Alex Deucher 5061ced546577745d361ad06577914f44f484656d37Alex Deucher if (src_bo == dst_bo) { 5071ced546577745d361ad06577914f44f484656d37Alex Deucher return GL_FALSE; 5081ced546577745d361ad06577914f44f484656d37Alex Deucher } 5091ced546577745d361ad06577914f44f484656d37Alex Deucher 510156c90e5c3289fda8290bdd04c5cb5041a65113dAlex Deucher if (src_offset % 32 || dst_offset % 32) { 511156c90e5c3289fda8290bdd04c5cb5041a65113dAlex Deucher return GL_FALSE; 512156c90e5c3289fda8290bdd04c5cb5041a65113dAlex Deucher } 513156c90e5c3289fda8290bdd04c5cb5041a65113dAlex Deucher 5141ced546577745d361ad06577914f44f484656d37Alex Deucher if (0) { 5151ced546577745d361ad06577914f44f484656d37Alex Deucher fprintf(stderr, "src: size [%d x %d], pitch %d, " 5161ced546577745d361ad06577914f44f484656d37Alex Deucher "offset [%d x %d], format %s, bo %p\n", 5171ced546577745d361ad06577914f44f484656d37Alex Deucher src_width, src_height, src_pitch, 5181ced546577745d361ad06577914f44f484656d37Alex Deucher src_x_offset, src_y_offset, 5191ced546577745d361ad06577914f44f484656d37Alex Deucher _mesa_get_format_name(src_mesaformat), 5201ced546577745d361ad06577914f44f484656d37Alex Deucher src_bo); 5211ced546577745d361ad06577914f44f484656d37Alex Deucher fprintf(stderr, "dst: pitch %d, offset[%d x %d], format %s, bo %p\n", 5221ced546577745d361ad06577914f44f484656d37Alex Deucher dst_pitch, dst_x_offset, dst_y_offset, 5231ced546577745d361ad06577914f44f484656d37Alex Deucher _mesa_get_format_name(dst_mesaformat), dst_bo); 5241ced546577745d361ad06577914f44f484656d37Alex Deucher fprintf(stderr, "region: %d x %d\n", reg_width, reg_height); 5251ced546577745d361ad06577914f44f484656d37Alex Deucher } 5261ced546577745d361ad06577914f44f484656d37Alex Deucher 5271ced546577745d361ad06577914f44f484656d37Alex Deucher /* Flush is needed to make sure that source buffer has correct data */ 5281ced546577745d361ad06577914f44f484656d37Alex Deucher radeonFlush(r200->radeon.glCtx); 5291ced546577745d361ad06577914f44f484656d37Alex Deucher 530644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher rcommonEnsureCmdBufSpace(&r200->radeon, 102, __FUNCTION__); 5311ced546577745d361ad06577914f44f484656d37Alex Deucher 5321ced546577745d361ad06577914f44f484656d37Alex Deucher if (!validate_buffers(r200, src_bo, dst_bo)) 5331ced546577745d361ad06577914f44f484656d37Alex Deucher return GL_FALSE; 5341ced546577745d361ad06577914f44f484656d37Alex Deucher 5351ced546577745d361ad06577914f44f484656d37Alex Deucher /* 14 */ 5361ced546577745d361ad06577914f44f484656d37Alex Deucher emit_vtx_state(r200); 537644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher /* 52 */ 538644a05c6cb3ebabc600f6d529b54c71fd2c0c84cAlex Deucher emit_tx_setup(r200, src_mesaformat, dst_mesaformat, src_bo, src_offset, src_width, src_height, src_pitch); 5391ced546577745d361ad06577914f44f484656d37Alex Deucher /* 22 */ 5401ced546577745d361ad06577914f44f484656d37Alex Deucher emit_cb_setup(r200, dst_bo, dst_offset, dst_mesaformat, dst_pitch, dst_width, dst_height); 5411ced546577745d361ad06577914f44f484656d37Alex Deucher /* 14 */ 5421ced546577745d361ad06577914f44f484656d37Alex Deucher emit_draw_packet(r200, src_width, src_height, 5431ced546577745d361ad06577914f44f484656d37Alex Deucher src_x_offset, src_y_offset, 5441ced546577745d361ad06577914f44f484656d37Alex Deucher dst_x_offset, dst_y_offset, 5451ced546577745d361ad06577914f44f484656d37Alex Deucher reg_width, reg_height, 5461ced546577745d361ad06577914f44f484656d37Alex Deucher flip_y); 5471ced546577745d361ad06577914f44f484656d37Alex Deucher 5482706bc6a8898c7d7e155440cfa793035e56186b8Maciej Cencora radeonFlush(ctx); 5491ced546577745d361ad06577914f44f484656d37Alex Deucher 5501ced546577745d361ad06577914f44f484656d37Alex Deucher return GL_TRUE; 5511ced546577745d361ad06577914f44f484656d37Alex Deucher} 552