radeon_chipset.h revision 5a143e91dcaf64d77694b85671c214f93e3e8512
1#ifndef _RADEON_CHIPSET_H 2#define _RADEON_CHIPSET_H 3/* Including xf86PciInfo.h introduces a bunch of errors... 4 */ 5 6/* General chip classes: 7 * r100 includes R100, RV100, RV200, RS100, RS200, RS250. 8 * r200 includes R200, RV250, RV280, RS300. 9 * r300 includes R300, RV350, RV370. 10 * (RS* denotes IGP) 11 */ 12#define PCI_CHIP_RV380_3150 0x3150 13#define PCI_CHIP_RV380_3152 0x3152 14#define PCI_CHIP_RV380_3154 0x3154 15#define PCI_CHIP_RV380_3E50 0x3E50 16#define PCI_CHIP_RV380_3E54 0x3E54 17#define PCI_CHIP_RS100_4136 0x4136 18#define PCI_CHIP_RS200_4137 0x4137 19#define PCI_CHIP_R300_AD 0x4144 20#define PCI_CHIP_R300_AE 0x4145 21#define PCI_CHIP_R300_AF 0x4146 22#define PCI_CHIP_R300_AG 0x4147 23#define PCI_CHIP_R350_AH 0x4148 24#define PCI_CHIP_R350_AI 0x4149 25#define PCI_CHIP_R350_AJ 0x414A 26#define PCI_CHIP_R350_AK 0x414B 27#define PCI_CHIP_RV350_AP 0x4150 28#define PCI_CHIP_RV350_AQ 0x4151 29#define PCI_CHIP_RV350_AR 0x4152 30#define PCI_CHIP_RV350_AS 0x4153 31#define PCI_CHIP_RV350_AT 0x4154 32#define PCI_CHIP_RV350_AU 0x4155 33#define PCI_CHIP_RV350_AV 0x4156 34#define PCI_CHIP_RS250_4237 0x4237 35#define PCI_CHIP_R200_BB 0x4242 36#define PCI_CHIP_R200_BC 0x4243 37#define PCI_CHIP_RS100_4336 0x4336 38#define PCI_CHIP_RS200_4337 0x4337 39#define PCI_CHIP_RS250_4437 0x4437 40#define PCI_CHIP_RV250_If 0x4966 41#define PCI_CHIP_RV250_Ig 0x4967 42#define PCI_CHIP_R420_JH 0x4A48 43#define PCI_CHIP_R420_JI 0x4A49 44#define PCI_CHIP_R420_JJ 0x4A4A 45#define PCI_CHIP_R420_JK 0x4A4B 46#define PCI_CHIP_R420_JL 0x4A4C 47#define PCI_CHIP_R420_JM 0x4A4D 48#define PCI_CHIP_R420_JN 0x4A4E 49#define PCI_CHIP_R420_JO 0x4A4F 50#define PCI_CHIP_R420_JP 0x4A50 51#define PCI_CHIP_R420_JT 0x4A54 52#define PCI_CHIP_R481_4B49 0x4B49 53#define PCI_CHIP_R481_4B4A 0x4B4A 54#define PCI_CHIP_R481_4B4B 0x4B4B 55#define PCI_CHIP_R481_4B4C 0x4B4C 56#define PCI_CHIP_RADEON_LW 0x4C57 57#define PCI_CHIP_RADEON_LX 0x4C58 58#define PCI_CHIP_RADEON_LY 0x4C59 59#define PCI_CHIP_RADEON_LZ 0x4C5A 60#define PCI_CHIP_RV250_Ld 0x4C64 61#define PCI_CHIP_RV250_Lf 0x4C66 62#define PCI_CHIP_RV250_Lg 0x4C67 63#define PCI_CHIP_R300_ND 0x4E44 64#define PCI_CHIP_R300_NE 0x4E45 65#define PCI_CHIP_R300_NF 0x4E46 66#define PCI_CHIP_R300_NG 0x4E47 67#define PCI_CHIP_R350_NH 0x4E48 68#define PCI_CHIP_R350_NI 0x4E49 69#define PCI_CHIP_R360_NJ 0x4E4A 70#define PCI_CHIP_R350_NK 0x4E4B 71#define PCI_CHIP_RV350_NP 0x4E50 72#define PCI_CHIP_RV350_NQ 0x4E51 73#define PCI_CHIP_RV350_NR 0x4E52 74#define PCI_CHIP_RV350_NS 0x4E53 75#define PCI_CHIP_RV350_NT 0x4E54 76#define PCI_CHIP_RV350_NV 0x4E56 77#define PCI_CHIP_RADEON_QD 0x5144 78#define PCI_CHIP_RADEON_QE 0x5145 79#define PCI_CHIP_RADEON_QF 0x5146 80#define PCI_CHIP_RADEON_QG 0x5147 81#define PCI_CHIP_R200_QH 0x5148 82#define PCI_CHIP_R200_QL 0x514C 83#define PCI_CHIP_R200_QM 0x514D 84#define PCI_CHIP_RV200_QW 0x5157 85#define PCI_CHIP_RV200_QX 0x5158 86#define PCI_CHIP_RADEON_QY 0x5159 87#define PCI_CHIP_RADEON_QZ 0x515A 88#define PCI_CHIP_RN50_515E 0x515E 89#define PCI_CHIP_RV370_5460 0x5460 90#define PCI_CHIP_RV370_5462 0x5462 91#define PCI_CHIP_RV370_5464 0x5464 92#define PCI_CHIP_R423_UH 0x5548 93#define PCI_CHIP_R423_UI 0x5549 94#define PCI_CHIP_R423_UJ 0x554A 95#define PCI_CHIP_R423_UK 0x554B 96#define PCI_CHIP_R430_554C 0x554C 97#define PCI_CHIP_R430_554D 0x554D 98#define PCI_CHIP_R430_554E 0x554E 99#define PCI_CHIP_R430_554F 0x554F 100#define PCI_CHIP_R423_5550 0x5550 101#define PCI_CHIP_R423_UQ 0x5551 102#define PCI_CHIP_R423_UR 0x5552 103#define PCI_CHIP_R423_UT 0x5554 104#define PCI_CHIP_RV410_564A 0x564A 105#define PCI_CHIP_RV410_564B 0x564B 106#define PCI_CHIP_RV410_564F 0x564F 107#define PCI_CHIP_RV410_5652 0x5652 108#define PCI_CHIP_RV410_5653 0x5653 109#define PCI_CHIP_RS300_5834 0x5834 110#define PCI_CHIP_RS300_5835 0x5835 111#define PCI_CHIP_RS480_5954 0x5954 112#define PCI_CHIP_RS480_5955 0x5955 113#define PCI_CHIP_RV280_5960 0x5960 114#define PCI_CHIP_RV280_5961 0x5961 115#define PCI_CHIP_RV280_5962 0x5962 116#define PCI_CHIP_RV280_5964 0x5964 117#define PCI_CHIP_RV280_5965 0x5965 118#define PCI_CHIP_RN50_5969 0x5969 119#define PCI_CHIP_RS482_5974 0x5974 120#define PCI_CHIP_RS482_5975 0x5975 121#define PCI_CHIP_RS400_5A41 0x5A41 122#define PCI_CHIP_RS400_5A42 0x5A42 123#define PCI_CHIP_RC410_5A61 0x5A61 124#define PCI_CHIP_RC410_5A62 0x5A62 125#define PCI_CHIP_RV370_5B60 0x5B60 126#define PCI_CHIP_RV370_5B62 0x5B62 127#define PCI_CHIP_RV370_5B63 0x5B63 128#define PCI_CHIP_RV370_5B64 0x5B64 129#define PCI_CHIP_RV370_5B65 0x5B65 130#define PCI_CHIP_RV370_5657 0x5657 131#define PCI_CHIP_RV280_5C61 0x5C61 132#define PCI_CHIP_RV280_5C63 0x5C63 133#define PCI_CHIP_R430_5D48 0x5D48 134#define PCI_CHIP_R430_5D49 0x5D49 135#define PCI_CHIP_R430_5D4A 0x5D4A 136#define PCI_CHIP_R480_5D4C 0x5D4C 137#define PCI_CHIP_R480_5D4D 0x5D4D 138#define PCI_CHIP_R480_5D4E 0x5D4E 139#define PCI_CHIP_R480_5D4F 0x5D4F 140#define PCI_CHIP_R480_5D50 0x5D50 141#define PCI_CHIP_R480_5D52 0x5D52 142#define PCI_CHIP_R423_5D57 0x5D57 143#define PCI_CHIP_RV410_5E48 0x5E48 144#define PCI_CHIP_RV410_5E4A 0x5E4A 145#define PCI_CHIP_RV410_5E4B 0x5E4B 146#define PCI_CHIP_RV410_5E4C 0x5E4C 147#define PCI_CHIP_RV410_5E4D 0x5E4D 148#define PCI_CHIP_RV410_5E4F 0x5E4F 149#define PCI_CHIP_RS350_7834 0x7834 150#define PCI_CHIP_RS350_7835 0x7835 151#define PCI_CHIP_RS690_791E 0x791E 152#define PCI_CHIP_RS690_791F 0x791F 153 154enum { 155 CHIP_FAMILY_R100, 156 CHIP_FAMILY_RV100, 157 CHIP_FAMILY_RS100, 158 CHIP_FAMILY_RV200, 159 CHIP_FAMILY_RS200, 160 CHIP_FAMILY_R200, 161 CHIP_FAMILY_RV250, 162 CHIP_FAMILY_RS300, 163 CHIP_FAMILY_RV280, 164 CHIP_FAMILY_R300, 165 CHIP_FAMILY_R350, 166 CHIP_FAMILY_RV350, 167 CHIP_FAMILY_RV380, 168 CHIP_FAMILY_R420, 169 CHIP_FAMILY_RV410, 170 CHIP_FAMILY_RS400, 171 CHIP_FAMILY_RS690, 172 CHIP_FAMILY_RV515, 173 CHIP_FAMILY_R520, 174 CHIP_FAMILY_LAST 175}; 176 177/* General classes of Radeons, as described above the device ID section */ 178#define RADEON_CLASS_R100 (0 << 0) 179#define RADEON_CLASS_R200 (1 << 0) 180#define RADEON_CLASS_R300 (2 << 0) 181#define RADEON_CLASS_MASK (3 << 0) 182 183#define RADEON_CHIPSET_TCL (1 << 2) /* tcl support - any radeon */ 184#define RADEON_CHIPSET_BROKEN_STENCIL (1 << 3) /* r100 stencil bug */ 185#define R200_CHIPSET_YCBCR_BROKEN (1 << 4) /* r200 ycbcr bug */ 186 187#endif /* _RADEON_CHIPSET_H */ 188