1daccc962a15f333a4759849d7088b0c985189175Alex Deucher/* 2daccc962a15f333a4759849d7088b0c985189175Alex Deucher * Copyright (C) 2010 Advanced Micro Devices, Inc. 3daccc962a15f333a4759849d7088b0c985189175Alex Deucher * 4daccc962a15f333a4759849d7088b0c985189175Alex Deucher * All Rights Reserved. 5daccc962a15f333a4759849d7088b0c985189175Alex Deucher * 6daccc962a15f333a4759849d7088b0c985189175Alex Deucher * Permission is hereby granted, free of charge, to any person obtaining 7daccc962a15f333a4759849d7088b0c985189175Alex Deucher * a copy of this software and associated documentation files (the 8daccc962a15f333a4759849d7088b0c985189175Alex Deucher * "Software"), to deal in the Software without restriction, including 9daccc962a15f333a4759849d7088b0c985189175Alex Deucher * without limitation the rights to use, copy, modify, merge, publish, 10daccc962a15f333a4759849d7088b0c985189175Alex Deucher * distribute, sublicense, and/or sell copies of the Software, and to 11daccc962a15f333a4759849d7088b0c985189175Alex Deucher * permit persons to whom the Software is furnished to do so, subject to 12daccc962a15f333a4759849d7088b0c985189175Alex Deucher * the following conditions: 13daccc962a15f333a4759849d7088b0c985189175Alex Deucher * 14daccc962a15f333a4759849d7088b0c985189175Alex Deucher * The above copyright notice and this permission notice (including the 15daccc962a15f333a4759849d7088b0c985189175Alex Deucher * next paragraph) shall be included in all copies or substantial 16daccc962a15f333a4759849d7088b0c985189175Alex Deucher * portions of the Software. 17daccc962a15f333a4759849d7088b0c985189175Alex Deucher * 18daccc962a15f333a4759849d7088b0c985189175Alex Deucher * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 19daccc962a15f333a4759849d7088b0c985189175Alex Deucher * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20daccc962a15f333a4759849d7088b0c985189175Alex Deucher * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. 21daccc962a15f333a4759849d7088b0c985189175Alex Deucher * IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE 22daccc962a15f333a4759849d7088b0c985189175Alex Deucher * LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 23daccc962a15f333a4759849d7088b0c985189175Alex Deucher * OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 24daccc962a15f333a4759849d7088b0c985189175Alex Deucher * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. 25daccc962a15f333a4759849d7088b0c985189175Alex Deucher * 26daccc962a15f333a4759849d7088b0c985189175Alex Deucher */ 27daccc962a15f333a4759849d7088b0c985189175Alex Deucher 28daccc962a15f333a4759849d7088b0c985189175Alex Deucher#include "radeon_common.h" 29daccc962a15f333a4759849d7088b0c985189175Alex Deucher#include "radeon_context.h" 30daccc962a15f333a4759849d7088b0c985189175Alex Deucher#include "radeon_blit.h" 31daccc962a15f333a4759849d7088b0c985189175Alex Deucher 32daccc962a15f333a4759849d7088b0c985189175Alex Deucherstatic inline uint32_t cmdpacket0(struct radeon_screen *rscrn, 33daccc962a15f333a4759849d7088b0c985189175Alex Deucher int reg, int count) 34daccc962a15f333a4759849d7088b0c985189175Alex Deucher{ 35daccc962a15f333a4759849d7088b0c985189175Alex Deucher if (count) 36daccc962a15f333a4759849d7088b0c985189175Alex Deucher return CP_PACKET0(reg, count - 1); 37daccc962a15f333a4759849d7088b0c985189175Alex Deucher return CP_PACKET2; 38daccc962a15f333a4759849d7088b0c985189175Alex Deucher} 39daccc962a15f333a4759849d7088b0c985189175Alex Deucher 402b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher/* common formats supported as both textures and render targets */ 41b2596c36c8f73e8bb7a0b1679b491662aeb2f9d9Dave Airlieunsigned r100_check_blit(gl_format mesa_format, uint32_t dst_pitch) 422b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher{ 432b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher /* XXX others? BE/LE? */ 442b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher switch (mesa_format) { 452b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher case MESA_FORMAT_ARGB8888: 462b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher case MESA_FORMAT_XRGB8888: 472b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher case MESA_FORMAT_RGB565: 482b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher case MESA_FORMAT_ARGB4444: 492b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher case MESA_FORMAT_ARGB1555: 502b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher case MESA_FORMAT_A8: 51cc1464cce9613c7f48b630bddf5a6b9fa0d082daAlex Deucher case MESA_FORMAT_L8: 52cc1464cce9613c7f48b630bddf5a6b9fa0d082daAlex Deucher case MESA_FORMAT_I8: 532b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher break; 542b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher default: 552b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher return 0; 562b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher } 572b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher 58b2596c36c8f73e8bb7a0b1679b491662aeb2f9d9Dave Airlie /* Rendering to small buffer doesn't work. 59b2596c36c8f73e8bb7a0b1679b491662aeb2f9d9Dave Airlie * Looks like a hw limitation. 60b2596c36c8f73e8bb7a0b1679b491662aeb2f9d9Dave Airlie */ 61b2596c36c8f73e8bb7a0b1679b491662aeb2f9d9Dave Airlie if (dst_pitch < 32) 62b2596c36c8f73e8bb7a0b1679b491662aeb2f9d9Dave Airlie return 0; 63b2596c36c8f73e8bb7a0b1679b491662aeb2f9d9Dave Airlie 642b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher /* ??? */ 652b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher if (_mesa_get_format_bits(mesa_format, GL_DEPTH_BITS) > 0) 662b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher return 0; 672b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher 682b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher return 1; 692b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher} 702b1d5ea4f0250a6a7fa312ced0a7af85e909381bAlex Deucher 71daccc962a15f333a4759849d7088b0c985189175Alex Deucherstatic inline void emit_vtx_state(struct r100_context *r100) 72daccc962a15f333a4759849d7088b0c985189175Alex Deucher{ 73daccc962a15f333a4759849d7088b0c985189175Alex Deucher BATCH_LOCALS(&r100->radeon); 74daccc962a15f333a4759849d7088b0c985189175Alex Deucher 75daccc962a15f333a4759849d7088b0c985189175Alex Deucher BEGIN_BATCH(8); 76daccc962a15f333a4759849d7088b0c985189175Alex Deucher if (r100->radeon.radeonScreen->chip_flags & RADEON_CHIPSET_TCL) { 77daccc962a15f333a4759849d7088b0c985189175Alex Deucher OUT_BATCH_REGVAL(RADEON_SE_CNTL_STATUS, 0); 78daccc962a15f333a4759849d7088b0c985189175Alex Deucher } else { 79daccc962a15f333a4759849d7088b0c985189175Alex Deucher OUT_BATCH_REGVAL(RADEON_SE_CNTL_STATUS, RADEON_TCL_BYPASS); 80daccc962a15f333a4759849d7088b0c985189175Alex Deucher 81daccc962a15f333a4759849d7088b0c985189175Alex Deucher } 82daccc962a15f333a4759849d7088b0c985189175Alex Deucher OUT_BATCH_REGVAL(RADEON_SE_COORD_FMT, (RADEON_VTX_XY_PRE_MULT_1_OVER_W0 | 83daccc962a15f333a4759849d7088b0c985189175Alex Deucher RADEON_TEX1_W_ROUTING_USE_W0)); 84daccc962a15f333a4759849d7088b0c985189175Alex Deucher OUT_BATCH_REGVAL(RADEON_SE_VTX_FMT, RADEON_SE_VTX_FMT_XY | RADEON_SE_VTX_FMT_ST0); 85daccc962a15f333a4759849d7088b0c985189175Alex Deucher OUT_BATCH_REGVAL(RADEON_SE_CNTL, (RADEON_DIFFUSE_SHADE_GOURAUD | 86daccc962a15f333a4759849d7088b0c985189175Alex Deucher RADEON_BFACE_SOLID | 87daccc962a15f333a4759849d7088b0c985189175Alex Deucher RADEON_FFACE_SOLID | 88daccc962a15f333a4759849d7088b0c985189175Alex Deucher RADEON_VTX_PIX_CENTER_OGL | 89daccc962a15f333a4759849d7088b0c985189175Alex Deucher RADEON_ROUND_MODE_ROUND | 90daccc962a15f333a4759849d7088b0c985189175Alex Deucher RADEON_ROUND_PREC_4TH_PIX)); 91daccc962a15f333a4759849d7088b0c985189175Alex Deucher END_BATCH(); 92daccc962a15f333a4759849d7088b0c985189175Alex Deucher} 93daccc962a15f333a4759849d7088b0c985189175Alex Deucher 94daccc962a15f333a4759849d7088b0c985189175Alex Deucherstatic void inline emit_tx_setup(struct r100_context *r100, 95daccc962a15f333a4759849d7088b0c985189175Alex Deucher gl_format mesa_format, 96daccc962a15f333a4759849d7088b0c985189175Alex Deucher struct radeon_bo *bo, 97daccc962a15f333a4759849d7088b0c985189175Alex Deucher intptr_t offset, 98daccc962a15f333a4759849d7088b0c985189175Alex Deucher unsigned width, 99daccc962a15f333a4759849d7088b0c985189175Alex Deucher unsigned height, 100daccc962a15f333a4759849d7088b0c985189175Alex Deucher unsigned pitch) 101daccc962a15f333a4759849d7088b0c985189175Alex Deucher{ 102daccc962a15f333a4759849d7088b0c985189175Alex Deucher uint32_t txformat = RADEON_TXFORMAT_NON_POWER2; 103daccc962a15f333a4759849d7088b0c985189175Alex Deucher BATCH_LOCALS(&r100->radeon); 104daccc962a15f333a4759849d7088b0c985189175Alex Deucher 1055b88a2a22daae4d09596804d8edc6b8796d05150Roland Scheidegger assert(width <= 2048); 1065b88a2a22daae4d09596804d8edc6b8796d05150Roland Scheidegger assert(height <= 2048); 107daccc962a15f333a4759849d7088b0c985189175Alex Deucher assert(offset % 32 == 0); 108daccc962a15f333a4759849d7088b0c985189175Alex Deucher 109daccc962a15f333a4759849d7088b0c985189175Alex Deucher /* XXX others? BE/LE? */ 110daccc962a15f333a4759849d7088b0c985189175Alex Deucher switch (mesa_format) { 111daccc962a15f333a4759849d7088b0c985189175Alex Deucher case MESA_FORMAT_ARGB8888: 112daccc962a15f333a4759849d7088b0c985189175Alex Deucher txformat |= RADEON_TXFORMAT_ARGB8888 | RADEON_TXFORMAT_ALPHA_IN_MAP; 113daccc962a15f333a4759849d7088b0c985189175Alex Deucher break; 114cc1464cce9613c7f48b630bddf5a6b9fa0d082daAlex Deucher case MESA_FORMAT_RGBA8888: 115cc1464cce9613c7f48b630bddf5a6b9fa0d082daAlex Deucher txformat |= RADEON_TXFORMAT_RGBA8888 | RADEON_TXFORMAT_ALPHA_IN_MAP; 116cc1464cce9613c7f48b630bddf5a6b9fa0d082daAlex Deucher break; 117daccc962a15f333a4759849d7088b0c985189175Alex Deucher case MESA_FORMAT_XRGB8888: 118daccc962a15f333a4759849d7088b0c985189175Alex Deucher txformat |= RADEON_TXFORMAT_ARGB8888; 119daccc962a15f333a4759849d7088b0c985189175Alex Deucher break; 120daccc962a15f333a4759849d7088b0c985189175Alex Deucher case MESA_FORMAT_RGB565: 121daccc962a15f333a4759849d7088b0c985189175Alex Deucher txformat |= RADEON_TXFORMAT_RGB565; 122daccc962a15f333a4759849d7088b0c985189175Alex Deucher break; 123a67cd1994f3474dd638af76b2bf5b19490863cbaAlex Deucher case MESA_FORMAT_ARGB4444: 124a67cd1994f3474dd638af76b2bf5b19490863cbaAlex Deucher txformat |= RADEON_TXFORMAT_ARGB4444 | RADEON_TXFORMAT_ALPHA_IN_MAP; 125a67cd1994f3474dd638af76b2bf5b19490863cbaAlex Deucher break; 126daccc962a15f333a4759849d7088b0c985189175Alex Deucher case MESA_FORMAT_ARGB1555: 127daccc962a15f333a4759849d7088b0c985189175Alex Deucher txformat |= RADEON_TXFORMAT_ARGB1555 | RADEON_TXFORMAT_ALPHA_IN_MAP; 128daccc962a15f333a4759849d7088b0c985189175Alex Deucher break; 129daccc962a15f333a4759849d7088b0c985189175Alex Deucher case MESA_FORMAT_A8: 130cc1464cce9613c7f48b630bddf5a6b9fa0d082daAlex Deucher case MESA_FORMAT_I8: 131daccc962a15f333a4759849d7088b0c985189175Alex Deucher txformat |= RADEON_TXFORMAT_I8 | RADEON_TXFORMAT_ALPHA_IN_MAP; 132daccc962a15f333a4759849d7088b0c985189175Alex Deucher break; 133cc1464cce9613c7f48b630bddf5a6b9fa0d082daAlex Deucher case MESA_FORMAT_L8: 134cc1464cce9613c7f48b630bddf5a6b9fa0d082daAlex Deucher txformat |= RADEON_TXFORMAT_I8; 135cc1464cce9613c7f48b630bddf5a6b9fa0d082daAlex Deucher break; 136cc1464cce9613c7f48b630bddf5a6b9fa0d082daAlex Deucher case MESA_FORMAT_AL88: 137cc1464cce9613c7f48b630bddf5a6b9fa0d082daAlex Deucher txformat |= RADEON_TXFORMAT_AI88 | RADEON_TXFORMAT_ALPHA_IN_MAP; 138cc1464cce9613c7f48b630bddf5a6b9fa0d082daAlex Deucher break; 139daccc962a15f333a4759849d7088b0c985189175Alex Deucher default: 140daccc962a15f333a4759849d7088b0c985189175Alex Deucher break; 141daccc962a15f333a4759849d7088b0c985189175Alex Deucher } 1425c666bdfdb7681c2250b801ff286c4837ea36893Dave Airlie 1435c666bdfdb7681c2250b801ff286c4837ea36893Dave Airlie if (bo->flags & RADEON_BO_FLAGS_MACRO_TILE) 1445c666bdfdb7681c2250b801ff286c4837ea36893Dave Airlie offset |= RADEON_TXO_MACRO_TILE; 1455c666bdfdb7681c2250b801ff286c4837ea36893Dave Airlie if (bo->flags & RADEON_BO_FLAGS_MICRO_TILE) 1465c666bdfdb7681c2250b801ff286c4837ea36893Dave Airlie offset |= RADEON_TXO_MICRO_TILE_X2; 147daccc962a15f333a4759849d7088b0c985189175Alex Deucher 148daccc962a15f333a4759849d7088b0c985189175Alex Deucher BEGIN_BATCH(18); 149daccc962a15f333a4759849d7088b0c985189175Alex Deucher OUT_BATCH_REGVAL(RADEON_PP_CNTL, RADEON_TEX_0_ENABLE | RADEON_TEX_BLEND_0_ENABLE); 150daccc962a15f333a4759849d7088b0c985189175Alex Deucher OUT_BATCH_REGVAL(RADEON_PP_TXCBLEND_0, (RADEON_COLOR_ARG_A_ZERO | 151daccc962a15f333a4759849d7088b0c985189175Alex Deucher RADEON_COLOR_ARG_B_ZERO | 152daccc962a15f333a4759849d7088b0c985189175Alex Deucher RADEON_COLOR_ARG_C_T0_COLOR | 153daccc962a15f333a4759849d7088b0c985189175Alex Deucher RADEON_BLEND_CTL_ADD | 154daccc962a15f333a4759849d7088b0c985189175Alex Deucher RADEON_CLAMP_TX)); 155daccc962a15f333a4759849d7088b0c985189175Alex Deucher OUT_BATCH_REGVAL(RADEON_PP_TXABLEND_0, (RADEON_ALPHA_ARG_A_ZERO | 156daccc962a15f333a4759849d7088b0c985189175Alex Deucher RADEON_ALPHA_ARG_B_ZERO | 157daccc962a15f333a4759849d7088b0c985189175Alex Deucher RADEON_ALPHA_ARG_C_T0_ALPHA | 158daccc962a15f333a4759849d7088b0c985189175Alex Deucher RADEON_BLEND_CTL_ADD | 159daccc962a15f333a4759849d7088b0c985189175Alex Deucher RADEON_CLAMP_TX)); 160daccc962a15f333a4759849d7088b0c985189175Alex Deucher OUT_BATCH_REGVAL(RADEON_PP_TXFILTER_0, (RADEON_CLAMP_S_CLAMP_LAST | 161daccc962a15f333a4759849d7088b0c985189175Alex Deucher RADEON_CLAMP_T_CLAMP_LAST | 162daccc962a15f333a4759849d7088b0c985189175Alex Deucher RADEON_MAG_FILTER_NEAREST | 163daccc962a15f333a4759849d7088b0c985189175Alex Deucher RADEON_MIN_FILTER_NEAREST)); 164daccc962a15f333a4759849d7088b0c985189175Alex Deucher OUT_BATCH_REGVAL(RADEON_PP_TXFORMAT_0, txformat); 165daccc962a15f333a4759849d7088b0c985189175Alex Deucher OUT_BATCH_REGVAL(RADEON_PP_TEX_SIZE_0, ((width - 1) | 166daccc962a15f333a4759849d7088b0c985189175Alex Deucher ((height - 1) << RADEON_TEX_VSIZE_SHIFT))); 1671f0709fd8f69bf8cc3e9502bad8d3e7296d935fbMaciej Cencora OUT_BATCH_REGVAL(RADEON_PP_TEX_PITCH_0, pitch * _mesa_get_format_bytes(mesa_format) - 32); 168daccc962a15f333a4759849d7088b0c985189175Alex Deucher 169daccc962a15f333a4759849d7088b0c985189175Alex Deucher OUT_BATCH_REGSEQ(RADEON_PP_TXOFFSET_0, 1); 17071f1d468b4e183c45e4f76f7951beb44dd74a707Dave Airlie OUT_BATCH_RELOC(offset, bo, offset, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0, 0); 171daccc962a15f333a4759849d7088b0c985189175Alex Deucher 172daccc962a15f333a4759849d7088b0c985189175Alex Deucher END_BATCH(); 173daccc962a15f333a4759849d7088b0c985189175Alex Deucher} 174daccc962a15f333a4759849d7088b0c985189175Alex Deucher 175daccc962a15f333a4759849d7088b0c985189175Alex Deucherstatic inline void emit_cb_setup(struct r100_context *r100, 176daccc962a15f333a4759849d7088b0c985189175Alex Deucher struct radeon_bo *bo, 177daccc962a15f333a4759849d7088b0c985189175Alex Deucher intptr_t offset, 178daccc962a15f333a4759849d7088b0c985189175Alex Deucher gl_format mesa_format, 179daccc962a15f333a4759849d7088b0c985189175Alex Deucher unsigned pitch, 180daccc962a15f333a4759849d7088b0c985189175Alex Deucher unsigned width, 181daccc962a15f333a4759849d7088b0c985189175Alex Deucher unsigned height) 182daccc962a15f333a4759849d7088b0c985189175Alex Deucher{ 1831bb6b1d9dbabafdb864ee112526b1212744ac614Alex Deucher uint32_t dst_pitch = pitch; 184daccc962a15f333a4759849d7088b0c985189175Alex Deucher uint32_t dst_format = 0; 185daccc962a15f333a4759849d7088b0c985189175Alex Deucher BATCH_LOCALS(&r100->radeon); 186daccc962a15f333a4759849d7088b0c985189175Alex Deucher 187daccc962a15f333a4759849d7088b0c985189175Alex Deucher /* XXX others? BE/LE? */ 188daccc962a15f333a4759849d7088b0c985189175Alex Deucher switch (mesa_format) { 189daccc962a15f333a4759849d7088b0c985189175Alex Deucher case MESA_FORMAT_ARGB8888: 190daccc962a15f333a4759849d7088b0c985189175Alex Deucher case MESA_FORMAT_XRGB8888: 191daccc962a15f333a4759849d7088b0c985189175Alex Deucher dst_format = RADEON_COLOR_FORMAT_ARGB8888; 192daccc962a15f333a4759849d7088b0c985189175Alex Deucher break; 193daccc962a15f333a4759849d7088b0c985189175Alex Deucher case MESA_FORMAT_RGB565: 194daccc962a15f333a4759849d7088b0c985189175Alex Deucher dst_format = RADEON_COLOR_FORMAT_RGB565; 195daccc962a15f333a4759849d7088b0c985189175Alex Deucher break; 196a67cd1994f3474dd638af76b2bf5b19490863cbaAlex Deucher case MESA_FORMAT_ARGB4444: 197a67cd1994f3474dd638af76b2bf5b19490863cbaAlex Deucher dst_format = RADEON_COLOR_FORMAT_ARGB4444; 198a67cd1994f3474dd638af76b2bf5b19490863cbaAlex Deucher break; 199daccc962a15f333a4759849d7088b0c985189175Alex Deucher case MESA_FORMAT_ARGB1555: 200daccc962a15f333a4759849d7088b0c985189175Alex Deucher dst_format = RADEON_COLOR_FORMAT_ARGB1555; 201daccc962a15f333a4759849d7088b0c985189175Alex Deucher break; 202daccc962a15f333a4759849d7088b0c985189175Alex Deucher case MESA_FORMAT_A8: 203cc1464cce9613c7f48b630bddf5a6b9fa0d082daAlex Deucher case MESA_FORMAT_L8: 204cc1464cce9613c7f48b630bddf5a6b9fa0d082daAlex Deucher case MESA_FORMAT_I8: 205daccc962a15f333a4759849d7088b0c985189175Alex Deucher dst_format = RADEON_COLOR_FORMAT_RGB8; 206daccc962a15f333a4759849d7088b0c985189175Alex Deucher break; 207daccc962a15f333a4759849d7088b0c985189175Alex Deucher default: 208daccc962a15f333a4759849d7088b0c985189175Alex Deucher break; 209daccc962a15f333a4759849d7088b0c985189175Alex Deucher } 210daccc962a15f333a4759849d7088b0c985189175Alex Deucher 2115c666bdfdb7681c2250b801ff286c4837ea36893Dave Airlie if (bo->flags & RADEON_BO_FLAGS_MACRO_TILE) 2125c666bdfdb7681c2250b801ff286c4837ea36893Dave Airlie dst_pitch |= RADEON_COLOR_TILE_ENABLE; 2135c666bdfdb7681c2250b801ff286c4837ea36893Dave Airlie 2145c666bdfdb7681c2250b801ff286c4837ea36893Dave Airlie if (bo->flags & RADEON_BO_FLAGS_MICRO_TILE) 2155c666bdfdb7681c2250b801ff286c4837ea36893Dave Airlie dst_pitch |= RADEON_COLOR_MICROTILE_ENABLE; 2165c666bdfdb7681c2250b801ff286c4837ea36893Dave Airlie 217daccc962a15f333a4759849d7088b0c985189175Alex Deucher BEGIN_BATCH_NO_AUTOSTATE(18); 218daccc962a15f333a4759849d7088b0c985189175Alex Deucher OUT_BATCH_REGVAL(RADEON_RE_TOP_LEFT, 0); 2195b88a2a22daae4d09596804d8edc6b8796d05150Roland Scheidegger OUT_BATCH_REGVAL(RADEON_RE_WIDTH_HEIGHT, (((width - 1) << RADEON_RE_WIDTH_SHIFT) | 2205b88a2a22daae4d09596804d8edc6b8796d05150Roland Scheidegger ((height - 1) << RADEON_RE_HEIGHT_SHIFT))); 221daccc962a15f333a4759849d7088b0c985189175Alex Deucher OUT_BATCH_REGVAL(RADEON_RB3D_PLANEMASK, 0xffffffff); 222daccc962a15f333a4759849d7088b0c985189175Alex Deucher OUT_BATCH_REGVAL(RADEON_RB3D_BLENDCNTL, RADEON_SRC_BLEND_GL_ONE | RADEON_DST_BLEND_GL_ZERO); 223daccc962a15f333a4759849d7088b0c985189175Alex Deucher OUT_BATCH_REGVAL(RADEON_RB3D_CNTL, dst_format); 224daccc962a15f333a4759849d7088b0c985189175Alex Deucher 225daccc962a15f333a4759849d7088b0c985189175Alex Deucher OUT_BATCH_REGSEQ(RADEON_RB3D_COLOROFFSET, 1); 22671f1d468b4e183c45e4f76f7951beb44dd74a707Dave Airlie OUT_BATCH_RELOC(offset, bo, offset, 0, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0); 227daccc962a15f333a4759849d7088b0c985189175Alex Deucher OUT_BATCH_REGSEQ(RADEON_RB3D_COLORPITCH, 1); 228daccc962a15f333a4759849d7088b0c985189175Alex Deucher OUT_BATCH_RELOC(dst_pitch, bo, dst_pitch, 0, RADEON_GEM_DOMAIN_GTT|RADEON_GEM_DOMAIN_VRAM, 0); 229daccc962a15f333a4759849d7088b0c985189175Alex Deucher 230daccc962a15f333a4759849d7088b0c985189175Alex Deucher END_BATCH(); 231daccc962a15f333a4759849d7088b0c985189175Alex Deucher} 232daccc962a15f333a4759849d7088b0c985189175Alex Deucher 233daccc962a15f333a4759849d7088b0c985189175Alex Deucherstatic GLboolean validate_buffers(struct r100_context *r100, 234daccc962a15f333a4759849d7088b0c985189175Alex Deucher struct radeon_bo *src_bo, 235daccc962a15f333a4759849d7088b0c985189175Alex Deucher struct radeon_bo *dst_bo) 236daccc962a15f333a4759849d7088b0c985189175Alex Deucher{ 237daccc962a15f333a4759849d7088b0c985189175Alex Deucher int ret; 2387959274858fe66a90e6f97fed81141c39cb6702bAlex Deucher 2397959274858fe66a90e6f97fed81141c39cb6702bAlex Deucher radeon_cs_space_reset_bos(r100->radeon.cmdbuf.cs); 2407959274858fe66a90e6f97fed81141c39cb6702bAlex Deucher 241daf85c460875c944d6918fdf4041467d97cba41eDave Airlie ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs, 24239ab5ae30c303dd561252cb592d4de35814b6a70Alex Deucher src_bo, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT, 0); 243daf85c460875c944d6918fdf4041467d97cba41eDave Airlie if (ret) 244daf85c460875c944d6918fdf4041467d97cba41eDave Airlie return GL_FALSE; 245daccc962a15f333a4759849d7088b0c985189175Alex Deucher 246daf85c460875c944d6918fdf4041467d97cba41eDave Airlie ret = radeon_cs_space_check_with_bo(r100->radeon.cmdbuf.cs, 24739ab5ae30c303dd561252cb592d4de35814b6a70Alex Deucher dst_bo, 0, RADEON_GEM_DOMAIN_VRAM | RADEON_GEM_DOMAIN_GTT); 248daccc962a15f333a4759849d7088b0c985189175Alex Deucher if (ret) 249daccc962a15f333a4759849d7088b0c985189175Alex Deucher return GL_FALSE; 250daccc962a15f333a4759849d7088b0c985189175Alex Deucher 251daccc962a15f333a4759849d7088b0c985189175Alex Deucher return GL_TRUE; 252daccc962a15f333a4759849d7088b0c985189175Alex Deucher} 253daccc962a15f333a4759849d7088b0c985189175Alex Deucher 254daccc962a15f333a4759849d7088b0c985189175Alex Deucher/** 255daccc962a15f333a4759849d7088b0c985189175Alex Deucher * Calculate texcoords for given image region. 256daccc962a15f333a4759849d7088b0c985189175Alex Deucher * Output values are [minx, maxx, miny, maxy] 257daccc962a15f333a4759849d7088b0c985189175Alex Deucher */ 258daccc962a15f333a4759849d7088b0c985189175Alex Deucherstatic inline void calc_tex_coords(float img_width, float img_height, 259daccc962a15f333a4759849d7088b0c985189175Alex Deucher float x, float y, 260daccc962a15f333a4759849d7088b0c985189175Alex Deucher float reg_width, float reg_height, 261daccc962a15f333a4759849d7088b0c985189175Alex Deucher unsigned flip_y, float *buf) 262daccc962a15f333a4759849d7088b0c985189175Alex Deucher{ 263daccc962a15f333a4759849d7088b0c985189175Alex Deucher buf[0] = x / img_width; 264daccc962a15f333a4759849d7088b0c985189175Alex Deucher buf[1] = buf[0] + reg_width / img_width; 265daccc962a15f333a4759849d7088b0c985189175Alex Deucher buf[2] = y / img_height; 266daccc962a15f333a4759849d7088b0c985189175Alex Deucher buf[3] = buf[2] + reg_height / img_height; 267daccc962a15f333a4759849d7088b0c985189175Alex Deucher if (flip_y) 268daccc962a15f333a4759849d7088b0c985189175Alex Deucher { 26976cf2618327a7f008dcfd0d91d64d6d9e01f9a9cAlex Deucher buf[2] = 1.0 - buf[2]; 27076cf2618327a7f008dcfd0d91d64d6d9e01f9a9cAlex Deucher buf[3] = 1.0 - buf[3]; 271daccc962a15f333a4759849d7088b0c985189175Alex Deucher } 272daccc962a15f333a4759849d7088b0c985189175Alex Deucher} 273daccc962a15f333a4759849d7088b0c985189175Alex Deucher 274daccc962a15f333a4759849d7088b0c985189175Alex Deucherstatic inline void emit_draw_packet(struct r100_context *r100, 275daccc962a15f333a4759849d7088b0c985189175Alex Deucher unsigned src_width, unsigned src_height, 276daccc962a15f333a4759849d7088b0c985189175Alex Deucher unsigned src_x_offset, unsigned src_y_offset, 277daccc962a15f333a4759849d7088b0c985189175Alex Deucher unsigned dst_x_offset, unsigned dst_y_offset, 278daccc962a15f333a4759849d7088b0c985189175Alex Deucher unsigned reg_width, unsigned reg_height, 279daccc962a15f333a4759849d7088b0c985189175Alex Deucher unsigned flip_y) 280daccc962a15f333a4759849d7088b0c985189175Alex Deucher{ 281daccc962a15f333a4759849d7088b0c985189175Alex Deucher float texcoords[4]; 282daccc962a15f333a4759849d7088b0c985189175Alex Deucher float verts[12]; 283daccc962a15f333a4759849d7088b0c985189175Alex Deucher BATCH_LOCALS(&r100->radeon); 284daccc962a15f333a4759849d7088b0c985189175Alex Deucher 285daccc962a15f333a4759849d7088b0c985189175Alex Deucher calc_tex_coords(src_width, src_height, 286daccc962a15f333a4759849d7088b0c985189175Alex Deucher src_x_offset, src_y_offset, 287daccc962a15f333a4759849d7088b0c985189175Alex Deucher reg_width, reg_height, 288daccc962a15f333a4759849d7088b0c985189175Alex Deucher flip_y, texcoords); 289daccc962a15f333a4759849d7088b0c985189175Alex Deucher 290daccc962a15f333a4759849d7088b0c985189175Alex Deucher verts[0] = dst_x_offset; 291daccc962a15f333a4759849d7088b0c985189175Alex Deucher verts[1] = dst_y_offset + reg_height; 292daccc962a15f333a4759849d7088b0c985189175Alex Deucher verts[2] = texcoords[0]; 29376cf2618327a7f008dcfd0d91d64d6d9e01f9a9cAlex Deucher verts[3] = texcoords[3]; 294daccc962a15f333a4759849d7088b0c985189175Alex Deucher 295daccc962a15f333a4759849d7088b0c985189175Alex Deucher verts[4] = dst_x_offset + reg_width; 296daccc962a15f333a4759849d7088b0c985189175Alex Deucher verts[5] = dst_y_offset + reg_height; 297daccc962a15f333a4759849d7088b0c985189175Alex Deucher verts[6] = texcoords[1]; 29876cf2618327a7f008dcfd0d91d64d6d9e01f9a9cAlex Deucher verts[7] = texcoords[3]; 299daccc962a15f333a4759849d7088b0c985189175Alex Deucher 300daccc962a15f333a4759849d7088b0c985189175Alex Deucher verts[8] = dst_x_offset + reg_width; 301daccc962a15f333a4759849d7088b0c985189175Alex Deucher verts[9] = dst_y_offset; 302daccc962a15f333a4759849d7088b0c985189175Alex Deucher verts[10] = texcoords[1]; 30376cf2618327a7f008dcfd0d91d64d6d9e01f9a9cAlex Deucher verts[11] = texcoords[2]; 304daccc962a15f333a4759849d7088b0c985189175Alex Deucher 305daccc962a15f333a4759849d7088b0c985189175Alex Deucher BEGIN_BATCH(15); 306daccc962a15f333a4759849d7088b0c985189175Alex Deucher OUT_BATCH(RADEON_CP_PACKET3_3D_DRAW_IMMD | (13 << 16)); 307daccc962a15f333a4759849d7088b0c985189175Alex Deucher OUT_BATCH(RADEON_CP_VC_FRMT_XY | RADEON_CP_VC_FRMT_ST0); 308daccc962a15f333a4759849d7088b0c985189175Alex Deucher OUT_BATCH(RADEON_CP_VC_CNTL_PRIM_WALK_RING | 309daccc962a15f333a4759849d7088b0c985189175Alex Deucher RADEON_CP_VC_CNTL_PRIM_TYPE_RECT_LIST | 310daccc962a15f333a4759849d7088b0c985189175Alex Deucher RADEON_CP_VC_CNTL_MAOS_ENABLE | 311daccc962a15f333a4759849d7088b0c985189175Alex Deucher RADEON_CP_VC_CNTL_VTX_FMT_RADEON_MODE | 312daccc962a15f333a4759849d7088b0c985189175Alex Deucher (3 << 16)); 313daccc962a15f333a4759849d7088b0c985189175Alex Deucher OUT_BATCH_TABLE(verts, 12); 314daccc962a15f333a4759849d7088b0c985189175Alex Deucher END_BATCH(); 315daccc962a15f333a4759849d7088b0c985189175Alex Deucher} 316daccc962a15f333a4759849d7088b0c985189175Alex Deucher 317daccc962a15f333a4759849d7088b0c985189175Alex Deucher/** 318daccc962a15f333a4759849d7088b0c985189175Alex Deucher * Copy a region of [@a width x @a height] pixels from source buffer 319daccc962a15f333a4759849d7088b0c985189175Alex Deucher * to destination buffer. 320daccc962a15f333a4759849d7088b0c985189175Alex Deucher * @param[in] r100 r100 context 321daccc962a15f333a4759849d7088b0c985189175Alex Deucher * @param[in] src_bo source radeon buffer object 322daccc962a15f333a4759849d7088b0c985189175Alex Deucher * @param[in] src_offset offset of the source image in the @a src_bo 323daccc962a15f333a4759849d7088b0c985189175Alex Deucher * @param[in] src_mesaformat source image format 324daccc962a15f333a4759849d7088b0c985189175Alex Deucher * @param[in] src_pitch aligned source image width 325daccc962a15f333a4759849d7088b0c985189175Alex Deucher * @param[in] src_width source image width 326daccc962a15f333a4759849d7088b0c985189175Alex Deucher * @param[in] src_height source image height 327daccc962a15f333a4759849d7088b0c985189175Alex Deucher * @param[in] src_x_offset x offset in the source image 328daccc962a15f333a4759849d7088b0c985189175Alex Deucher * @param[in] src_y_offset y offset in the source image 329daccc962a15f333a4759849d7088b0c985189175Alex Deucher * @param[in] dst_bo destination radeon buffer object 330daccc962a15f333a4759849d7088b0c985189175Alex Deucher * @param[in] dst_offset offset of the destination image in the @a dst_bo 331daccc962a15f333a4759849d7088b0c985189175Alex Deucher * @param[in] dst_mesaformat destination image format 332daccc962a15f333a4759849d7088b0c985189175Alex Deucher * @param[in] dst_pitch aligned destination image width 333daccc962a15f333a4759849d7088b0c985189175Alex Deucher * @param[in] dst_width destination image width 334daccc962a15f333a4759849d7088b0c985189175Alex Deucher * @param[in] dst_height destination image height 335daccc962a15f333a4759849d7088b0c985189175Alex Deucher * @param[in] dst_x_offset x offset in the destination image 336daccc962a15f333a4759849d7088b0c985189175Alex Deucher * @param[in] dst_y_offset y offset in the destination image 337daccc962a15f333a4759849d7088b0c985189175Alex Deucher * @param[in] width region width 338daccc962a15f333a4759849d7088b0c985189175Alex Deucher * @param[in] height region height 339daccc962a15f333a4759849d7088b0c985189175Alex Deucher * @param[in] flip_y set if y coords of the source image need to be flipped 340daccc962a15f333a4759849d7088b0c985189175Alex Deucher */ 341f9995b30756140724f41daf963fa06167912be7fKristian Høgsbergunsigned r100_blit(struct gl_context *ctx, 3425170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora struct radeon_bo *src_bo, 3435170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora intptr_t src_offset, 3445170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora gl_format src_mesaformat, 3455170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora unsigned src_pitch, 3465170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora unsigned src_width, 3475170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora unsigned src_height, 3485170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora unsigned src_x_offset, 3495170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora unsigned src_y_offset, 3505170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora struct radeon_bo *dst_bo, 3515170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora intptr_t dst_offset, 3525170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora gl_format dst_mesaformat, 3535170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora unsigned dst_pitch, 3545170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora unsigned dst_width, 3555170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora unsigned dst_height, 3565170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora unsigned dst_x_offset, 3575170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora unsigned dst_y_offset, 3585170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora unsigned reg_width, 3595170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora unsigned reg_height, 3605170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora unsigned flip_y) 361daccc962a15f333a4759849d7088b0c985189175Alex Deucher{ 3625170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora struct r100_context *r100 = R100_CONTEXT(ctx); 3635170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora 364b2596c36c8f73e8bb7a0b1679b491662aeb2f9d9Dave Airlie if (!r100_check_blit(dst_mesaformat, dst_pitch)) 365daccc962a15f333a4759849d7088b0c985189175Alex Deucher return GL_FALSE; 366daccc962a15f333a4759849d7088b0c985189175Alex Deucher 367daccc962a15f333a4759849d7088b0c985189175Alex Deucher /* Make sure that colorbuffer has even width - hw limitation */ 368daccc962a15f333a4759849d7088b0c985189175Alex Deucher if (dst_pitch % 2 > 0) 369daccc962a15f333a4759849d7088b0c985189175Alex Deucher ++dst_pitch; 370daccc962a15f333a4759849d7088b0c985189175Alex Deucher 371daccc962a15f333a4759849d7088b0c985189175Alex Deucher /* Need to clamp the region size to make sure 372daccc962a15f333a4759849d7088b0c985189175Alex Deucher * we don't read outside of the source buffer 373daccc962a15f333a4759849d7088b0c985189175Alex Deucher * or write outside of the destination buffer. 374daccc962a15f333a4759849d7088b0c985189175Alex Deucher */ 375daccc962a15f333a4759849d7088b0c985189175Alex Deucher if (reg_width + src_x_offset > src_width) 376daccc962a15f333a4759849d7088b0c985189175Alex Deucher reg_width = src_width - src_x_offset; 377daccc962a15f333a4759849d7088b0c985189175Alex Deucher if (reg_height + src_y_offset > src_height) 378daccc962a15f333a4759849d7088b0c985189175Alex Deucher reg_height = src_height - src_y_offset; 379daccc962a15f333a4759849d7088b0c985189175Alex Deucher if (reg_width + dst_x_offset > dst_width) 380daccc962a15f333a4759849d7088b0c985189175Alex Deucher reg_width = dst_width - dst_x_offset; 381daccc962a15f333a4759849d7088b0c985189175Alex Deucher if (reg_height + dst_y_offset > dst_height) 382daccc962a15f333a4759849d7088b0c985189175Alex Deucher reg_height = dst_height - dst_y_offset; 383daccc962a15f333a4759849d7088b0c985189175Alex Deucher 384daccc962a15f333a4759849d7088b0c985189175Alex Deucher if (src_bo == dst_bo) { 385daccc962a15f333a4759849d7088b0c985189175Alex Deucher return GL_FALSE; 386daccc962a15f333a4759849d7088b0c985189175Alex Deucher } 387daccc962a15f333a4759849d7088b0c985189175Alex Deucher 3885170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora if (src_offset % 32 || dst_offset % 32) { 3895170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora return GL_FALSE; 3905170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora } 3915170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora 392daccc962a15f333a4759849d7088b0c985189175Alex Deucher if (0) { 39310169e7adc40b445776453fcc6d3227d7dda5879Pauli Nieminen fprintf(stderr, "src: size [%d x %d], pitch %d, offset %zd " 394daccc962a15f333a4759849d7088b0c985189175Alex Deucher "offset [%d x %d], format %s, bo %p\n", 395fbfa80703449365415c9db6d189dd0a6a35fb4d4Dave Airlie src_width, src_height, src_pitch, src_offset, 396daccc962a15f333a4759849d7088b0c985189175Alex Deucher src_x_offset, src_y_offset, 397daccc962a15f333a4759849d7088b0c985189175Alex Deucher _mesa_get_format_name(src_mesaformat), 398daccc962a15f333a4759849d7088b0c985189175Alex Deucher src_bo); 39910169e7adc40b445776453fcc6d3227d7dda5879Pauli Nieminen fprintf(stderr, "dst: pitch %d offset %zd, offset[%d x %d], format %s, bo %p\n", 400fbfa80703449365415c9db6d189dd0a6a35fb4d4Dave Airlie dst_pitch, dst_offset, dst_x_offset, dst_y_offset, 401daccc962a15f333a4759849d7088b0c985189175Alex Deucher _mesa_get_format_name(dst_mesaformat), dst_bo); 402daccc962a15f333a4759849d7088b0c985189175Alex Deucher fprintf(stderr, "region: %d x %d\n", reg_width, reg_height); 403daccc962a15f333a4759849d7088b0c985189175Alex Deucher } 404daccc962a15f333a4759849d7088b0c985189175Alex Deucher 405daccc962a15f333a4759849d7088b0c985189175Alex Deucher /* Flush is needed to make sure that source buffer has correct data */ 4065170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora radeonFlush(ctx); 407daccc962a15f333a4759849d7088b0c985189175Alex Deucher 408daccc962a15f333a4759849d7088b0c985189175Alex Deucher rcommonEnsureCmdBufSpace(&r100->radeon, 59, __FUNCTION__); 409daccc962a15f333a4759849d7088b0c985189175Alex Deucher 410daccc962a15f333a4759849d7088b0c985189175Alex Deucher if (!validate_buffers(r100, src_bo, dst_bo)) 411daccc962a15f333a4759849d7088b0c985189175Alex Deucher return GL_FALSE; 412daccc962a15f333a4759849d7088b0c985189175Alex Deucher 413daccc962a15f333a4759849d7088b0c985189175Alex Deucher /* 8 */ 414daccc962a15f333a4759849d7088b0c985189175Alex Deucher emit_vtx_state(r100); 415daccc962a15f333a4759849d7088b0c985189175Alex Deucher /* 18 */ 416daccc962a15f333a4759849d7088b0c985189175Alex Deucher emit_tx_setup(r100, src_mesaformat, src_bo, src_offset, src_width, src_height, src_pitch); 417daccc962a15f333a4759849d7088b0c985189175Alex Deucher /* 18 */ 418daccc962a15f333a4759849d7088b0c985189175Alex Deucher emit_cb_setup(r100, dst_bo, dst_offset, dst_mesaformat, dst_pitch, dst_width, dst_height); 419daccc962a15f333a4759849d7088b0c985189175Alex Deucher /* 15 */ 420daccc962a15f333a4759849d7088b0c985189175Alex Deucher emit_draw_packet(r100, src_width, src_height, 421daccc962a15f333a4759849d7088b0c985189175Alex Deucher src_x_offset, src_y_offset, 422daccc962a15f333a4759849d7088b0c985189175Alex Deucher dst_x_offset, dst_y_offset, 423daccc962a15f333a4759849d7088b0c985189175Alex Deucher reg_width, reg_height, 424daccc962a15f333a4759849d7088b0c985189175Alex Deucher flip_y); 425daccc962a15f333a4759849d7088b0c985189175Alex Deucher 4265170d2452beafc4a6f5859792d6c6b267c549e46Maciej Cencora radeonFlush(ctx); 427daccc962a15f333a4759849d7088b0c985189175Alex Deucher 428daccc962a15f333a4759849d7088b0c985189175Alex Deucher return GL_TRUE; 429daccc962a15f333a4759849d7088b0c985189175Alex Deucher} 430