Lines Matching refs:r_dest

401 LIR* ArmMir2Lir::OpRegCopyNoInsert(RegStorage r_dest, RegStorage r_src) {
405 if (r_dest.IsPair()) {
406 r_dest = r_dest.GetLow();
411 if (r_dest.IsFloat() || r_src.IsFloat())
412 return OpFpRegCopy(r_dest, r_src);
413 if (r_dest.Low8() && r_src.Low8())
415 else if (!r_dest.Low8() && !r_src.Low8())
417 else if (r_dest.Low8())
421 res = RawLIR(current_dalvik_offset_, opcode, r_dest.GetReg(), r_src.GetReg());
422 if (!(cu_->disable_opt & (1 << kSafeOptimizations)) && r_dest == r_src) {
428 void ArmMir2Lir::OpRegCopy(RegStorage r_dest, RegStorage r_src) {
429 if (r_dest != r_src) {
430 LIR* res = OpRegCopyNoInsert(r_dest, r_src);
435 void ArmMir2Lir::OpRegCopyWide(RegStorage r_dest, RegStorage r_src) {
436 if (r_dest != r_src) {
437 bool dest_fp = r_dest.IsFloat();
439 DCHECK(r_dest.Is64Bit());
443 OpRegCopy(r_dest, r_src);
445 NewLIR3(kThumb2Fmdrr, r_dest.GetReg(), r_src.GetLowReg(), r_src.GetHighReg());
449 NewLIR3(kThumb2Fmrrd, r_dest.GetLowReg(), r_dest.GetHighReg(), r_src.GetReg());
452 if (r_src.GetHighReg() == r_dest.GetLowReg()) {
453 DCHECK_NE(r_src.GetLowReg(), r_dest.GetHighReg());
454 OpRegCopy(r_dest.GetHigh(), r_src.GetHigh());
455 OpRegCopy(r_dest.GetLow(), r_src.GetLow());
457 OpRegCopy(r_dest.GetLow(), r_src.GetLow());
458 OpRegCopy(r_dest.GetHigh(), r_src.GetHigh());
615 void ArmMir2Lir::GenEasyMultiplyTwoOps(RegStorage r_dest, RegStorage r_src, EasyMultiplyOp* ops) {
621 r_tmp1 = r_dest;
622 } else if (r_dest.GetReg() != r_src.GetReg()) {
623 r_tmp1 = r_dest;
647 OpRegRegImm(kOpLsl, r_dest, r_tmp1, ops[1].shift);
650 OpRegRegRegShift(kOpAdd, r_dest, r_src, r_tmp1, EncodeShift(kArmLsl, ops[1].shift));
653 OpRegRegRegShift(kOpRsub, r_dest, r_src, r_tmp1, EncodeShift(kArmLsl, ops[1].shift));