Cross Reference: /art/compiler/dex/quick/x86/assemble

Lines Matching defs:disp
691     case kMem:  // lir operands - 0: base, 1: disp
693     case kArray:  // lir operands - 0: base, 1: index, 2: scale, 3: disp
695     case kMemReg:  // lir operands - 0: base, 1: disp, 2: reg
697     case kMemRegImm:  // lir operands - 0: base, 1: disp, 2: reg 3: immediate
699     case kArrayReg:  // lir operands - 0: base, 1: index, 2: scale, 3: disp, 4: reg
702     case kThreadReg:  // lir operands - 0: disp, 1: reg
709     case kRegMem:  // lir operands - 0: reg, 1: base, 2: disp
711     case kRegArray:   // lir operands - 0: reg, 1: base, 2: index, 3: scale, 4: disp
714     case kRegThread:  // lir operands - 0: reg, 1: disp
726     case kMemImm:  // lir operands - 0: base, 1: disp, 2: immediate
728     case kArrayImm:  // lir operands - 0: base, 1: index, 2: scale, 3: disp 4: immediate
730     case kThreadImm:  // lir operands - 0: disp, 1: imm
739     case kRegMemImm:  // lir operands - 0: reg, 1: base, 2: disp, 3: imm
741     case kRegArrayImm:  // lir operands - 0: reg, 1: base, 2: index, 3: scale, 4: disp, 5: imm
752     case kShiftMemImm:  // lir operands - 0: base, 1: disp, 2: immediate
756     case kShiftArrayImm:  // lir operands - 0: base, 1: index, 2: scale, 3: disp 4: immediate
764     case kShiftMemCl:  // lir operands - 0: base, 1: disp, 2: cl
767     case kShiftArrayCl:  // lir operands - 0: base, 1: index, 2: scale, 3: disp, 4: cl
773     case kMemCond:  // lir operands - 0: base, 1: disp, 2: cond
775     case kArrayCond:  // lir operands - 0: base, 1: index, 2: scale, 3: disp, 4: cond
781     case kRegMemCond:  // lir operands - 0: reg, 1: base, 2: disp, 3:cond
809         case kX86CallI: return 5;  // opcode 0:disp
811         case kX86CallM:  // lir operands - 0: base, 1: disp
813         case kX86CallA:  // lir operands - 0: base, 1: index, 2: scale, 3: disp
815         case kX86CallT:  // lir operands - 0: disp
846 static uint8_t ModrmForDisp(int base, int disp) {
847   // BP requires an explicit disp, so do not omit it in the 0 case
848   if (disp == 0 && RegStorage::RegNum(base) != rs_rBP.GetRegNum()) {
850   } else if (IS_SIMM8(disp)) {
969 void X86Mir2Lir::EmitDisp(uint8_t base, int32_t disp) {
970   // BP requires an explicit disp, so do not omit it in the 0 case
971   if (disp == 0 && RegStorage::RegNum(base) != rs_rBP.GetRegNum()) {
973   } else if (IS_SIMM8(disp)) {
974     code_buffer_.push_back(disp & 0xFF);
976     code_buffer_.push_back(disp & 0xFF);
977     code_buffer_.push_back((disp >> 8) & 0xFF);
978     code_buffer_.push_back((disp >> 16) & 0xFF);
979     code_buffer_.push_back((disp >> 24) & 0xFF);
996 void X86Mir2Lir::EmitModrmDisp(uint8_t reg_or_opcode, uint8_t base, int32_t disp) {
999   uint8_t modrm = (ModrmForDisp(base, disp) << 6) | (reg_or_opcode << 3) | base;
1005   EmitDisp(base, disp);
1009                                   int scale, int32_t disp) {
1011   uint8_t modrm = (ModrmForDisp(base, disp) << 6) | RegStorage::RegNum(reg_or_opcode) << 3 |
1019   EmitDisp(base, disp);
1088 void X86Mir2Lir::EmitOpMem(const X86EncodingMap* entry, int32_t raw_base, int32_t disp) {
1096   EmitModrmDisp(entry->skeleton.modrm_opcode, low_base, disp);
1102                              int scale, int32_t disp) {
1107   EmitModrmSibDisp(entry->skeleton.modrm_opcode, low_base, low_index, scale, disp);
1112 void X86Mir2Lir::EmitMemReg(const X86EncodingMap* entry, int32_t raw_base, int32_t disp,
1118   EmitModrmDisp(low_reg, low_base, disp);
1125                             int32_t disp) {
1127   EmitMemReg(entry, raw_base, disp, raw_reg);
1131                               int32_t raw_index, int scale, int32_t disp) {
1137   EmitModrmSibDisp(low_reg, low_base, low_index, scale, disp);
1144                               int scale, int32_t disp, int32_t raw_reg) {
1146   EmitRegArray(entry, raw_reg, raw_base, raw_index, scale, disp);
1149 void X86Mir2Lir::EmitMemImm(const X86EncodingMap* entry, int32_t raw_base, int32_t disp,
1154   EmitModrmDisp(entry->skeleton.modrm_opcode, low_base, disp);
1160                               int32_t raw_base, int32_t raw_index, int scale, int32_t disp,
1166   EmitModrmSibDisp(entry->skeleton.modrm_opcode, low_base, low_index, scale, disp);
1171 void X86Mir2Lir::EmitRegThread(const X86EncodingMap* entry, int32_t raw_reg, int32_t disp) {
1177   code_buffer_.push_back(disp & 0xFF);
1178   code_buffer_.push_back((disp >> 8) & 0xFF);
1179   code_buffer_.push_back((disp >> 16) & 0xFF);
1180   code_buffer_.push_back((disp >> 24) & 0xFF);
1215                                int32_t raw_reg, int32_t raw_base, int disp, int32_t imm) {
1221   EmitModrmDisp(low_reg, low_base, disp);
1228                                int32_t raw_base, int32_t disp, int32_t raw_reg, int32_t imm) {
1230   EmitRegMemImm(entry, raw_reg, raw_base, disp, imm);
1247 void X86Mir2Lir::EmitThreadImm(const X86EncodingMap* entry, int32_t disp, int32_t imm) {
1251   code_buffer_.push_back(disp & 0xFF);
1252   code_buffer_.push_back((disp >> 8) & 0xFF);
1253   code_buffer_.push_back((disp >> 16) & 0xFF);
1254   code_buffer_.push_back((disp >> 24) & 0xFF);
1339 void X86Mir2Lir::EmitShiftMemImm(const X86EncodingMap* entry, int32_t raw_base, int32_t disp,
1353   EmitModrmDisp(entry->skeleton.modrm_opcode, low_base, disp);
1378 void X86Mir2Lir::EmitMemCond(const X86EncodingMap* entry, int32_t raw_base, int32_t disp,
1398   EmitModrmDisp(entry->skeleton.modrm_opcode, low_base, disp);
1429                                 int32_t disp, int32_t cc) {
1446   EmitModrmDisp(low_reg1, low_base, disp);
1493 void X86Mir2Lir::EmitCallMem(const X86EncodingMap* entry, int32_t raw_base, int32_t disp) {
1497   EmitModrmDisp(entry->skeleton.modrm_opcode, low_base, disp);
1502 void X86Mir2Lir::EmitCallImmediate(const X86EncodingMap* entry, int32_t disp) {
1506   code_buffer_.push_back(disp & 0xFF);
1507   code_buffer_.push_back((disp >> 8) & 0xFF);
1508   code_buffer_.push_back((disp >> 16) & 0xFF);
1509   code_buffer_.push_back((disp >> 24) & 0xFF);
1513 void X86Mir2Lir::EmitCallThread(const X86EncodingMap* entry, int32_t disp) {
1518   code_buffer_.push_back(disp & 0xFF);
1519   code_buffer_.push_back((disp >> 8) & 0xFF);
1520   code_buffer_.push_back((disp >> 16) & 0xFF);
1521   code_buffer_.push_back((disp >> 24) & 0xFF);
1528   int disp;
1532     disp = tab_rec->offset;
1537     disp = tab_rec->offset;
1559   code_buffer_.push_back(disp & 0xFF);
1560   code_buffer_.push_back((disp >> 8) & 0xFF);
1561   code_buffer_.push_back((disp >> 16) & 0xFF);
1562   code_buffer_.push_back((disp >> 24) & 0xFF);
1755       case kMem:  // lir operands - 0: base, 1: disp
1758       case kArray:  // lir operands - 0: base, 1: index, 2: scale, 3: disp
1761       case kMemReg:  // lir operands - 0: base, 1: disp, 2: reg
1764       case kMemImm:  // lir operands - 0: base, 1: disp, 2: immediate
1767       case kArrayImm:  // lir operands - 0: base, 1: index, 2: disp, 3:scale, 4:immediate
1771       case kArrayReg:  // lir operands - 0: base, 1: index, 2: scale, 3: disp, 4: reg
1775       case kRegMem:  // lir operands - 0: reg, 1: base, 2: disp
1778       case kRegArray:  // lir operands - 0: reg, 1: base, 2: index, 3: scale, 4: disp
1782       case kRegThread:  // lir operands - 0: reg, 1: disp
1791       case kMemRegImm:  // lir operands - 0: base, 1: disp, 2: reg 3: immediate
1801       case kRegMemImm:  // lir operands - 0: reg, 1: base, 2: disp, 3: imm
1808       case kThreadImm:  // lir operands - 0: disp, 1: immediate
1823       case kShiftMemImm:  // lir operands - 0: base, 1: disp, 2:immediate
1859           case kX86CallI:  // lir operands - 0: disp
1862           case kX86CallM:  // lir operands - 0: base, 1: disp
1865           case kX86CallT:  // lir operands - 0: disp