Lines Matching defs:rd

41 void MipsAssembler::EmitR(int opcode, Register rs, Register rt, Register rd, int shamt, int funct) {
44 CHECK_NE(rd, kNoRegister);
48 static_cast<int32_t>(rd) << kRdShift |
162 void MipsAssembler::Add(Register rd, Register rs, Register rt) {
163 EmitR(0, rs, rt, rd, 0, 0x20);
166 void MipsAssembler::Addu(Register rd, Register rs, Register rt) {
167 EmitR(0, rs, rt, rd, 0, 0x21);
178 void MipsAssembler::Sub(Register rd, Register rs, Register rt) {
179 EmitR(0, rs, rt, rd, 0, 0x22);
182 void MipsAssembler::Subu(Register rd, Register rs, Register rt) {
183 EmitR(0, rs, rt, rd, 0, 0x23);
202 void MipsAssembler::And(Register rd, Register rs, Register rt) {
203 EmitR(0, rs, rt, rd, 0, 0x24);
210 void MipsAssembler::Or(Register rd, Register rs, Register rt) {
211 EmitR(0, rs, rt, rd, 0, 0x25);
218 void MipsAssembler::Xor(Register rd, Register rs, Register rt) {
219 EmitR(0, rs, rt, rd, 0, 0x26);
226 void MipsAssembler::Nor(Register rd, Register rs, Register rt) {
227 EmitR(0, rs, rt, rd, 0, 0x27);
230 void MipsAssembler::Sll(Register rd, Register rs, int shamt) {
231 EmitR(0, rs, static_cast<Register>(0), rd, shamt, 0x00);
234 void MipsAssembler::Srl(Register rd, Register rs, int shamt) {
235 EmitR(0, rs, static_cast<Register>(0), rd, shamt, 0x02);
238 void MipsAssembler::Sra(Register rd, Register rs, int shamt) {
239 EmitR(0, rs, static_cast<Register>(0), rd, shamt, 0x03);
242 void MipsAssembler::Sllv(Register rd, Register rs, Register rt) {
243 EmitR(0, rs, rt, rd, 0, 0x04);
246 void MipsAssembler::Srlv(Register rd, Register rs, Register rt) {
247 EmitR(0, rs, rt, rd, 0, 0x06);
250 void MipsAssembler::Srav(Register rd, Register rs, Register rt) {
251 EmitR(0, rs, rt, rd, 0, 0x07);
278 void MipsAssembler::Mfhi(Register rd) {
279 EmitR(0, static_cast<Register>(0), static_cast<Register>(0), rd, 0, 0x10);
282 void MipsAssembler::Mflo(Register rd) {
283 EmitR(0, static_cast<Register>(0), static_cast<Register>(0), rd, 0, 0x12);
298 void MipsAssembler::Slt(Register rd, Register rs, Register rt) {
299 EmitR(0, rs, rt, rd, 0, 0x2a);
302 void MipsAssembler::Sltu(Register rd, Register rs, Register rt) {
303 EmitR(0, rs, rt, rd, 0, 0x2b);
434 void MipsAssembler::Mul(Register rd, Register rs, Register rt) {
436 Mflo(rd);
439 void MipsAssembler::Div(Register rd, Register rs, Register rt) {
441 Mflo(rd);
444 void MipsAssembler::Rem(Register rd, Register rs, Register rt) {
446 Mfhi(rd);