Lines Matching refs:instr
56 void Stop(Instruction* instr);
103 void MipsDebugger::Stop(Instruction* instr) {
105 uint32_t code = instr->Bits(25, 6);
123 instr->SetInstructionBits(kNopInstr);
137 void MipsDebugger::Stop(Instruction* instr) {
139 uint32_t code = instr->Bits(25, 6);
383 Instruction* instr = reinterpret_cast<Instruction*>(sim_->get_pc());
384 if (!(instr->IsTrap()) ||
385 instr->InstructionBits() == rtCallRedirInstr) {
832 Instruction* instr) {
833 intptr_t address = reinterpret_cast<intptr_t>(instr);
843 CHECK_EQ(0, memcmp(reinterpret_cast<void*>(instr),
1197 int Simulator::ReadW(int32_t addr, Instruction* instr) {
1201 addr, reinterpret_cast<intptr_t>(instr));
1211 reinterpret_cast<intptr_t>(instr));
1218 void Simulator::WriteW(int32_t addr, int value, Instruction* instr) {
1222 addr, reinterpret_cast<intptr_t>(instr));
1233 reinterpret_cast<intptr_t>(instr));
1239 double Simulator::ReadD(int32_t addr, Instruction* instr) {
1246 reinterpret_cast<intptr_t>(instr));
1252 void Simulator::WriteD(int32_t addr, double value, Instruction* instr) {
1260 reinterpret_cast<intptr_t>(instr));
1265 uint16_t Simulator::ReadHU(int32_t addr, Instruction* instr) {
1272 reinterpret_cast<intptr_t>(instr));
1278 int16_t Simulator::ReadH(int32_t addr, Instruction* instr) {
1285 reinterpret_cast<intptr_t>(instr));
1291 void Simulator::WriteH(int32_t addr, uint16_t value, Instruction* instr) {
1299 reinterpret_cast<intptr_t>(instr));
1304 void Simulator::WriteH(int32_t addr, int16_t value, Instruction* instr) {
1312 reinterpret_cast<intptr_t>(instr));
1350 void Simulator::Format(Instruction* instr, const char* format) {
1352 reinterpret_cast<intptr_t>(instr), format);
1388 void Simulator::SoftwareInterrupt(Instruction* instr) {
1392 int32_t func = instr->FunctionFieldRaw();
1393 uint32_t code = (func == BREAK) ? instr->Bits(25, 6) : -1;
1396 if (instr->InstructionBits() == rtCallRedirInstr) {
1397 Redirection* redirection = Redirection::FromSwiInstruction(instr);
1594 HandleStop(code, instr);
1613 PrintF("\n---- break %d marker: %3d (instr count: %8d) ----------"
1620 void Simulator::HandleStop(uint32_t code, Instruction* instr) {
1625 dbg.Stop(instr);
1632 bool Simulator::IsStopInstruction(Instruction* instr) {
1633 int32_t func = instr->FunctionFieldRaw();
1634 uint32_t code = static_cast<uint32_t>(instr->Bits(25, 6));
1708 void Simulator::ConfigureTypeRegister(Instruction* instr,
1720 const Opcode op = instr->OpcodeFieldRaw();
1721 const int32_t rs_reg = instr->RsValue();
1724 const int32_t rt_reg = instr->RtValue();
1727 const int32_t rd_reg = instr->RdValue();
1728 const uint32_t sa = instr->SaValue();
1730 const int32_t fs_reg = instr->FsValue();
1736 switch (instr->RsFieldRaw()) {
1770 switch (instr->FunctionFieldRaw()) {
1773 *next_pc = get_register(instr->RsValue());
1774 *return_addr_reg = instr->RdValue();
1904 switch (instr->FunctionFieldRaw()) {
1920 switch (instr->FunctionFieldRaw()) {
1951 void Simulator::DecodeTypeRegister(Instruction* instr) {
1953 const Opcode op = instr->OpcodeFieldRaw();
1954 const int32_t rs_reg = instr->RsValue();
1957 const int32_t rt_reg = instr->RtValue();
1960 const int32_t rd_reg = instr->RdValue();
1962 const int32_t fr_reg = instr->FrValue();
1963 const int32_t fs_reg = instr->FsValue();
1964 const int32_t ft_reg = instr->FtValue();
1965 const int32_t fd_reg = instr->FdValue();
1985 ConfigureTypeRegister(instr,
1999 switch (instr->RsFieldRaw()) {
2024 switch (instr->FunctionFieldRaw()) {
2052 cc = instr->FCccValue();
2054 switch (instr->FunctionFieldRaw()) {
2195 switch (instr->FunctionFieldRaw()) {
2209 switch (instr->FunctionFieldRaw()) {
2231 switch (instr->FunctionFieldRaw()) {
2244 switch (instr->FunctionFieldRaw()) {
2300 SoftwareInterrupt(instr);
2308 uint32_t cc = instr->FBccValue();
2310 if (instr->Bit(16)) { // Read Tf bit.
2325 switch (instr->FunctionFieldRaw()) {
2337 switch (instr->FunctionFieldRaw()) {
2339 // Ins instr leaves result in Rt, rather than Rd.
2343 // Ext instr leaves result in Rt, rather than Rd.
2360 void Simulator::DecodeTypeImmediate(Instruction* instr) {
2362 Opcode op = instr->OpcodeFieldRaw();
2363 int32_t rs = get_register(instr->RsValue());
2365 int32_t rt_reg = instr->RtValue(); // Destination register.
2367 int16_t imm16 = instr->Imm16Value();
2369 int32_t ft_reg = instr->FtValue(); // Destination register.
2400 switch (instr->RsFieldRaw()) {
2402 cc = instr->FBccValue();
2405 do_branch = (instr->FBtrueValue()) ? cc_value : !cc_value;
2420 switch (instr->RtFieldRaw()) {
2436 switch (instr->RtFieldRaw()) {
2446 if (instr->IsLinkingInstruction()) {
2511 alu_out = ReadH(addr, instr);
2519 alu_out = ReadW(addr, instr);
2526 alu_out = ReadW(addr, instr);
2534 alu_out = ReadHU(addr, instr);
2542 alu_out = ReadW(addr, instr);
2558 mem_value = ReadW(addr, instr) & mask;
2569 mem_value = ReadW(addr, instr);
2575 alu_out = ReadW(addr, instr);
2579 fp_out = ReadD(addr, instr);
2604 if (instr->IsLinkingInstruction()) {
2636 WriteH(addr, static_cast<uint16_t>(rt), instr);
2639 WriteW(addr, mem_value, instr);
2642 WriteW(addr, rt, instr);
2645 WriteW(addr, mem_value, instr);
2655 WriteW(addr, get_fpu_register(ft_reg), instr);
2659 WriteD(addr, get_fpu_register_double(ft_reg), instr);
2683 void Simulator::DecodeTypeJump(Instruction* instr) {
2689 int32_t next_pc = pc_high_bits | (instr->Imm26Value() << 2);
2700 if (instr->IsLinkingInstruction()) {
2709 void Simulator::InstructionDecode(Instruction* instr) {
2711 CheckICache(isolate_->simulator_i_cache(), instr);
2719 dasm.InstructionDecode(buffer, reinterpret_cast<byte*>(instr));
2720 PrintF(" 0x%08x %s\n", reinterpret_cast<intptr_t>(instr),
2724 switch (instr->InstructionType()) {
2726 DecodeTypeRegister(instr);
2729 DecodeTypeImmediate(instr);
2732 DecodeTypeJump(instr);
2738 set_register(pc, reinterpret_cast<int32_t>(instr) +
2753 Instruction* instr = reinterpret_cast<Instruction*>(program_counter);
2755 InstructionDecode(instr);
2762 Instruction* instr = reinterpret_cast<Instruction*>(program_counter);
2768 InstructionDecode(instr);