Searched defs:TM (Results 51 - 75 of 250) sorted by relevance

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/external/llvm/lib/Target/R600/
H A DAMDGPUTargetTransformInfo.cpp40 const AMDGPUTargetMachine *TM; member in class:__anon25265::final
49 AMDGPUTTI() : ImmutablePass(ID), TM(nullptr), ST(nullptr), TLI(nullptr) {
53 AMDGPUTTI(const AMDGPUTargetMachine *TM) argument
54 : ImmutablePass(ID), TM(TM), ST(TM->getSubtargetImpl()),
55 TLI(TM->getTargetLowering()) {
90 llvm::createAMDGPUTargetTransformInfoPass(const AMDGPUTargetMachine *TM) { argument
91 return new AMDGPUTTI(TM);
/external/llvm/lib/Target/Sparc/
H A DSparcSubtarget.cpp79 const std::string &FS, TargetMachine &TM,
83 InstrInfo(*this), TLInfo(TM), TSInfo(DL), FrameLowering(*this) {}
78 SparcSubtarget(const std::string &TT, const std::string &CPU, const std::string &FS, TargetMachine &TM, bool is64Bit) argument
H A DSparcTargetMachine.cpp43 SparcPassConfig(SparcTargetMachine *TM, PassManagerBase &PM) argument
44 : TargetPassConfig(TM, PM) {}
/external/llvm/lib/Target/SystemZ/
H A DSystemZShortenInst.cpp51 FunctionPass *llvm::createSystemZShortenInstPass(SystemZTargetMachine &TM) { argument
52 return new SystemZShortenInst(TM);
H A DSystemZTargetMachine.cpp36 SystemZPassConfig(SystemZTargetMachine *TM, PassManagerBase &PM) argument
37 : TargetPassConfig(TM, PM) {}
/external/llvm/lib/Target/XCore/
H A DXCoreTargetObjectFile.cpp21 void XCoreTargetObjectFile::Initialize(MCContext &Ctx, const TargetMachine &TM){ argument
22 TargetLoweringObjectFileELF::Initialize(Ctx, TM);
124 const TargetMachine &TM) const {
136 const TargetMachine &TM) const{
148 if (TM.getCodeModel() == CodeModel::Small ||
150 TM.getDataLayout()->getTypeAllocSize(ObjType) < CodeModelLargeSize) {
H A DXCoreISelLowering.h97 explicit XCoreTargetLowering(const TargetMachine &TM);
126 const TargetMachine &TM; member in class:llvm::XCoreTargetLowering
H A DXCoreTargetMachine.cpp37 XCorePassConfig(XCoreTargetMachine *TM, PassManagerBase &PM) argument
38 : TargetPassConfig(TM, PM) {}
/external/mesa3d/src/gallium/drivers/radeon/
H A DR600InstrInfo.h35 AMDGPUTargetMachine &TM; member in class:llvm::R600InstrInfo
63 DFAPacketizer *CreateTargetScheduleState(const TargetMachine *TM,
H A DAMDGPUTargetMachine.cpp75 AMDGPUPassConfig(AMDGPUTargetMachine *TM, PassManagerBase &PM) argument
76 : TargetPassConfig(TM, PM) {}
98 const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>();
107 PM->add(createAMDGPUPeepholeOpt(*TM));
113 const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>();
116 PM->add(createSIAssignInterpRegsPass(*TM));
118 PM->add(createAMDGPUConvertToISAPass(*TM));
133 PM->add(createAMDGPUCFGPreparationPass(*TM));
134 PM->add(createAMDGPUCFGStructurizerPass(*TM));
136 const AMDGPUSubtarget &ST = TM
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H A DR600ExpandSpecialInstrs.cpp47 FunctionPass *llvm::createR600ExpandSpecialInstrsPass(TargetMachine &TM) { argument
48 return new R600ExpandSpecialInstrsPass(TM);
H A DSIAssignInterpRegs.cpp36 TargetMachine &TM; member in class:__anon26489::SIAssignInterpRegsPass
43 MachineFunctionPass(ID), TM(tm) { }
126 const TargetInstrInfo * TII = TM.getInstrInfo();
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
H A DAMDGPUTargetMachine.cpp75 AMDGPUPassConfig(AMDGPUTargetMachine *TM, PassManagerBase &PM) argument
76 : TargetPassConfig(TM, PM) {}
98 const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>();
107 PM->add(createAMDGPUPeepholeOpt(*TM));
113 const AMDGPUSubtarget &ST = TM->getSubtarget<AMDGPUSubtarget>();
116 PM->add(createSIAssignInterpRegsPass(*TM));
118 PM->add(createAMDGPUConvertToISAPass(*TM));
133 PM->add(createAMDGPUCFGPreparationPass(*TM));
134 PM->add(createAMDGPUCFGStructurizerPass(*TM));
136 const AMDGPUSubtarget &ST = TM
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H A DR600ExpandSpecialInstrs.cpp47 FunctionPass *llvm::createR600ExpandSpecialInstrsPass(TargetMachine &TM) { argument
48 return new R600ExpandSpecialInstrsPass(TM);
H A DSIAssignInterpRegs.cpp36 TargetMachine &TM; member in class:__anon12916::SIAssignInterpRegsPass
43 MachineFunctionPass(ID), TM(tm) { }
126 const TargetInstrInfo * TII = TM.getInstrInfo();
/external/chromium_org/third_party/skia/experimental/PdfViewer/pdfparser/native/pdfapi/
H A DSkPdfFieldDictionary_autogen.cpp71 SkString SkPdfFieldDictionary::TM(SkPdfNativeDoc* doc) { function in class:SkPdfFieldDictionary
72 SkPdfNativeObject* ret = get("TM", "");
80 return get("TM", "") != NULL;
/external/llvm/include/llvm/CodeGen/
H A DMachineConstantPool.h135 const TargetMachine &TM; ///< The target machine. member in class:llvm::MachineConstantPool
144 explicit MachineConstantPool(const TargetMachine &TM) argument
145 : TM(TM), PoolAlignment(1) {}
/external/llvm/include/llvm/
H A DPassSupport.h88 template <typename PassName> Pass *callTargetMachineCtor(TargetMachine *TM) { argument
89 return new PassName(TM);
/external/llvm/lib/Target/ARM/
H A DARMInstrInfo.cpp105 const ARMTargetMachine *TM = variable
107 if (TM->getRelocationModel() != Reloc::PIC_)
112 unsigned PCAdj = TM->getSubtarget<ARMSubtarget>().isThumb() ? 4 : 8;
116 unsigned Align = TM->getDataLayout()
125 unsigned Opc = TM->getSubtarget<ARMSubtarget>().isThumb2() ?
127 const TargetInstrInfo &TII = *TM->getInstrInfo();
137 Opc = TM->getSubtarget<ARMSubtarget>().isThumb2() ? ARM::tPICADD
/external/llvm/lib/Target/Hexagon/
H A DHexagonExpandPredSpillCode.cpp57 HexagonExpandPredSpillCode(const HexagonTargetMachine& TM) : argument
58 MachineFunctionPass(ID), QTM(TM), QST(*TM.getSubtargetImpl()) {
199 llvm::createHexagonExpandPredSpillCode(const HexagonTargetMachine &TM) { argument
200 return new HexagonExpandPredSpillCode(TM);
H A DHexagonSplitConst32AndConst64.cpp55 HexagonSplitConst32AndConst64(const HexagonTargetMachine &TM) argument
56 : MachineFunctionPass(ID), QTM(TM) {}
178 llvm::createHexagonSplitConst32AndConst64(const HexagonTargetMachine &TM) { argument
179 return new HexagonSplitConst32AndConst64(TM);
H A DHexagonSplitTFRCondSets.cpp66 HexagonSplitTFRCondSets(const HexagonTargetMachine& TM) : argument
67 MachineFunctionPass(ID), QTM(TM), QST(*TM.getSubtargetImpl()) {
235 llvm::createHexagonSplitTFRCondSets(const HexagonTargetMachine &TM) { argument
236 return new HexagonSplitTFRCondSets(TM);
H A DHexagonTargetMachine.cpp81 HexagonPassConfig(HexagonTargetMachine *TM, PassManagerBase &PM) argument
82 : TargetPassConfig(TM, PM) {
115 HexagonTargetMachine &TM = getHexagonTargetMachine(); local
119 addPass(createHexagonRemoveExtendArgs(TM));
121 addPass(createHexagonISelDag(TM, getOptLevel()));
139 const HexagonTargetMachine &TM = getHexagonTargetMachine(); local
142 addPass(createHexagonCFGOptimizer(TM));
147 const HexagonTargetMachine &TM = getHexagonTargetMachine(); local
152 addPass(createHexagonSplitConst32AndConst64(TM));
158 const HexagonTargetMachine &TM local
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/external/llvm/lib/Target/MSP430/
H A DMSP430AsmPrinter.cpp42 MSP430AsmPrinter(TargetMachine &TM, MCStreamer &Streamer) argument
43 : AsmPrinter(TM, Streamer) {}
/external/llvm/lib/Target/X86/
H A DX86TargetObjectFile.cpp24 const TargetMachine &TM, MachineModuleInfo *MMI,
30 const MCSymbol *Sym = TM.getSymbol(GV, Mang);
38 GV, Encoding, Mang, TM, MMI, Streamer);
42 const GlobalValue *GV, Mangler &Mang, const TargetMachine &TM,
44 return TM.getSymbol(GV, Mang);
48 X86LinuxTargetObjectFile::Initialize(MCContext &Ctx, const TargetMachine &TM) { argument
49 TargetLoweringObjectFileELF::Initialize(Ctx, TM);
50 InitializeELF(TM.Options.UseInitArray);
60 const ConstantExpr *CE, Mangler &Mang, const TargetMachine &TM) const {
105 return MCSymbolRefExpr::Create(TM
22 getTTypeGlobalReference( const GlobalValue *GV, unsigned Encoding, Mangler &Mang, const TargetMachine &TM, MachineModuleInfo *MMI, MCStreamer &Streamer) const argument
41 getCFIPersonalitySymbol( const GlobalValue *GV, Mangler &Mang, const TargetMachine &TM, MachineModuleInfo *MMI) const argument
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