Searched defs:dD (Results 1 - 8 of 8) sorted by relevance

/external/eigen/Eigen/src/LU/arch/
H A DInverse_SSE.h77 __m128 dA, dB, dC, dD; // determinant of the sub-matrices local
98 // dD = |D|
99 dD = _mm_mul_ps(_mm_shuffle_ps(D, D, 0x5F),D);
100 dD = _mm_sub_ss(dD, _mm_movehl_ps(dD,dD));
115 d1 = _mm_mul_ss(dA,dD);
122 iA = _mm_sub_ps(_mm_mul_ps(A,_mm_shuffle_ps(dD,dD,
215 __m128d dA, dB, dC, dD; // determinant of the sub-matrices local
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/external/valgrind/main/VEX/priv/
H A Dhost_arm64_isel.c6367 HReg dD = iselDblExpr(env, stmt->Ist.Store.data); local
6369 addInstr(env, ARM64Instr_VLdStD(False/*!isLoad*/, dD, addr, 0));
6395 //ZZ HReg dD = iselNeon64Expr(env, stmt->Ist.Store.data);
6397 //ZZ addInstr(env, ARMInstr_NLdStD(False, dD, am));
6410 //ZZ HReg dD = iselDblExpr(env, stmt->Ist.Store.data);
6412 //ZZ addInstr(env, ARMInstr_VLdStD(False/*!isLoad*/, dD, am));
6549 HReg dD = iselDblExpr(env, stmt->Ist.Put.data); local
6551 addInstr(env, ARM64Instr_VLdStD(False/*!isLoad*/, dD, bbp, offs));
6555 HReg dD = iselFltExpr(env, stmt->Ist.Put.data); local
6557 addInstr(env, ARM64Instr_VLdStS(False/*!isLoad*/, dD, bb
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H A Dhost_arm_isel.c5708 HReg dD = iselNeon64Expr(env, stmt->Ist.Store.data); local
5710 addInstr(env, ARMInstr_NLdStD(False, dD, am));
5723 HReg dD = iselDblExpr(env, stmt->Ist.Store.data); local
5725 addInstr(env, ARMInstr_VLdStD(False/*!isLoad*/, dD, am));
H A Dhost_arm64_defs.h790 HReg dD; member in struct:__anon30881::__anon30882::__anon30907
915 //ZZ HReg dD;
966 //ZZ HReg dD;
1011 UInt szB; // 16=mov qD,qS; 8=mov dD,dS; 4=mov sD,sS
1063 extern ARM64Instr* ARM64Instr_VLdStD ( Bool isLoad, HReg dD, HReg rN,
1085 //ZZ extern ARMInstr* ARMInstr_VXferD ( Bool toD, HReg dD, HReg rHi, HReg rLo );
H A Dhost_arm64_defs.c1526 ARM64Instr* ARM64Instr_VLdStD ( Bool isLoad, HReg dD, HReg rN, UInt uimm12 ) { argument
1530 i->ARM64in.VLdStD.dD = dD;
1711 //ZZ ARMInstr* ARMInstr_VXferD ( Bool toD, HReg dD, HReg rHi, HReg rLo ) {
1715 //ZZ i->ARMin.VXferD.dD = dD;
1738 //ZZ ARMInstr* ARMInstr_NLdStD ( Bool isLoad, HReg dD, ARMAModeN *amode ) {
1742 //ZZ i->ARMin.NLdStD.dD = dD;
2164 ppHRegARM64(i->ARM64in.VLdStD.dD);
4716 UInt dD = dregNo(i->ARM64in.VLdStD.dD); local
4866 UInt dD = dregNo(i->ARM64in.VUnaryD.dst); local
4928 UInt dD = dregNo(i->ARM64in.VBinD.dst); local
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H A Dhost_arm_defs.c1263 ARMInstr* ARMInstr_VLdStD ( Bool isLoad, HReg dD, ARMAModeV* am ) { argument
1267 i->ARMin.VLdStD.dD = dD;
1346 ARMInstr* ARMInstr_VXferD ( Bool toD, HReg dD, HReg rHi, HReg rLo ) { argument
1350 i->ARMin.VXferD.dD = dD;
1400 ARMInstr* ARMInstr_NLdStD ( Bool isLoad, HReg dD, ARMAModeN *amode ) { argument
1404 i->ARMin.NLdStD.dD = dD;
1741 ppHRegARM(i->ARMin.VLdStD.dD);
3522 UInt dD = dregNo(i->ARMin.VLdStD.dD); local
3556 UInt dD = dregNo(i->ARMin.VAluD.dst); local
3578 UInt dD = fregNo(i->ARMin.VAluS.dst); local
3603 UInt dD = dregNo(i->ARMin.VUnaryD.dst); local
3657 UInt dD = dregNo(i->ARMin.VCmpD.argL); local
3666 UInt dD = dregNo(i->ARMin.VCMovD.dst); local
3686 UInt dD = dregNo(i->ARMin.VCvtSD.dst); local
3704 UInt dD = dregNo(i->ARMin.VXferD.dD); local
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H A Dhost_arm_defs.h763 HReg dD; member in struct:__anon30972::__anon30973::__anon30992
827 HReg dD; member in struct:__anon30972::__anon30973::__anon31002
902 HReg dD; member in struct:__anon30972::__anon30973::__anon31013
994 extern ARMInstr* ARMInstr_VXferD ( Bool toD, HReg dD, HReg rHi, HReg rLo );
H A Dguest_arm_toIR.c12855 UInt dD = (INSN(22,22) << 4) | INSN(15,12); local
12880 if (dD + nRegs - 1 >= 32)
12927 putDReg(dD + i, loadLE(Ity_F64, addr), IRTemp_INVALID);
12929 storeLE(addr, getDReg(dD + i));
12946 nm, nCC(conq), rN, dD, dD + nRegs - 1);
12949 nm, nCC(conq), rN, dD, dD + nRegs - 1);
12952 nm, nCC(conq), rN, dD, dD
12992 UInt dD = (INSN(22,22) << 4) | INSN(15,12); local
13426 UInt dD = INSN(15,12) | (INSN(22,22) << 4); local
13460 UInt dD = INSN(15,12) | (INSN(22,22) << 4); /* dst/acc */ local
13578 UInt dD = INSN(15,12) | (INSN(22,22) << 4); local
13633 UInt dD = INSN(15,12) | (INSN(22,22) << 4); local
13677 UInt dD = INSN(15,12) | (INSN(22,22) << 4); local
14241 UInt dD = INSN(15,12) | (INSN(22,22) << 4); local
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