/art/compiler/utils/arm/ |
H A D | assembler_arm32.h | 142 void vmovd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE; 146 bool vmovd(DRegister dd, double d_imm, Condition cond = AL) OVERRIDE; 150 void vldrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE; 151 void vstrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE; 154 void vaddd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; 156 void vsubd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; 158 void vmuld(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; 160 void vmlad(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; 162 void vmlsd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; 164 void vdivd(DRegister dd, DRegiste 245 LoadDImmediate(DRegister dd, double value, Register scratch, Condition cond = AL) argument [all...] |
H A D | assembler_thumb2.h | 171 void vmovd(DRegister dd, DRegister dm, Condition cond = AL) OVERRIDE; 175 bool vmovd(DRegister dd, double d_imm, Condition cond = AL) OVERRIDE; 179 void vldrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE; 180 void vstrd(DRegister dd, const Address& ad, Condition cond = AL) OVERRIDE; 183 void vaddd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; 185 void vsubd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; 187 void vmuld(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; 189 void vmlad(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; 191 void vmlsd(DRegister dd, DRegister dn, DRegister dm, Condition cond = AL) OVERRIDE; 193 void vdivd(DRegister dd, DRegiste 275 LoadDImmediate(DRegister dd, double value, Register scratch, Condition cond = AL) argument [all...] |
H A D | assembler_arm32.cc | 284 void Arm32Assembler::vmovd(DRegister dd, DRegister dm, Condition cond) { argument 285 EmitVFPddd(cond, B23 | B21 | B20 | B6, dd, D0, dm); 304 bool Arm32Assembler::vmovd(DRegister dd, double d_imm, Condition cond) { argument 312 dd, D0, D0); 325 void Arm32Assembler::vaddd(DRegister dd, DRegister dn, DRegister dm, argument 327 EmitVFPddd(cond, B21 | B20, dd, dn, dm); 337 void Arm32Assembler::vsubd(DRegister dd, DRegister dn, DRegister dm, argument 339 EmitVFPddd(cond, B21 | B20 | B6, dd, dn, dm); 349 void Arm32Assembler::vmuld(DRegister dd, DRegister dn, DRegister dm, argument 351 EmitVFPddd(cond, B21, dd, d 361 vmlad(DRegister dd, DRegister dn, DRegister dm, Condition cond) argument 373 vmlsd(DRegister dd, DRegister dn, DRegister dm, Condition cond) argument 385 vdivd(DRegister dd, DRegister dn, DRegister dm, Condition cond) argument 396 vabsd(DRegister dd, DRegister dm, Condition cond) argument 406 vnegd(DRegister dd, DRegister dm, Condition cond) argument 415 vsqrtd(DRegister dd, DRegister dm, Condition cond) argument 425 vcvtds(DRegister dd, SRegister sm, Condition cond) argument 445 vcvtdi(DRegister dd, SRegister sm, Condition cond) argument 465 vcvtdu(DRegister dd, SRegister sm, Condition cond) argument 475 vcmpd(DRegister dd, DRegister dm, Condition cond) argument 485 vcmpdz(DRegister dd, Condition cond) argument 903 vldrd(DRegister dd, const Address& ad, Condition cond) argument 916 vstrd(DRegister dd, const Address& ad, Condition cond) argument 994 EmitVFPddd(Condition cond, int32_t opcode, DRegister dd, DRegister dn, DRegister dm) argument 1027 EmitVFPds(Condition cond, int32_t opcode, DRegister dd, SRegister sm) argument [all...] |
H A D | assembler_thumb2.cc | 379 bool Thumb2Assembler::vmovd(DRegister dd, double d_imm, Condition cond) { argument 387 dd, D0, D0); 399 void Thumb2Assembler::vmovd(DRegister dd, DRegister dm, Condition cond) { argument 400 EmitVFPddd(cond, B23 | B21 | B20 | B6, dd, D0, dm); 410 void Thumb2Assembler::vaddd(DRegister dd, DRegister dn, DRegister dm, argument 412 EmitVFPddd(cond, B21 | B20, dd, dn, dm); 422 void Thumb2Assembler::vsubd(DRegister dd, DRegister dn, DRegister dm, argument 424 EmitVFPddd(cond, B21 | B20 | B6, dd, dn, dm); 434 void Thumb2Assembler::vmuld(DRegister dd, DRegister dn, DRegister dm, argument 436 EmitVFPddd(cond, B21, dd, d 446 vmlad(DRegister dd, DRegister dn, DRegister dm, Condition cond) argument 458 vmlsd(DRegister dd, DRegister dn, DRegister dm, Condition cond) argument 470 vdivd(DRegister dd, DRegister dn, DRegister dm, Condition cond) argument 481 vabsd(DRegister dd, DRegister dm, Condition cond) argument 491 vnegd(DRegister dd, DRegister dm, Condition cond) argument 500 vsqrtd(DRegister dd, DRegister dm, Condition cond) argument 510 vcvtds(DRegister dd, SRegister sm, Condition cond) argument 530 vcvtdi(DRegister dd, SRegister sm, Condition cond) argument 550 vcvtdu(DRegister dd, SRegister sm, Condition cond) argument 560 vcmpd(DRegister dd, DRegister dm, Condition cond) argument 570 vcmpdz(DRegister dd, Condition cond) argument 1788 vldrd(DRegister dd, const Address& ad, Condition cond) argument 1801 vstrd(DRegister dd, const Address& ad, Condition cond) argument 1879 EmitVFPddd(Condition cond, int32_t opcode, DRegister dd, DRegister dn, DRegister dm) argument 1912 EmitVFPds(Condition cond, int32_t opcode, DRegister dd, SRegister sm) argument [all...] |
/art/test/003-omnibus-opcodes/src/ |
H A D | FloatMath.java | 303 static void jlmTests(float ff, double dd) { argument 311 Main.assertTrue(approxEqual(Math.abs(dd), dd, 0.001)); 312 Main.assertTrue(approxEqual(Math.abs(-dd), dd, 0.001)); 313 Main.assertTrue(approxEqual(Math.min(dd, -5.0), -5.0, 0.001)); 314 Main.assertTrue(approxEqual(Math.max(dd, -5.0), dd, 0.001)); 316 double sq = Math.sqrt(dd); 317 Main.assertTrue(approxEqual(sq*sq, dd, 0.00 [all...] |