/external/llvm/lib/Target/ARM/ |
H A D | ARMISelDAGToDAG.cpp | 90 SDNode *Select(SDNode *N) override; 214 /// SelectVLD - Select NEON load intrinsics. NumVecs should be 222 /// SelectVST - Select NEON store intrinsics. NumVecs should 230 /// SelectVLDSTLane - Select NEON load/store lane intrinsics. NumVecs should 237 /// SelectVLDDup - Select NEON load-duplicate intrinsics. NumVecs 243 /// SelectVTBL - Select NEON VTBL and VTBX intrinsics. NumVecs should be 2, 248 /// SelectV6T2BitfieldExtractOp - Select SBFX/UBFX instructions for ARM. 251 // Select special operations if node forms integer ABS pattern 2415 SDNode *ARMDAGToDAGISel::Select(SDNode *N) { function in class:ARMDAGToDAGISel 2432 // Select specia [all...] |
H A D | ARMFastISel.cpp | 2858 case Instruction::Select:
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/external/owasp/sanitizer/tools/findbugs/lib/ |
H A D | bcel.jar | META-INF/ META-INF/MANIFEST.MF org/ org/apache/ org/apache/bcel/ org/apache/bcel/classfile/ ... |
/external/llvm/lib/Analysis/ |
H A D | InstructionSimplify.cpp | 3145 case Instruction::Select:
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H A D | ScalarEvolution.cpp | 3972 case Instruction::Select:
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/external/llvm/lib/ExecutionEngine/Interpreter/ |
H A D | Execution.cpp | 2009 case Instruction::Select:
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/external/llvm/lib/Target/NVPTX/ |
H A D | NVPTXISelDAGToDAG.cpp | 119 /// Select - Select instructions not customized! Used for 121 SDNode *NVPTXDAGToDAGISel::Select(SDNode *N) { function in class:NVPTXDAGToDAGISel
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/external/llvm/lib/Target/X86/ |
H A D | X86FastISel.cpp | 51 /// X86ScalarSSEf32, X86ScalarSSEf64 - Select between SSE or x87 929 /// X86SelectStore - Select and emit code to implement store instructions. 957 /// X86SelectRet - Select and emit code to implement ret instructions. 1087 /// X86SelectLoad - Select and emit code to implement load instructions. 2673 // Select either a call, or an llvm.memcpy/memmove/memset intrinsic 3139 case Instruction::Select:
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H A D | X86ISelLowering.cpp | 6059 SDValue Select; local 6061 Select = DAG.getNode(ISD::SELECT, dl, SelectVT, Op.getOperand(0), 6065 Select = DAG.getNode(ISD::SELECT, dl, SelectVT, Op.getOperand(0), 6068 return DAG.getNode(ISD::BITCAST, dl, VT, Select); 7570 // FIXME: Select an interleaving of the merge of V1 and V2 that minimizes 10134 // Select(N) returns N. So the raw TargetGlobalAddress nodes, etc. can only 18939 // Select the input vector, guarding against out of range extract vector. 19710 SDValue Select = getTargetShuffleNode(X86ISD::MOVSD, DL, NVT, NewA, 19712 return DAG.getNode(ISD::BITCAST, DL, VT, Select);
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/external/llvm/lib/Transforms/InstCombine/ |
H A D | InstCombineCompares.cpp | 2759 case Instruction::Select: {
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/external/llvm/lib/Transforms/Vectorize/ |
H A D | BBVectorize.cpp | 577 case Instruction::Select:
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/external/llvm/lib/AsmParser/ |
H A D | LLParser.cpp | 2816 } else if (Opc == Instruction::Select) {
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/external/robolectric/lib/main/ |
H A D | h2-1.2.147.jar | META-INF/MANIFEST.MF META-INF/services/java.sql.Driver org/h2/api/AggregateFunction ... |
/external/llvm/bindings/ocaml/llvm/ |
H A D | llvm.mli | 251 | Select
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/external/eclipse-basebuilder/basebuilder-3.6.2/org.eclipse.releng.basebuilder/plugins/ |
H A D | org.eclipse.swt.gtk.linux.x86_3.6.1.v3657a.jar | META-INF/MANIFEST.MF META-INF/ECLIPSEF.SF META-INF/ECLIPSEF.RSA META ... |
H A D | org.eclipse.swt.win32.win32.x86_3.6.1.v3657a.jar | META-INF/MANIFEST.MF META-INF/ECLIPSEF.SF META-INF/ECLIPSEF.RSA META ... |
H A D | org.eclipse.ui.workbench_3.6.1.M20101117-0800.jar | META-INF/MANIFEST.MF META-INF/ECLIPSEF.SF META-INF/ECLIPSEF.RSA META ... |
/external/bison/build-aux/ |
H A D | texinfo.tex | 1453 % Select #1 fonts with the current style.
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