Searched refs:i64 (Results 51 - 75 of 203) sorted by relevance

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/external/chromium_org/third_party/sqlite/src/src/
H A Dtest6.c118 i64 iOffset; /* Byte offset of the start of this write() */
173 static int writeDbFile(CrashFile *p, u8 *z, i64 iAmt, i64 iOff){
262 i64 iSize;
491 *pSize = (i64)pCrash->iSize;
597 i64 iSize;
615 i64 iChunk = pWrapper->iSize;
622 i64 iOff = PENDING_BYTE+512;
H A Dos.c63 int sqlite3OsRead(sqlite3_file *id, void *pBuf, int amt, i64 offset){
67 int sqlite3OsWrite(sqlite3_file *id, const void *pBuf, int amt, i64 offset){
71 int sqlite3OsTruncate(sqlite3_file *id, i64 size){
78 int sqlite3OsFileSize(sqlite3_file *id, i64 *pSize){
H A DsqliteInt.h286 #define IS_BIG_INT(X) (((X)&~(i64)0xffffffff)!=0)
432 typedef sqlite_int64 i64; /* 8-byte signed integer */ typedef
473 #define LARGEST_INT64 (0xffffffff|(((i64)0x7fffffff)<<32))
474 #define SMALLEST_INT64 (((i64)-1) - LARGEST_INT64)
817 i64 lastRowid; /* ROWID of most recent insert (see above) */
886 i64 nDeferredCons; /* Net deferred constraints this transaction. */
1065 i64 nDeferredCons; /* Number of deferred fk violations */
1430 i64 rowid; /* Used by UNPACKED_PREFIX_SEARCH */
2693 void sqlite3RowSetInsert(RowSet*, i64);
2694 int sqlite3RowSetTest(RowSet*, u8 iBatch, i64);
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H A Dpager.c446 i64 iOffset; /* Starting offset in main journal */
447 i64 iHdrOffset; /* See above */
652 i64 journalOff; /* Current write offset in the journal file */
653 i64 journalHdr; /* Byte offset to previous journal header */
668 i64 journalSizeLimit; /* Size limit for persistent journal files */
1019 static int read32bits(sqlite3_file *fd, i64 offset, u32 *pRes){
1038 static int write32bits(sqlite3_file *fd, i64 offset, u32 val){
1206 i64 szJ; /* Total size in bytes of journal file pJrnl */
1256 static i64 journalHdrOffset(Pager *pPager){
1257 i64 offse
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/external/chromium_org/base/win/
H A Dscoped_variant.h99 void Set(int64 i64);
/external/libhevc/common/arm/
H A Dihevc_intra_pred_chroma_dc.s251 vshl.i64 d3,d30,#32
254 vshl.i64 d2,d31,#32
263 vshl.i64 d3,d26,#32
264 vshl.i64 d2,d27,#32
/external/llvm/include/llvm/Support/
H A DDataTypes.h165 # define INT64_C(C) C##i64
/external/llvm/lib/Target/X86/
H A DX86SelectionDAGInfo.cpp105 AVT = MVT::i64;
149 DAG.getConstant((AVT == MVT::i64) ? 7 : 3, CVT));
150 Chain = DAG.getCopyToReg(Chain, dl, (CVT == MVT::i64) ? X86::RCX :
222 AVT = Subtarget.is64Bit() ? MVT::i64 : MVT::i32;
/external/llvm/test/MC/ARM/
H A Dneont2-shift-encoding.s19 @ CHECK: vshl.i64 d16, d16, #63 @ encoding: [0xff,0xef,0xb0,0x05]
20 vshl.i64 d16, d16, #63
35 @ CHECK: vshl.i64 q8, q8, #63 @ encoding: [0xff,0xef,0xf0,0x05]
36 vshl.i64 q8, q8, #63
91 @ CHECK: vshrn.i64 d16, q8, #32 @ encoding: [0xe0,0xef,0x30,0x08]
92 vshrn.i64 d16, q8, #32
161 @ CHECK: vrshrn.i64 d16, q8, #32 @ encoding: [0xe0,0xef,0x70,0x08]
162 vrshrn.i64 d16, q8, #32
H A Dneont2-mov-encoding.s14 vmov.i64 d16, #0xFF0000FF0000FFFF
25 @ CHECK: vmov.i64 d16, #0xff0000ff0000ffff @ encoding: [0xc1,0xff,0x33,0x0e]
37 vmov.i64 q8, #0xFF0000FF0000FFFF
48 @ CHECK: vmov.i64 q8, #0xff0000ff0000ffff @ encoding: [0xc1,0xff,0x73,0x0e]
78 vmovn.i64 d16, q8
97 @ CHECK: vmovn.i64 d16, q8 @ encoding: [0xfa,0xff,0x20,0x02]
H A Dneon-mov-encoding.s12 vmov.i64 d16, #0xFF0000FF0000FFFF
23 @ CHECK: vmov.i64 d16, #0xff0000ff0000ffff @ encoding: [0x33,0x0e,0xc1,0xf3]
36 vmov.i64 q8, #0xFF0000FF0000FFFF
47 @ CHECK: vmov.i64 q8, #0xff0000ff0000ffff @ encoding: [0x73,0x0e,0xc1,0xf3]
84 vmovn.i64 d16, q8
97 @ CHECK: vmovn.i64 d16, q8 @ encoding: [0x20,0x02,0xfa,0xf3]
140 vmvn.i64 d1, d2
/external/qemu/include/exec/
H A Ddef-helper.h7 (i32, i64 and ptr). Additional aliases are provided for convenience and
31 #define dh_alias_i64 i64
32 #define dh_alias_s64 i64
34 #define dh_alias_f64 i64
38 #define dh_alias_tl i64
/external/chromium_org/third_party/icu/source/test/intltest/
H A Dwinnmtst.cpp236 int64_t i64 = randomInt64(); local
242 getWindowsFormat(lcid, currency, w6Buffer, L"%I64d", i64);
260 wnf->format(i64, u6Buffer);
/external/icu/icu4c/source/test/intltest/
H A Dwinnmtst.cpp236 int64_t i64 = randomInt64(); local
242 getWindowsFormat(lcid, currency, w6Buffer, L"%I64d", i64);
260 wnf->format(i64, u6Buffer);
/external/chromium_org/third_party/sqlite/src/ext/rtree/
H A Drtree.c111 typedef sqlite3_int64 i64; typedef
259 i64 iNode;
271 i64 iRowid;
332 static i64 readInt64(u8 *p){
334 (((i64)p[0]) << 56) +
335 (((i64)p[1]) << 48) +
336 (((i64)p[2]) << 40) +
337 (((i64)p[3]) << 32) +
338 (((i64)p[4]) << 24) +
339 (((i64)
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/external/llvm/include/llvm/CodeGen/
H A DMachineValueType.h42 i64 = 5, // This is a 64 bit integer value enumerator in enum:llvm::MVT::SimpleValueType
83 v1i64 = 37, // 1 x i64
84 v2i64 = 38, // 2 x i64
85 v4i64 = 39, // 4 x i64
86 v8i64 = 40, // 8 x i64
87 v16i64 = 41, // 16 x i64
296 case v16i64: return i64;
396 case i64 :
499 return MVT::i64;
541 case MVT::i64
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/external/qemu/target-i386/
H A Dhelper.h97 DEF_HELPER_3(svm_check_intercept_param, void, env, i32, i64)
98 DEF_HELPER_3(vmexit, void, env, i32, i64)
112 DEF_HELPER_2(fldl_FT0, void, env, i64)
115 DEF_HELPER_2(fldl_ST0, void, env, i64)
119 DEF_HELPER_1(fstl_ST0, i64, env)
/external/llvm/lib/Target/AArch64/
H A DAArch64ISelDAGToDAG.cpp357 assert(SrcVT != MVT::i64 && "extend from 64-bits?");
369 assert(SrcVT != MVT::i64 && "extend from 64-bits?");
449 SDValue LaneIdxVal = CurDAG->getTargetConstant(LaneIdx, MVT::i64);
484 SDValue LaneIdxVal = CurDAG->getTargetConstant(LaneIdx, MVT::i64);
581 OffImm = CurDAG->getTargetConstant(0, MVT::i64);
614 OffImm = CurDAG->getTargetConstant(RHSC >> Scale, MVT::i64);
630 OffImm = CurDAG->getTargetConstant(0, MVT::i64);
657 OffImm = CurDAG->getTargetConstant(RHSC, MVT::i64);
667 CurDAG->getMachineNode(TargetOpcode::IMPLICIT_DEF, SDLoc(N), MVT::i64),
670 TargetOpcode::INSERT_SUBREG, SDLoc(N), MVT::i64, ImpDe
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H A DAArch64FastISel.cpp175 assert(TLI.getValueType(AI->getType(), true) == MVT::i64 &&
454 case MVT::i64:
484 unsigned ResultReg = FastEmit_ri_(MVT::i64, ISD::ADD, Addr.getReg(), false,
485 UnscaledOffset, MVT::i64);
547 case MVT::i64:
599 // simple types that will directly fit in a register (i32/f32/i64/f64) or
645 case MVT::i64:
693 // simple types that will directly fit in a register (i32/f32/i64/f64) or
794 if (SrcVT == MVT::i64)
894 if (SrcVT == MVT::i64 || SrcV
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
H A DAMDILISelLowering.cpp56 (int)MVT::i64,
74 (int)MVT::i64
122 if (VT != MVT::i64 && VT != MVT::v2i64) {
174 setOperationAction(ISD::MULHU, MVT::i64, Expand);
176 setOperationAction(ISD::MULHS, MVT::i64, Expand);
180 setOperationAction(ISD::Constant , MVT::i64 , Legal);
321 if (OVT.getScalarType() == MVT::i64) {
339 if (OVT.getScalarType() == MVT::i64) {
460 return EVT(MVT::i64);
462 return EVT(MVT::getVectorVT(MVT::i64, vEl
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H A DSIISelLowering.cpp33 addRegisterClass(MVT::i64, &AMDGPU::VReg_64RegClass);
44 setOperationAction(ISD::ADD, MVT::i64, Legal);
54 setOperationAction(ISD::LOAD, MVT::i64, Custom);
289 /// the operand types from i1 to i64 in order for tablegen to be able to match
299 SDValue OpNode = DAG.getNode(VCCNode, DL, MVT::i64,
300 DAG.getNode(SIISD::VCC_BITCAST, DL, MVT::i64,
302 DAG.getNode(SIISD::VCC_BITCAST, DL, MVT::i64,
/external/icu/icu4c/source/test/iotest/
H A Diotest.cpp214 int64_t i64; local
278 i64 = uto64(argument);
279 uBufferLenReturned = u_sprintf_u(uBuffer, format, i64);
280 uFileBufferLenReturned = u_fprintf_u(testFile.getAlias(), format, i64);
379 int64_t i64, expected64; local
469 uBufferLenReturned = u_sscanf_u(argument, format, &i64);
470 //uFileBufferLenReturned = u_fscanf_u(testFile, format, i64);
471 if (i64 != expected64) {
583 int64_t i64; local
634 i64
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/external/llvm/lib/Target/R600/
H A DAMDGPUISelDAGToDAG.cpp191 R1 = CurDAG->getTargetFrameIndex(FIN->getIndex(), MVT::i64);
192 R2 = CurDAG->getTargetConstant(0, MVT::i64);
195 R2 = CurDAG->getTargetConstant(0, MVT::i64);
202 R2 = CurDAG->getTargetConstant(0, MVT::i64);
217 // We are selecting i64 ADD here instead of custom lower it during
218 // DAG legalization, so we can fold some i64 ADDs used for address
222 if (N->getValueType(0) != MVT::i64 ||
345 } else if (N->getValueType(0) == MVT::i64) {
400 CurDAG->getVTList(MVT::i32, MVT::i64, MVT::Other),
701 return CurDAG->SelectNodeTo(N, AMDGPU::REG_SEQUENCE, MVT::i64, Arg
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/external/mesa3d/src/gallium/drivers/radeon/
H A DAMDILISelLowering.cpp56 (int)MVT::i64,
74 (int)MVT::i64
122 if (VT != MVT::i64 && VT != MVT::v2i64) {
174 setOperationAction(ISD::MULHU, MVT::i64, Expand);
176 setOperationAction(ISD::MULHS, MVT::i64, Expand);
180 setOperationAction(ISD::Constant , MVT::i64 , Legal);
321 if (OVT.getScalarType() == MVT::i64) {
339 if (OVT.getScalarType() == MVT::i64) {
460 return EVT(MVT::i64);
462 return EVT(MVT::getVectorVT(MVT::i64, vEl
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/external/llvm/lib/Target/Mips/
H A DMipsISelLowering.cpp260 setOperationAction(ISD::GlobalAddress, MVT::i64, Custom);
261 setOperationAction(ISD::BlockAddress, MVT::i64, Custom);
262 setOperationAction(ISD::GlobalTLSAddress, MVT::i64, Custom);
263 setOperationAction(ISD::JumpTable, MVT::i64, Custom);
264 setOperationAction(ISD::ConstantPool, MVT::i64, Custom);
265 setOperationAction(ISD::SELECT, MVT::i64, Custom);
266 setOperationAction(ISD::LOAD, MVT::i64, Custom);
267 setOperationAction(ISD::STORE, MVT::i64, Custom);
268 setOperationAction(ISD::FP_TO_SINT, MVT::i64, Custom);
279 setOperationAction(ISD::ADD, MVT::i64, Custo
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