| /art/compiler/optimizing/ |
| H A D | code_generator_x86_64.cc | 280 __ movq(destination.AsX86_64().AsCpuRegister(), source.AsX86_64().AsCpuRegister());
282 __ movl(destination.AsX86_64().AsCpuRegister(), Address(CpuRegister(RSP), source.GetStackIndex()));
285 __ movq(destination.AsX86_64().AsCpuRegister(), Address(CpuRegister(RSP), source.GetStackIndex()));
289 __ movl(Address(CpuRegister(RSP), destination.GetStackIndex()), source.AsX86_64().AsCpuRegister());
298 __ movq(Address(CpuRegister(RSP), destination.GetStackIndex()), source.AsX86_64().AsCpuRegister());
313 __ movl(location.AsX86_64().AsCpuRegister(), imm);
320 __ movq(location.AsX86_64().AsCpuRegister(), Immediate(value));
405 __ cmpl(lhs.AsX86_64().AsCpuRegister(), Immediate(0));
414 __ cmpl(lhs.AsX86_64().AsCpuRegister(), rh
[all...] |
| H A D | code_generator_x86.cc | 349 __ movl(destination.AsX86().AsCpuRegister(), source.AsX86().AsCpuRegister());
352 __ movl(destination.AsX86().AsCpuRegister(), Address(ESP, source.GetStackIndex()));
356 __ movl(Address(ESP, destination.GetStackIndex()), source.AsX86().AsCpuRegister());
427 __ movl(location.AsX86().AsCpuRegister(), imm);
524 __ cmpl(lhs.AsX86().AsCpuRegister(), Immediate(0));
534 __ cmpl(lhs.AsX86().AsCpuRegister(), rhs.AsX86().AsCpuRegister());
538 __ cmpl(lhs.AsX86().AsCpuRegister(), imm);
540 __ cmpl(lhs.AsX86().AsCpuRegister(), Addres
[all...] |
| /art/compiler/utils/x86/ |
| H A D | managed_register_x86.h | 93 CHECK_LT(AsCpuRegister(), ESP); // ESP, EBP, ESI and EDI cannot be encoded as byte registers.
97 Register AsCpuRegister() const { function in class:art::x86::X86ManagedRegister
116 return FromRegId(AllocIdLow()).AsCpuRegister();
122 return FromRegId(AllocIdHigh()).AsCpuRegister();
|
| H A D | assembler_x86.cc | 1417 pushl(spill_regs.at(i).AsX86().AsCpuRegister());
1423 pushl(method_reg.AsX86().AsCpuRegister());
1427 entry_spills.at(i).AsX86().AsCpuRegister());
1437 popl(spill_regs.at(i).AsX86().AsCpuRegister());
1458 movl(Address(ESP, offs), src.AsCpuRegister());
1483 movl(Address(ESP, dest), src.AsCpuRegister());
1489 movl(Address(ESP, dest), src.AsCpuRegister());
1507 leal(scratch.AsCpuRegister(), Address(ESP, fr_offs));
1508 fs()->movl(Address::Absolute(thr_offs), scratch.AsCpuRegister());
1526 movl(dest.AsCpuRegister(), Addres
[all...] |
| H A D | managed_register_x86.cc | 102 os << "CPU: " << AsCpuRegister();
|
| H A D | managed_register_x86_test.cc | 37 EXPECT_EQ(EAX, reg.AsCpuRegister());
45 EXPECT_EQ(EBX, reg.AsCpuRegister());
53 EXPECT_EQ(ECX, reg.AsCpuRegister());
61 EXPECT_EQ(EDI, reg.AsCpuRegister());
|
| /art/compiler/utils/x86_64/ |
| H A D | assembler_x86_64.cc | 1727 pushq(spill.AsCpuRegister());
1748 movl(Address(CpuRegister(RSP), 0), method_reg.AsX86_64().AsCpuRegister());
1755 spill.AsX86_64().AsCpuRegister());
1758 movl(Address(CpuRegister(RSP), frame_size + spill.getSpillOffset()), spill.AsX86_64().AsCpuRegister());
1790 popq(spill.AsCpuRegister());
1813 movl(Address(CpuRegister(RSP), offs), src.AsCpuRegister());
1816 movq(Address(CpuRegister(RSP), offs), src.AsCpuRegister());
1842 movl(Address(CpuRegister(RSP), dest), src.AsCpuRegister());
1848 movq(Address(CpuRegister(RSP), dest), src.AsCpuRegister());
1866 leaq(scratch.AsCpuRegister(), Addres
[all...] |
| H A D | managed_register_x86_64.h | 90 CpuRegister AsCpuRegister() const { function in class:art::x86_64::X86_64ManagedRegister
109 return FromRegId(AllocIdLow()).AsCpuRegister();
115 return FromRegId(AllocIdHigh()).AsCpuRegister();
|
| H A D | managed_register_x86_64.cc | 101 os << "CPU: " << static_cast<int>(AsCpuRegister().AsRegister());
|
| H A D | managed_register_x86_64_test.cc | 37 EXPECT_EQ(RAX, reg.AsCpuRegister());
45 EXPECT_EQ(RBX, reg.AsCpuRegister());
53 EXPECT_EQ(RCX, reg.AsCpuRegister());
61 EXPECT_EQ(RDI, reg.AsCpuRegister());
|