Searched refs:ROTR (Results 1 - 25 of 36) sorted by relevance

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/external/chromium_org/third_party/skia/include/core/
H A DSkChecksum.h29 ROTR = 17, enumerator in enum:SkChecksum::__anon14334
30 ROTL = sizeof(uintptr_t) * 8 - ROTR,
35 return ((total >> ROTR) | (total << ROTL)) ^ value;
/external/skia/include/core/
H A DSkChecksum.h29 ROTR = 17, enumerator in enum:SkChecksum::__anon29600
30 ROTL = sizeof(uintptr_t) * 8 - ROTR,
35 return ((total >> ROTR) | (total << ROTL)) ^ value;
/external/llvm/lib/Target/ARM/
H A DARMSelectionDAGInfo.h29 case ISD::ROTR: return ARM_AM::ror;
30 //case ISD::ROTL: // Only if imm -> turn into ROTR.
/external/chromium_org/third_party/openssl/openssl/crypto/sha/
H A Dsha512.c309 # define ROTR(a,n) ({ SHA_LONG64 ret; \ macro
339 # define ROTR(a,n) ({ SHA_LONG64 ret; \ macro
347 # define ROTR(a,n) _rotr64((a),n) macro
382 #ifndef ROTR
383 #define ROTR(x,s) (((x)>>s) | (x)<<(64-s)) macro
386 #define Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))
387 #define Sigma1(x) (ROTR((x),14) ^ ROTR((
[all...]
/external/openssl/crypto/sha/
H A Dsha512.c316 # define ROTR(a,n) ({ SHA_LONG64 ret; \ macro
346 # define ROTR(a,n) ({ SHA_LONG64 ret; \ macro
354 # define ROTR(a,n) _rotr64((a),n) macro
389 #ifndef ROTR
390 #define ROTR(x,s) (((x)>>s) | (x)<<(64-s)) macro
393 #define Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))
394 #define Sigma1(x) (ROTR((x),14) ^ ROTR((
[all...]
/external/chromium_org/third_party/openssl/openssl/crypto/sha/asm/
H A Dsha512-ia64.pl220 _rotr r11=$t1,$Sigma1[0] } // ROTR(e,14)
453 _rotr r11=$t1,$Sigma1[0] } // ROTR(e,14)
459 _rotr r8=$t1,$Sigma1[1] } // ROTR(e,18)
463 _rotr r9=$t1,$Sigma1[2] } // ROTR(e,41)
467 _rotr r10=$t0,$Sigma0[0] } // ROTR(a,28)
471 _rotr r11=$t0,$Sigma0[1] } // ROTR(a,34)
475 _rotr r8=$t0,$Sigma0[2] } // ROTR(a,39)
493 _rotr r8=X[15-1],$sigma0[0] } // ROTR(s0,1)
497 _rotr r9=X[15-1],$sigma0[1] } // ROTR(s0,8)
502 _rotr r10=X[15-14],$sigma1[0] };;// ROTR(s
[all...]
H A Dsha512-armv4.pl75 @ Sigma1(x) (ROTR((x),14) ^ ROTR((x),18) ^ ROTR((x),41))
130 @ Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))
305 @ sigma0(x) (ROTR((x),1) ^ ROTR((x),8) ^ ((x)>>7))
322 @ sigma1(x) (ROTR((x),19) ^ ROTR((
[all...]
H A Dsha512-armv4.S131 @ Sigma1(x) (ROTR((x),14) ^ ROTR((x),18) ^ ROTR((x),41))
186 @ Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))
225 @ sigma0(x) (ROTR((x),1) ^ ROTR((x),8) ^ ((x)>>7))
242 @ sigma1(x) (ROTR((x),19) ^ ROTR((
[all...]
/external/openssl/crypto/sha/asm/
H A Dsha512-ia64.pl220 _rotr r11=$t1,$Sigma1[0] } // ROTR(e,14)
453 _rotr r11=$t1,$Sigma1[0] } // ROTR(e,14)
459 _rotr r8=$t1,$Sigma1[1] } // ROTR(e,18)
463 _rotr r9=$t1,$Sigma1[2] } // ROTR(e,41)
467 _rotr r10=$t0,$Sigma0[0] } // ROTR(a,28)
471 _rotr r11=$t0,$Sigma0[1] } // ROTR(a,34)
475 _rotr r8=$t0,$Sigma0[2] } // ROTR(a,39)
493 _rotr r8=X[15-1],$sigma0[0] } // ROTR(s0,1)
497 _rotr r9=X[15-1],$sigma0[1] } // ROTR(s0,8)
502 _rotr r10=X[15-14],$sigma1[0] };;// ROTR(s
[all...]
H A Dsha512-armv4.pl75 @ Sigma1(x) (ROTR((x),14) ^ ROTR((x),18) ^ ROTR((x),41))
130 @ Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))
305 @ sigma0(x) (ROTR((x),1) ^ ROTR((x),8) ^ ((x)>>7))
322 @ sigma1(x) (ROTR((x),19) ^ ROTR((
[all...]
H A Dsha512-armv4.S131 @ Sigma1(x) (ROTR((x),14) ^ ROTR((x),18) ^ ROTR((x),41))
186 @ Sigma0(x) (ROTR((x),28) ^ ROTR((x),34) ^ ROTR((x),39))
225 @ sigma0(x) (ROTR((x),1) ^ ROTR((x),8) ^ ((x)>>7))
242 @ sigma1(x) (ROTR((x),19) ^ ROTR((
[all...]
/external/pdfium/core/src/fdrm/crypto/
H A Dfx_crypt_sha.cpp219 #define ROTR(x,n) (SHR(x,n) | (x << (32 - n))) macro
220 #define S0(x) (ROTR(x, 7) ^ ROTR(x,18) ^ SHR(x, 3))
221 #define S1(x) (ROTR(x,17) ^ ROTR(x,19) ^ SHR(x,10))
222 #define S2(x) (ROTR(x, 2) ^ ROTR(x,13) ^ ROTR(x,22))
223 #define S3(x) (ROTR(x, 6) ^ ROTR(
[all...]
/external/llvm/include/llvm/CodeGen/
H A DISDOpcodes.h311 SHL, SRA, SRL, ROTL, ROTR, enumerator in enum:llvm::ISD::NodeType
/external/valgrind/main/none/tests/mips64/
H A Dshift_instructions.c9 ROTR, ROTRV, SLL, SLLV, enumerator in enum:__anon32254
143 case ROTR:
/external/llvm/lib/Target/Mips/
H A DMips16ISelLowering.cpp144 setOperationAction(ISD::ROTR, MVT::i32, Expand);
145 setOperationAction(ISD::ROTR, MVT::i64, Expand);
/external/llvm/lib/CodeGen/SelectionDAG/
H A DSelectionDAGDumper.cpp181 case ISD::ROTR: return "rotr";
H A DLegalizeVectorOps.cpp257 case ISD::ROTR:
H A DSelectionDAG.cpp2458 case ISD::ROTR:
2463 if (Op.getOpcode() == ISD::ROTR)
3045 case ISD::ROTR:
3185 case ISD::ROTR:
6453 case ISD::ROTR:
H A DDAGCombiner.cpp1223 case ISD::ROTR:
3221 if (TLI.isOperationLegalOrCustom(ISD::ROTR, VT))
3222 return DAG.getNode(ISD::ROTR, SDLoc(N), VT, BSwap, ShAmt);
3598 bool HasROTR = TLI.isOperationLegalOrCustom(ISD::ROTR, VT);
3640 SDValue Rot = DAG.getNode(HasROTL ? ISD::ROTL : ISD::ROTR, DL, VT,
3683 LExtOp0, RExtOp0, ISD::ROTL, ISD::ROTR, DL);
3688 RExtOp0, LExtOp0, ISD::ROTR, ISD::ROTL, DL);
/external/llvm/lib/Target/NVPTX/
H A DNVPTXISelLowering.cpp166 setOperationAction(ISD::ROTR, MVT::i64, Legal);
169 setOperationAction(ISD::ROTR, MVT::i64, Expand);
173 setOperationAction(ISD::ROTR, MVT::i32, Legal);
176 setOperationAction(ISD::ROTR, MVT::i32, Expand);
180 setOperationAction(ISD::ROTR, MVT::i16, Expand);
182 setOperationAction(ISD::ROTR, MVT::i8, Expand);
/external/llvm/lib/Target/MSP430/
H A DMSP430ISelLowering.cpp99 setOperationAction(ISD::ROTR, MVT::i8, Expand);
101 setOperationAction(ISD::ROTR, MVT::i16, Expand);
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/radeon/
H A DAMDILISelLowering.cpp152 setOperationAction(ISD::ROTR, VT, Expand);
/external/mesa3d/src/gallium/drivers/radeon/
H A DAMDILISelLowering.cpp152 setOperationAction(ISD::ROTR, VT, Expand);
/external/llvm/lib/Target/R600/
H A DAMDGPUISelLowering.cpp269 // The hardware supports 32-bit ROTR, but not ROTL.
272 setOperationAction(ISD::ROTR, MVT::i64, Expand);
299 setOperationAction(ISD::ROTR, VT, Expand);
/external/llvm/lib/Target/Hexagon/
H A DHexagonISelLowering.cpp1413 setOperationAction(ISD::ROTR, MVT::i32, Expand);

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