Searched refs:finst (Results 1 - 6 of 6) sorted by relevance

/external/chromium_org/third_party/mesa/src/src/gallium/auxiliary/util/
H A Du_linkage.c81 const struct tgsi_full_instruction *finst = &parse.FullToken.FullInstruction; local
83 for(i = 0; i < finst->Instruction.NumDstRegs; ++i)
85 if(finst->Dst[i].Register.File == file)
87 unsigned idx = finst->Dst[i].Register.Index;
96 for(i = 0; i < finst->Instruction.NumSrcRegs; ++i)
98 if(finst->Src[i].Register.File == file)
100 unsigned idx = finst->Src[i].Register.Index;
/external/mesa3d/src/gallium/auxiliary/util/
H A Du_linkage.c81 const struct tgsi_full_instruction *finst = &parse.FullToken.FullInstruction; local
83 for(i = 0; i < finst->Instruction.NumDstRegs; ++i)
85 if(finst->Dst[i].Register.File == file)
87 unsigned idx = finst->Dst[i].Register.Index;
96 for(i = 0; i < finst->Instruction.NumSrcRegs; ++i)
98 if(finst->Src[i].Register.File == file)
100 unsigned idx = finst->Src[i].Register.Index;
/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv30/
H A Dnvfx_vertprog.c459 unsigned idx, const struct tgsi_full_instruction *finst)
474 for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
477 fsrc = &finst->Src[i];
483 for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
486 fsrc = &finst->Src[i];
530 for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
535 if(finst->Dst[0].Register.File == TGSI_FILE_ADDRESS &&
536 finst->Instruction.Opcode != TGSI_OPCODE_ARL)
539 final_dst = dst = tgsi_dst(vpc, &finst->Dst[0]);
540 mask = tgsi_mask(finst
458 nvfx_vertprog_parse_instruction(struct nv30_context *nv30, struct nvfx_vpc *vpc, unsigned idx, const struct tgsi_full_instruction *finst) argument
1032 const struct tgsi_full_instruction *finst; local
[all...]
H A Dnvfx_fragprog.c441 const struct tgsi_full_instruction *finst)
451 if (finst->Instruction.Opcode == TGSI_OPCODE_END)
454 for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
457 fsrc = &finst->Src[i];
463 for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
466 fsrc = &finst->Src[i];
526 dst = tgsi_dst(fpc, &finst->Dst[0]);
527 mask = tgsi_mask(finst->Dst[0].Register.WriteMask);
528 sat = (finst->Instruction.Saturate == TGSI_SAT_ZERO_ONE);
530 switch (finst
440 nvfx_fragprog_parse_instruction(struct nv30_context* nvfx, struct nvfx_fpc *fpc, const struct tgsi_full_instruction *finst) argument
1166 const struct tgsi_full_instruction *finst; local
[all...]
/external/mesa3d/src/gallium/drivers/nv30/
H A Dnvfx_vertprog.c459 unsigned idx, const struct tgsi_full_instruction *finst)
474 for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
477 fsrc = &finst->Src[i];
483 for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
486 fsrc = &finst->Src[i];
530 for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
535 if(finst->Dst[0].Register.File == TGSI_FILE_ADDRESS &&
536 finst->Instruction.Opcode != TGSI_OPCODE_ARL)
539 final_dst = dst = tgsi_dst(vpc, &finst->Dst[0]);
540 mask = tgsi_mask(finst
458 nvfx_vertprog_parse_instruction(struct nv30_context *nv30, struct nvfx_vpc *vpc, unsigned idx, const struct tgsi_full_instruction *finst) argument
1032 const struct tgsi_full_instruction *finst; local
[all...]
H A Dnvfx_fragprog.c441 const struct tgsi_full_instruction *finst)
451 if (finst->Instruction.Opcode == TGSI_OPCODE_END)
454 for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
457 fsrc = &finst->Src[i];
463 for (i = 0; i < finst->Instruction.NumSrcRegs; i++) {
466 fsrc = &finst->Src[i];
526 dst = tgsi_dst(fpc, &finst->Dst[0]);
527 mask = tgsi_mask(finst->Dst[0].Register.WriteMask);
528 sat = (finst->Instruction.Saturate == TGSI_SAT_ZERO_ONE);
530 switch (finst
440 nvfx_fragprog_parse_instruction(struct nv30_context* nvfx, struct nvfx_fpc *fpc, const struct tgsi_full_instruction *finst) argument
1166 const struct tgsi_full_instruction *finst; local
[all...]

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