Searched refs:imm5 (Results 1 - 8 of 8) sorted by relevance

/external/lldb/source/Plugins/Process/Utility/
H A DARMUtils.h26 static inline uint32_t DecodeImmShift(const uint32_t type, const uint32_t imm5, ARM_ShifterType &shift_t) argument
34 return imm5;
37 return (imm5 == 0 ? 32 : imm5);
40 return (imm5 == 0 ? 32 : imm5);
42 if (imm5 == 0)
50 return imm5;
72 static inline uint32_t DecodeImmShift(const ARM_ShifterType shift_t, const uint32_t imm5) argument
75 return DecodeImmShift(shift_t, imm5, dont_car
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/external/valgrind/main/VEX/priv/
H A Dguest_arm64_toIR.c2684 sf 1 111010010 imm5 cond 10 Rn 0 nzcv CCMP Rn, #imm5, #nzcv, cond
2685 sf 0 111010010 imm5 cond 10 Rn 0 nzcv CCMN Rn, #imm5, #nzcv, cond
2688 (CCMP) flags = if cond then flags-after-sub(Rn,imm5) else nzcv
2689 (CCMN) flags = if cond then flags-after-add(Rn,imm5) else nzcv
2695 UInt imm5 = INSN(20,16); local
2709 assign(argR, mkU64(imm5));
2712 assign(argR, mkU32(imm5));
2718 imm5, nzc
7129 UInt imm5 = INSN(20,16); local
7194 UInt imm5 = INSN(20,16); local
7313 UInt imm5 = INSN(20,16); local
7392 UInt imm5 = INSN(20,16); local
7440 UInt imm5 = INSN(20,16); local
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H A Dguest_arm_toIR.c1582 (b) the floor is computed from the value of imm5. these two fnsn
1599 UInt imm5 ) /* saturation ceiling */
1601 UInt ceil = (1 << imm5) - 1; // (2^imm5)-1
1641 UInt imm5, /* saturation ceiling */
1645 Int ceil = (1 << (imm5-1)) - 1; // (2^(imm5-1))-1
1646 Int floor = -(1 << (imm5-1)); // -(2^(imm5-1))
1710 /* Compute both the result and new C flag value for a LSL by an imm5
1640 armSignedSatQ( IRTemp regT, UInt imm5, IRTemp* res, IRTemp* resQ ) argument
2388 mk_EA_reg_plusminus_shifted_reg( UInt rN, UInt bU, UInt rM, UInt sh2, UInt imm5, HChar* buf ) argument
9064 UInt regD = 99, regN = 99, regM = 99, imm5 = 99, shift_type = 99; local
9124 UInt regD = 99, regN = 99, shift_type = 99, imm5 = 99, sat_imm = 99; local
9182 UInt regD = 99, regN = 99, shift_type = 99, imm5 = 99, sat_imm = 99; local
14418 UInt imm5 = INSN(11,7); local
15048 UInt imm5 = (insn >> 7) & 0x1F; /* 11:7 */ local
16760 UInt imm5 = INSN(11,7); local
16815 UInt imm5 = INSN(11,7); local
17036 UInt imm5 = INSN(11,7); local
17140 UInt imm5 = INSN(11,7); local
18807 UInt imm5 = INSN0(10,6); local
18832 UInt imm5 = INSN0(10,6); local
18857 UInt imm5 = INSN0(10,6); local
18999 UInt imm5 = INSN0(10,6); local
19559 UInt imm5 = (INSN1(14,12) << 2) | INSN1(7,6); local
19639 UInt imm5 = (INSN1(14,12) << 2) | INSN1(7,6); local
19721 UInt imm5 = (INSN1(14,12) << 2) | INSN1(7,6); local
19812 UInt imm5 = (INSN1(14,12) << 2) | INSN1(7,6); local
19853 UInt imm5 = (INSN1(14,12) << 2) | INSN1(7,6); local
19893 UInt imm5 = (INSN1(14,12) << 2) | INSN1(7,6); local
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H A Dhost_arm_defs.h259 /* --------- Reg or imm5 operands --------- */
262 ARMri5_I5=9, /* imm5, 1 .. 31 only (no zero!) */
272 UInt imm5; member in struct:__anon30953::__anon30954::__anon30955
281 extern ARMRI5* ARMRI5_I5 ( UInt imm5 );
H A Dhost_arm_defs.c492 /* --------- Reg or imm5 operands --------- */
494 ARMRI5* ARMRI5_I5 ( UInt imm5 ) {
497 ri5->ARMri5.I5.imm5 = imm5;
498 vassert(imm5 > 0 && imm5 <= 31); // zero is not allowed
511 vex_printf("%u", ri5->ARMri5.I5.imm5);
2801 UInt imm5 = ri->ARMri5.I5.imm5; local
2802 vassert(imm5 >
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/external/chromium_org/v8/src/arm/
H A Dassembler-arm.cc1676 // Rd(15-12) | imm5(11-7) | 0(6) | 01(5-4) | Rm(3-0)
1695 // Rd(15-12) | imm5(11-7) | 1(6) | 01(5-4) | Rm(3-0)
1878 // 1111(15-12) | imm5(11-07) | type(6-5) | 0(4)| Rm(3-0) |
2757 int imm5 = 32 - fraction_bits; local
2758 int i = imm5 & 1;
2759 int imm4 = (imm5 >> 1) & 0xf;
/external/lldb/source/Plugins/Instruction/ARM/
H A DEmulateInstructionARM.cpp3191 uint32_t imm5; // encoding for the shift amount local
3214 imm5 = Bits32(opcode, 10, 6);
3225 imm5 = Bits32(opcode, 14, 12) << 2 | Bits32(opcode, 7, 6);
3233 imm5 = Bits32(opcode, 11, 7);
3240 if (shift_type == SRType_ROR && imm5 == 0)
3249 uint32_t amt = (shift_type == SRType_RRX ? 1 : DecodeImmShift(shift_type, imm5));
3888 imm32 = Bits32(opcode, 10, 6) << 2; // imm32 = ZeroExtend(imm5:'00', 32);
4596 // t = UInt(Rt); n = UInt(Rn); imm32 = ZeroExtend(imm5:'00', 32);
4817 // (shift_t, shift_n) = DecodeImmShift(type, imm5);
4819 uint32_t imm5 local
6015 uint32_t imm5 = Bits32 (opcode, 11, 7); local
6427 uint32_t imm5 = Bits32 (opcode, 11, 7); local
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/external/valgrind/main/none/tests/arm/
H A Dv6intThumb.stdout.exp757 LSLS-16 Rd, Rm, imm5
782 LSRS-16 Rd, Rm, imm5
807 ASRS-16 Rd, Rm, imm5
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