Searched refs:opr (Results 1 - 11 of 11) sorted by relevance
/external/chromium_org/third_party/mach_override/libudis86/ |
H A D | udis86.c | 219 ud_opr_is_sreg(const struct ud_operand *opr) argument 221 return opr->type == UD_OP_REG && 222 opr->base >= UD_R_ES && 223 opr->base <= UD_R_GS; 234 ud_opr_is_gpr(const struct ud_operand *opr) argument 236 return opr->type == UD_OP_REG && 237 opr->base >= UD_R_AL && 238 opr->base <= UD_R_R15;
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H A D | extern.h | 79 extern int ud_opr_is_sreg(const struct ud_operand *opr); 81 extern int ud_opr_isgpr(const struct ud_operand *opr);
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H A D | syn.c | 87 ud_syn_rel_target(struct ud *u, struct ud_operand *opr) argument 90 switch (opr->size) { 91 case 8 : return (u->pc + opr->lval.sbyte) & trunc_mask; 92 case 16: return (u->pc + opr->lval.sword) & trunc_mask; 93 case 32: return (u->pc + opr->lval.sdword) & trunc_mask;
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H A D | decode.c | 359 struct ud_operand *opr, 388 opr->type = UD_OP_REG; 389 opr->base = reg; 390 opr->size = size; 603 decode_moffset(struct ud *u, unsigned int size, struct ud_operand *opr) argument 605 opr->type = UD_OP_MEM; 606 opr->size = resolve_operand_size(u, size); 607 decode_mem_disp(u, u->adr_mode, opr); 866 /* unless the default opr size of instruction is 64, 358 decode_reg(struct ud *u, struct ud_operand *opr, int type, int num, int size) argument
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/external/wpa_supplicant_8/hostapd/src/crypto/ |
H A D | random.c | 372 u8 opr; local 388 opr = own_pool_ready > 0xff ? 0xff : own_pool_ready; 389 if (fwrite(&opr, 1, 1, f) != 1 ||
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/external/wpa_supplicant_8/src/crypto/ |
H A D | random.c | 372 u8 opr; local 388 opr = own_pool_ready > 0xff ? 0xff : own_pool_ready; 389 if (fwrite(&opr, 1, 1, f) != 1 ||
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/external/wpa_supplicant_8/wpa_supplicant/src/crypto/ |
H A D | random.c | 372 u8 opr; local 388 opr = own_pool_ready > 0xff ? 0xff : own_pool_ready; 389 if (fwrite(&opr, 1, 1, f) != 1 ||
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/external/chromium_org/third_party/mesa/src/src/gallium/drivers/nv50/codegen/ |
H A D | nv50_ir_from_sm4.cpp | 542 enum sm4_opcode op, operation *opr) const 549 if (opr) { 551 case SM4_TARGET_RAW_BUFFER: *opr = OP_LOAD; break; 552 case SM4_TARGET_STRUCTURED_BUFFER: *opr = OP_SULD; break; 554 *opr = OP_TEX; 1214 operation opr = 1219 Instruction *insn = new_Instruction(func, opr, TYPE_F32); 1223 if (opr == OP_PINTERP) 1572 Converter::handleSAMPLE(operation opr, Value *dst0[4]) 1574 TexInstruction *texi = new_TexInstruction(func, opr); [all...] |
H A D | nv50_ir.cpp | 593 Instruction::Instruction(Function *fn, operation opr, DataType ty) argument 597 op = opr;
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/external/mesa3d/src/gallium/drivers/nv50/codegen/ |
H A D | nv50_ir_from_sm4.cpp | 542 enum sm4_opcode op, operation *opr) const 549 if (opr) { 551 case SM4_TARGET_RAW_BUFFER: *opr = OP_LOAD; break; 552 case SM4_TARGET_STRUCTURED_BUFFER: *opr = OP_SULD; break; 554 *opr = OP_TEX; 1214 operation opr = 1219 Instruction *insn = new_Instruction(func, opr, TYPE_F32); 1223 if (opr == OP_PINTERP) 1572 Converter::handleSAMPLE(operation opr, Value *dst0[4]) 1574 TexInstruction *texi = new_TexInstruction(func, opr); [all...] |
H A D | nv50_ir.cpp | 593 Instruction::Instruction(Function *fn, operation opr, DataType ty) argument 597 op = opr;
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