| /art/compiler/dex/quick/arm/ |
| H A D | codegen_arm.h | 156 LIR* OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src);
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| H A D | utility_arm.cc | 385 LIR* ArmMir2Lir::OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src) { function in class:art::ArmMir2Lir
386 LOG(FATAL) << "Unexpected use of OpCondRegReg for Arm";
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| /art/compiler/dex/quick/mips/ |
| H A D | codegen_mips.h | 153 LIR* OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src);
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| H A D | utility_mips.cc | 339 LIR* MipsMir2Lir::OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src) { function in class:art::MipsMir2Lir
340 LOG(FATAL) << "Unexpected use of OpCondRegReg for MIPS";
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| /art/compiler/dex/quick/x86/ |
| H A D | int_x86.cc | 254 OpCondRegReg(kOpCmov, code, rs_dest, temp_reg);
340 OpCondRegReg(kOpCmov, cc, rl_result.reg, temp1_reg);
372 OpCondRegReg(kOpCmov, NegateComparison(ccode), rl_result.reg, rl_false.reg);
374 OpCondRegReg(kOpCmov, ccode, rl_result.reg, rl_true.reg);
377 OpCondRegReg(kOpCmov, ccode, rl_result.reg, rl_true.reg);
641 OpCondRegReg(kOpCmov, kCondPl, rl_result.reg, rl_src.reg);
838 OpCondRegReg(kOpCmov, condition_code, rl_result.reg, rl_src2.reg);
1816 OpCondRegReg(kOpCmov, kCondPl, rl_result.reg, rl_src.reg);
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| H A D | codegen_x86.h | 280 LIR* OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src) OVERRIDE;
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| H A D | utility_x86.cc | 356 LIR* X86Mir2Lir::OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src) { function in class:art::X86Mir2Lir
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| H A D | target_x86.cc | 1370 OpCondRegReg(kOpCmov, kCondLt, rs_rDI, rs_tmp);
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| /art/compiler/dex/quick/arm64/ |
| H A D | codegen_arm64.h | 221 LIR* OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src) OVERRIDE;
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| H A D | utility_arm64.cc | 690 LIR* Arm64Mir2Lir::OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src) { function in class:art::Arm64Mir2Lir
691 LOG(FATAL) << "Unexpected use of OpCondRegReg for Arm64";
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| /art/compiler/dex/quick/ |
| H A D | mir_to_lir.h | 1431 virtual LIR* OpCondRegReg(OpKind op, ConditionCode cc, RegStorage r_dest, RegStorage r_src) = 0;
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