/art/compiler/utils/mips/ |
H A D | assembler_mips.h | 59 void Add(Register rd, Register rs, Register rt); 60 void Addu(Register rd, Register rs, Register rt); 61 void Addi(Register rt, Register rs, uint16_t imm16); 62 void Addiu(Register rt, Register r [all...] |
H A D | assembler_mips.cc | 41 void MipsAssembler::EmitR(int opcode, Register rs, Register rt, Register rd, int shamt, int funct) { 54 void MipsAssembler::EmitI(int opcode, Register rs, Register rt, uint16_t imm) { 92 void MipsAssembler::EmitBranch(Register rt, Register rs, Label* label, bool equal) { 162 void MipsAssembler::Add(Register rd, Register rs, Register r [all...] |
/art/compiler/utils/arm/ |
H A D | assembler_thumb2.h | 65 void and_(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 67 void eor(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 69 void sub(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 70 void subs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 72 void rsb(Register rd, Register r [all...] |
H A D | assembler_arm32.h | 43 void and_(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 45 void eor(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 47 void sub(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 48 void subs(Register rd, Register rn, const ShifterOperand& so, Condition cond = AL) OVERRIDE; 50 void rsb(Register rd, Register r [all...] |
H A D | assembler_arm.h | 40 // Data-processing operands - Register 41 explicit ShifterOperand(Register rm) : type_(kRegister), rm_(rm), rs_(kNoRegister), 50 ShifterOperand(Register rm, Shift shift, uint32_t shift_imm = 0) : type_(kRegister), rm_(rm), 56 ShifterOperand(Register rm, Shift shift, Register rs) : type_(kRegister), rm_(rm), 95 Register GetRegister() const { 128 static bool CanHoldThumb(Register rd, Register rn, Opcode opcode, 134 Register rm_; 135 Register rs [all...] |
H A D | assembler_arm32.cc | 28 void Arm32Assembler::and_(Register rd, Register rn, const ShifterOperand& so, 34 void Arm32Assembler::eor(Register rd, Register rn, const ShifterOperand& so, 40 void Arm32Assembler::sub(Register rd, Register rn, const ShifterOperand& so, 45 void Arm32Assembler::rsb(Register rd, Register rn, const ShifterOperand& so, 50 void Arm32Assembler::rsbs(Register rd, Register r [all...] |
H A D | assembler_thumb2.cc | 28 void Thumb2Assembler::and_(Register rd, Register rn, const ShifterOperand& so, 34 void Thumb2Assembler::eor(Register rd, Register rn, const ShifterOperand& so, 40 void Thumb2Assembler::sub(Register rd, Register rn, const ShifterOperand& so, 46 void Thumb2Assembler::rsb(Register rd, Register rn, const ShifterOperand& so, 52 void Thumb2Assembler::rsbs(Register rd, Register r [all...] |
H A D | constants_arm.h | 273 Register RnField() const { return static_cast<Register>( 275 Register RdField() const { return static_cast<Register>( 284 Register RmField() const { 285 return static_cast<Register>(Bits(kRmShift, kRmBits)); 290 Register RsField() const { 291 return static_cast<Register>(Bits(kRsShift, kRsBits));
|
H A D | managed_register_arm.cc | 29 Register low = AsRegisterPairLow(); 30 Register high = AsRegisterPairHigh(); 60 low = (r - kNumberOfDRegIds) * 2; // Return a Register. 77 os << "No Register";
|
/art/runtime/arch/x86/ |
H A D | registers_x86.h | 29 enum Register { enum in namespace:art::x86 42 std::ostream& operator<<(std::ostream& os, const Register& rhs);
|
H A D | registers_x86.cc | 27 std::ostream& operator<<(std::ostream& os, const Register& rhs) { 31 os << "Register[" << static_cast<int>(rhs) << "]";
|
/art/compiler/utils/x86/ |
H A D | assembler_x86.h | 55 Register rm() const { 56 return static_cast<Register>(encoding_at(0) & 7); 63 Register index() const { 64 return static_cast<Register>((encoding_at(1) >> 3) & 7); 67 Register base() const { 68 return static_cast<Register>(encoding_at(1) & 7); 83 bool IsRegister(Register reg) const { 85 && ((encoding_[0] & 0x07) == reg); // Register codes match. 92 void SetModRM(int mod, Register rm) { 98 void SetSIB(ScaleFactor scale, Register inde [all...] |
H A D | assembler_x86.cc | 35 void X86Assembler::call(Register reg) { 67 void X86Assembler::pushl(Register reg) { 92 void X86Assembler::popl(Register reg) { 105 void X86Assembler::movl(Register dst, const Immediate& imm) { 112 void X86Assembler::movl(Register dst, Register src) { 119 void X86Assembler::movl(Register dst, const Address& src) { 126 void X86Assembler::movl(const Address& dst, Register src) { 147 void X86Assembler::movzxb(Register dst, ByteRegister src) { 155 void X86Assembler::movzxb(Register ds [all...] |
H A D | managed_register_x86.cc | 42 Register low; 43 Register high; 64 Register low = AsRegisterPairLow(); 65 Register high = AsRegisterPairHigh(); 96 os << "No Register";
|
/art/compiler/utils/arm64/ |
H A D | assembler_arm64.h | 197 static vixl::Register reg_x(int code) { 204 return vixl::Register::XRegFromCode(code); 207 static vixl::Register reg_w(int code) { 208 return vixl::Register::WRegFromCode(code); 223 Register base, int32_t offset); 224 void StoreToOffset(Register source, Register base, int32_t offset); 225 void StoreSToOffset(SRegister source, Register base, int32_t offset); 226 void StoreDToOffset(DRegister source, Register base, int32_t offset); 228 void LoadImmediate(Register des [all...] |
/art/compiler/optimizing/ |
H A D | code_generator_arm.h | 32 static constexpr Register kParameterCoreRegisters[] = { R1, R2, R3 }; 36 class InvokeDexCallingConvention : public CallingConvention<Register> { 76 void Exchange(Register reg, int mem); 115 void LoadCurrentMethod(Register reg); 184 void MarkGCCard(Register temp, Register card, Register object, Register value);
|
H A D | code_generator_x86.h | 32 static constexpr Register kParameterCoreRegisters[] = { ECX, EDX, EBX }; 36 class InvokeDexCallingConvention : public CallingConvention<Register> { 76 void Exchange(Register reg, int mem); 115 void LoadCurrentMethod(Register reg); 186 void MarkGCCard(Register temp, Register card, Register object, Register value);
|
/art/runtime/arch/x86_64/ |
H A D | registers_x86_64.h | 29 enum Register { enum in namespace:art::x86_64 49 std::ostream& operator<<(std::ostream& os, const Register& rhs);
|
H A D | registers_x86_64.cc | 28 std::ostream& operator<<(std::ostream& os, const Register& rhs) { 32 os << "Register[" << static_cast<int>(rhs) << "]"; 41 os << "Register[" << static_cast<int>(rhs) << "]";
|
/art/compiler/utils/x86_64/ |
H A D | constants_x86_64.h | 32 explicit CpuRegister(Register r) : reg_(r) {} 33 explicit CpuRegister(int r) : reg_(Register(r)) {} 34 Register AsRegister() const { 44 const Register reg_;
|
H A D | managed_register_x86_64.cc | 41 Register low; 42 Register high; 63 Register low = AsRegisterPairLow().AsRegister(); 64 Register high = AsRegisterPairHigh().AsRegister(); 95 os << "No Register";
|
/art/runtime/arch/arm/ |
H A D | registers_arm.cc | 28 std::ostream& operator<<(std::ostream& os, const Register& rhs) { 32 os << "Register[" << static_cast<int>(rhs) << "]";
|
H A D | registers_arm.h | 26 enum Register { enum in namespace:art::arm 52 std::ostream& operator<<(std::ostream& os, const Register& rhs);
|
/art/runtime/arch/mips/ |
H A D | registers_mips.cc | 30 std::ostream& operator<<(std::ostream& os, const Register& rhs) { 34 os << "Register[" << static_cast<int>(rhs) << "]";
|
H A D | registers_mips.h | 29 enum Register { enum in namespace:art::mips 65 std::ostream& operator<<(std::ostream& os, const Register& rhs);
|