memcpy_base.S revision 5f45d583b0cfb4f7bed1447e8eed003a529cc69e
1/* 2 * Copyright (C) 2013 The Android Open Source Project 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * * Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * * Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in 12 * the documentation and/or other materials provided with the 13 * distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 16 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 17 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS 18 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE 19 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 21 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS 22 * OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 23 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 24 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT 25 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 30/* 31 * This code assumes it is running on a processor that supports all arm v7 32 * instructions, that supports neon instructions, and that has a 32 byte 33 * cache line. 34 */ 35 36// Assumes neon instructions and a cache line size of 32 bytes. 37 38 /* do we have at least 16-bytes to copy (needed for alignment below) */ 39 cmp r2, #16 40 blo 5f 41 42 /* align destination to cache-line for the write-buffer */ 43 rsb r3, r0, #0 44 ands r3, r3, #0xF 45 beq 2f 46 47 /* copy up to 15-bytes (count in r3) */ 48 sub r2, r2, r3 49 movs ip, r3, lsl #31 50 itt mi 51 ldrbmi lr, [r1], #1 52 strbmi lr, [r0], #1 53 itttt cs 54 ldrbcs ip, [r1], #1 55 ldrbcs lr, [r1], #1 56 strbcs ip, [r0], #1 57 strbcs lr, [r0], #1 58 movs ip, r3, lsl #29 59 bge 1f 60 // copies 4 bytes, destination 32-bits aligned 61 vld4.8 {d0[0], d1[0], d2[0], d3[0]}, [r1]! 62 vst4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0, :32]! 631: bcc 2f 64 // copies 8 bytes, destination 64-bits aligned 65 vld1.8 {d0}, [r1]! 66 vst1.8 {d0}, [r0, :64]! 67 682: /* make sure we have at least 64 bytes to copy */ 69 subs r2, r2, #64 70 blo 2f 71 721: /* The main loop copies 64 bytes at a time */ 73 vld1.8 {d0 - d3}, [r1]! 74 vld1.8 {d4 - d7}, [r1]! 75 pld [r1, #(32*2)] 76 subs r2, r2, #64 77 vst1.8 {d0 - d3}, [r0, :128]! 78 vst1.8 {d4 - d7}, [r0, :128]! 79 bhs 1b 80 812: /* fix-up the remaining count and make sure we have >= 32 bytes left */ 82 adds r2, r2, #32 83 blo 4f 84 85 /* Copy 32 bytes. These cache lines were already preloaded */ 86 vld1.8 {d0 - d3}, [r1]! 87 sub r2, r2, #32 88 vst1.8 {d0 - d3}, [r0, :128]! 89 904: /* less than 32 left */ 91 add r2, r2, #32 92 tst r2, #0x10 93 beq 5f 94 // copies 16 bytes, 128-bits aligned 95 vld1.8 {d0, d1}, [r1]! 96 vst1.8 {d0, d1}, [r0, :128]! 97 985: /* copy up to 15-bytes (count in r2) */ 99 movs ip, r2, lsl #29 100 bcc 1f 101 vld1.8 {d0}, [r1]! 102 vst1.8 {d0}, [r0]! 1031: bge 2f 104 vld4.8 {d0[0], d1[0], d2[0], d3[0]}, [r1]! 105 vst4.8 {d0[0], d1[0], d2[0], d3[0]}, [r0]! 1062: movs ip, r2, lsl #31 107 itt mi 108 ldrbmi r3, [r1], #1 109 strbmi r3, [r0], #1 110 itttt cs 111 ldrbcs ip, [r1], #1 112 ldrbcs lr, [r1], #1 113 strbcs ip, [r0], #1 114 strbcs lr, [r0], #1 115 116 ldmfd sp!, {r0, lr} 117 bx lr 118