asm.h revision 851e68a2402fa414544e66650e09dfdaac813e51
1/* $OpenBSD: asm.h,v 1.7 2004/10/20 12:49:15 pefo Exp $ */ 2 3/* 4 * Copyright (c) 2001-2002 Opsycon AB (www.opsycon.se / www.opsycon.com) 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS 16 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 17 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY 19 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 */ 28#ifndef _MIPS64_ASM_H 29#define _MIPS64_ASM_H 30 31#ifndef _ALIGN_TEXT 32# define _ALIGN_TEXT .align 4 33#endif 34 35#undef __bionic_asm_custom_entry 36#undef __bionic_asm_custom_end 37#define __bionic_asm_custom_entry(f) .ent f 38#define __bionic_asm_custom_end(f) .end f 39 40#include <machine/regdef.h> 41 42#define _MIPS_ISA_MIPS1 1 /* R2000/R3000 */ 43#define _MIPS_ISA_MIPS2 2 /* R4000/R6000 */ 44#define _MIPS_ISA_MIPS3 3 /* R4000 */ 45#define _MIPS_ISA_MIPS4 4 /* TFP (R1x000) */ 46#define _MIPS_ISA_MIPS5 5 47#define _MIPS_ISA_MIPS32 6 48#define _MIPS_ISA_MIPS64 7 49 50#if !defined(ABICALLS) && !defined(_NO_ABICALLS) 51#define ABICALLS .abicalls 52#endif 53 54#if defined(ABICALLS) && !defined(_KERNEL) 55 ABICALLS 56#endif 57 58#if !defined(__MIPSEL__) && !defined(__MIPSEB__) 59#error "__MIPSEL__ or __MIPSEB__ must be defined" 60#endif 61/* 62 * Define how to access unaligned data word 63 */ 64#if defined(__MIPSEL__) 65#define LWLO lwl 66#define LWHI lwr 67#define SWLO swl 68#define SWHI swr 69#define LDLO ldl 70#define LDHI ldr 71#define SDLO sdl 72#define SDHI sdr 73#endif 74#if defined(__MIPSEB__) 75#define LWLO lwr 76#define LWHI lwl 77#define SWLO swr 78#define SWHI swl 79#define LDLO ldr 80#define LDHI ldl 81#define SDLO sdr 82#define SDHI sdl 83#endif 84 85/* 86 * Define programming environment for ABI. 87 */ 88#if defined(ABICALLS) && !defined(_KERNEL) && !defined(_STANDALONE) 89 90#if (_MIPS_SIM == _ABIO32) || (_MIPS_SIM == _ABI32) 91#define NARGSAVE 4 92 93#define SETUP_GP \ 94 .set noreorder; \ 95 .cpload t9; \ 96 .set reorder; 97 98#define SAVE_GP(x) \ 99 .cprestore x 100 101#define SETUP_GP64(gpoff, name) 102#define RESTORE_GP64 103#endif 104 105#if (_MIPS_SIM == _ABI64) || (_MIPS_SIM == _ABIN32) 106#define NARGSAVE 0 107 108#define SETUP_GP 109#define SAVE_GP(x) 110#define SETUP_GP64(gpoff, name) \ 111 .cpsetup t9, gpoff, name 112#define RESTORE_GP64 \ 113 .cpreturn 114#endif 115 116#define MKFSIZ(narg,locals) (((narg+locals)*REGSZ+31)&(~31)) 117 118#else /* defined(ABICALLS) && !defined(_KERNEL) */ 119 120#define NARGSAVE 4 121#define SETUP_GP 122#define SAVE_GP(x) 123 124#define ALIGNSZ 16 /* Stack layout alignment */ 125#define FRAMESZ(sz) (((sz) + (ALIGNSZ-1)) & ~(ALIGNSZ-1)) 126 127#endif 128 129/* 130 * Basic register operations based on selected ISA 131 */ 132#if (_MIPS_ISA == _MIPS_ISA_MIPS1 || _MIPS_ISA == _MIPS_ISA_MIPS2 || _MIPS_ISA == _MIPS_ISA_MIPS32) 133#define REGSZ 4 /* 32 bit mode register size */ 134#define LOGREGSZ 2 /* log rsize */ 135#define REG_S sw 136#define REG_L lw 137#define CF_SZ 24 /* Call frame size */ 138#define CF_ARGSZ 16 /* Call frame arg size */ 139#define CF_RA_OFFS 20 /* Call ra save offset */ 140#endif 141 142#if (_MIPS_ISA == _MIPS_ISA_MIPS3 || _MIPS_ISA == _MIPS_ISA_MIPS4 || _MIPS_ISA == _MIPS_ISA_MIPS64) 143#define REGSZ 8 /* 64 bit mode register size */ 144#define LOGREGSZ 3 /* log rsize */ 145#define REG_S sd 146#define REG_L ld 147#define CF_SZ 48 /* Call frame size (multiple of ALIGNSZ) */ 148#define CF_ARGSZ 32 /* Call frame arg size */ 149#define CF_RA_OFFS 40 /* Call ra save offset */ 150#endif 151 152#define REGSZ_FP 8 /* 64 bit FP register size */ 153 154#ifndef __LP64__ 155#define PTR_L lw 156#define PTR_S sw 157#define PTR_SUB sub 158#define PTR_ADD add 159#define PTR_SUBU subu 160#define PTR_ADDU addu 161#define LI li 162#define LA la 163#define PTR_SLL sll 164#define PTR_SRL srl 165#define PTR_VAL .word 166#else 167#define PTR_L ld 168#define PTR_S sd 169#define PTR_ADD dadd 170#define PTR_SUB dsub 171#define PTR_SUBU dsubu 172#define PTR_ADDU daddu 173#define LI dli 174#define LA dla 175#define PTR_SLL dsll 176#define PTR_SRL dsrl 177#define PTR_VAL .dword 178#endif 179 180/* 181 * LEAF(x, fsize) 182 * 183 * Declare a leaf routine. 184 */ 185#define LEAF(x, fsize) \ 186 .align 3; \ 187 .globl x; \ 188 .ent x, 0; \ 189x: ; \ 190 .cfi_startproc; \ 191 .frame sp, fsize, ra; \ 192 SETUP_GP \ 193 194/* 195 * NON_LEAF(x) 196 * 197 * Declare a non-leaf routine (a routine that makes other C calls). 198 */ 199#define NON_LEAF(x, fsize, retpc) \ 200 .align 3; \ 201 .globl x; \ 202 .ent x, 0; \ 203x: ; \ 204 .cfi_startproc; \ 205 .frame sp, fsize, retpc; \ 206 SETUP_GP \ 207 208#endif /* !_MIPS_ASM_H */ 209