fenv.h revision 43bf81e54427ac7ae55dc79c057cca62f94c5f77 
1/*-
2 * Copyright (c) 2004-2005 David Schultz <das (at) FreeBSD.ORG>
3 * All rights reserved.
4 *
5 * Redistribution and use in source and binary forms, with or without
6 * modification, are permitted provided that the following conditions
7 * are met:
8 * 1. Redistributions of source code must retain the above copyright
9 *    notice, this list of conditions and the following disclaimer.
10 * 2. Redistributions in binary form must reproduce the above copyright
11 *    notice, this list of conditions and the following disclaimer in the
12 *    documentation and/or other materials provided with the distribution.
13 *
14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17 * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24 * SUCH DAMAGE.
25 */
26
27#ifndef _AMD64_FENV_H_
28#define _AMD64_FENV_H_
29
30#include <sys/types.h>
31
32__BEGIN_DECLS
33
34/*
35 * Each symbol representing a floating point exception expands to an integer
36 * constant expression with values, such that bitwise-inclusive ORs of _all
37 * combinations_ of the constants result in distinct values.
38 *
39 * We use such values that allow direct bitwise operations on FPU/SSE registers.
40 */
41#define FE_INVALID    0x01
42#define FE_DENORMAL   0x02
43#define FE_DIVBYZERO  0x04
44#define FE_OVERFLOW   0x08
45#define FE_UNDERFLOW  0x10
46#define FE_INEXACT    0x20
47
48/*
49 * The following symbol is simply the bitwise-inclusive OR of all floating-point
50 * exception constants defined above.
51 */
52#define FE_ALL_EXCEPT   (FE_INVALID | FE_DENORMAL | FE_DIVBYZERO | \
53                         FE_OVERFLOW | FE_UNDERFLOW | FE_INEXACT)
54
55/*
56 * Each symbol representing the rounding direction, expands to an integer
57 * constant expression whose value is distinct non-negative value.
58 *
59 * We use such values that allow direct bitwise operations on FPU/SSE registers.
60 */
61#define FE_TONEAREST  0x000
62#define FE_DOWNWARD   0x400
63#define FE_UPWARD     0x800
64#define FE_TOWARDZERO 0xc00
65
66/*
67 * fenv_t represents the entire floating-point environment.
68 */
69typedef struct {
70  struct {
71    __uint32_t __control;   /* Control word register */
72    __uint32_t __status;    /* Status word register */
73    __uint32_t __tag;       /* Tag word register */
74    __uint32_t __others[4]; /* EIP, Pointer Selector, etc */
75  } __x87;
76  __uint32_t __mxcsr;       /* Control, status register */
77} fenv_t;
78
79/*
80 * fexcept_t represents the floating-point status flags collectively, including
81 * any status the implementation associates with the flags.
82 *
83 * A floating-point status flag is a system variable whose value is set (but
84 * never cleared) when a floating-point exception is raised, which occurs as a
85 * side effect of exceptional floating-point arithmetic to provide auxiliary
86 * information.
87 *
88 * A floating-point control mode is a system variable whose value may be set by
89 * the user to affect the subsequent behavior of floating-point arithmetic.
90 */
91typedef __uint32_t fexcept_t;
92
93__END_DECLS
94
95#endif /* !_AMD64_FENV_H_ */
96