1aed1cc94c105736a5e6010e9c84cc32910b865d6mikhal@webrtc.org/* 2b0c97975894a5eebebf9d93147cdd941a3accb63fbarchard@google.com * Copyright 2011 The LibYuv Project Authors. All rights reserved. 3aed1cc94c105736a5e6010e9c84cc32910b865d6mikhal@webrtc.org * 4aed1cc94c105736a5e6010e9c84cc32910b865d6mikhal@webrtc.org * Use of this source code is governed by a BSD-style license 5aed1cc94c105736a5e6010e9c84cc32910b865d6mikhal@webrtc.org * that can be found in the LICENSE file in the root of the source 6aed1cc94c105736a5e6010e9c84cc32910b865d6mikhal@webrtc.org * tree. An additional intellectual property rights grant can be found 7cde587092fef0dbed2c35602f30b79e7b892e766fbarchard@google.com * in the file PATENTS. All contributing project authors may 8aed1cc94c105736a5e6010e9c84cc32910b865d6mikhal@webrtc.org * be found in the AUTHORS file in the root of the source tree. 9aed1cc94c105736a5e6010e9c84cc32910b865d6mikhal@webrtc.org */ 10aed1cc94c105736a5e6010e9c84cc32910b865d6mikhal@webrtc.org 11f37f9a3542799ed17cc5c1c03f94a7ef279cfc20fbarchard@google.com#ifndef INCLUDE_LIBYUV_CPU_ID_H_ // NOLINT 12a1280730c24b5c94ef16949777f65e597719488efbarchard@google.com#define INCLUDE_LIBYUV_CPU_ID_H_ 13aed1cc94c105736a5e6010e9c84cc32910b865d6mikhal@webrtc.org 14fc7314e86bc7a1a88b38b815e881183521801ea9fbarchard@google.com#include "libyuv/basic_types.h" 15fc7314e86bc7a1a88b38b815e881183521801ea9fbarchard@google.com 16fe5ff7ed5451496281697bda9cb85084c532926cfbarchard@google.com#ifdef __cplusplus 17aed1cc94c105736a5e6010e9c84cc32910b865d6mikhal@webrtc.orgnamespace libyuv { 18fe5ff7ed5451496281697bda9cb85084c532926cfbarchard@google.comextern "C" { 19fe5ff7ed5451496281697bda9cb85084c532926cfbarchard@google.com#endif 20aed1cc94c105736a5e6010e9c84cc32910b865d6mikhal@webrtc.org 212bbb64df2c997725ab1a024a0a21f1c63f895797fbarchard@google.com// TODO(fbarchard): Consider overlapping bits for different architectures. 22c7277d08e8d33d470b0f4a5e9c3c58f5f250f114fbarchard@google.com// Internal flag to indicate cpuid requires initialization. 23959b290a96ff8dee4ab6a011bd80380df9038e7efbarchard@google.com#define kCpuInit 0x1 24ab415818447b05cff5bb4dc9c5f0491c543253d6fbarchard@google.com 25ab415818447b05cff5bb4dc9c5f0491c543253d6fbarchard@google.com// These flags are only valid on ARM processors. 26ab415818447b05cff5bb4dc9c5f0491c543253d6fbarchard@google.comstatic const int kCpuHasARM = 0x2; 27ab415818447b05cff5bb4dc9c5f0491c543253d6fbarchard@google.comstatic const int kCpuHasNEON = 0x4; 28ab415818447b05cff5bb4dc9c5f0491c543253d6fbarchard@google.com// 0x8 reserved for future ARM flag. 29ab415818447b05cff5bb4dc9c5f0491c543253d6fbarchard@google.com 30ab415818447b05cff5bb4dc9c5f0491c543253d6fbarchard@google.com// These flags are only valid on x86 processors. 31ab415818447b05cff5bb4dc9c5f0491c543253d6fbarchard@google.comstatic const int kCpuHasX86 = 0x10; 32ab415818447b05cff5bb4dc9c5f0491c543253d6fbarchard@google.comstatic const int kCpuHasSSE2 = 0x20; 33ab415818447b05cff5bb4dc9c5f0491c543253d6fbarchard@google.comstatic const int kCpuHasSSSE3 = 0x40; 34ab415818447b05cff5bb4dc9c5f0491c543253d6fbarchard@google.comstatic const int kCpuHasSSE41 = 0x80; 35ab415818447b05cff5bb4dc9c5f0491c543253d6fbarchard@google.comstatic const int kCpuHasSSE42 = 0x100; 36ab415818447b05cff5bb4dc9c5f0491c543253d6fbarchard@google.comstatic const int kCpuHasAVX = 0x200; 3778070bc1ba0978000268f919f1138bede28df436fbarchard@google.comstatic const int kCpuHasAVX2 = 0x400; 388c9de166a11222d6aa38deb12449b30451d2eca5fbarchard@google.comstatic const int kCpuHasERMS = 0x800; 392bbb64df2c997725ab1a024a0a21f1c63f895797fbarchard@google.comstatic const int kCpuHasFMA3 = 0x1000; 402bbb64df2c997725ab1a024a0a21f1c63f895797fbarchard@google.com// 0x2000, 0x4000, 0x8000 reserved for future X86 flags. 419394ed99fcc9802a068ba4a44c36aed79ce87157fbarchard@google.com 42ca41005256d8b16fef98bc3383c44c4a3b79bb44fbarchard@google.com// These flags are only valid on MIPS processors. 432bbb64df2c997725ab1a024a0a21f1c63f895797fbarchard@google.comstatic const int kCpuHasMIPS = 0x10000; 442bbb64df2c997725ab1a024a0a21f1c63f895797fbarchard@google.comstatic const int kCpuHasMIPS_DSP = 0x20000; 452bbb64df2c997725ab1a024a0a21f1c63f895797fbarchard@google.comstatic const int kCpuHasMIPS_DSPR2 = 0x40000; 46ca41005256d8b16fef98bc3383c44c4a3b79bb44fbarchard@google.com 47fc7314e86bc7a1a88b38b815e881183521801ea9fbarchard@google.com// Internal function used to auto-init. 48fc7314e86bc7a1a88b38b815e881183521801ea9fbarchard@google.comLIBYUV_API 49fc7314e86bc7a1a88b38b815e881183521801ea9fbarchard@google.comint InitCpuFlags(void); 50fc7314e86bc7a1a88b38b815e881183521801ea9fbarchard@google.com 51fc7314e86bc7a1a88b38b815e881183521801ea9fbarchard@google.com// Internal function for parsing /proc/cpuinfo. 52fc7314e86bc7a1a88b38b815e881183521801ea9fbarchard@google.comLIBYUV_API 53fc7314e86bc7a1a88b38b815e881183521801ea9fbarchard@google.comint ArmCpuCaps(const char* cpuinfo_name); 54fc7314e86bc7a1a88b38b815e881183521801ea9fbarchard@google.com 5541686e847907b0ff0bd90873f0f312c88293cd63fbarchard@google.com// Detect CPU has SSE2 etc. 56c7bd1dbea68245297831d4f3e187405db20d4101fbarchard@google.com// Test_flag parameter should be one of kCpuHas constants above. 573c00cf04f343a71650d8ee5b989311ba885c28f5fbarchard@google.com// returns non-zero if instruction set is detected 589d206a29cdfdbf6e6a29bd71881e5c204f3acefdfbarchard@google.comstatic __inline int TestCpuFlag(int test_flag) { 59c7277d08e8d33d470b0f4a5e9c3c58f5f250f114fbarchard@google.com LIBYUV_API extern int cpu_info_; 601d160cb99f2b05df80c4555bd769825ad1175dc9fbarchard@google.com return (cpu_info_ == kCpuInit ? InitCpuFlags() : cpu_info_) & test_flag; 613c00cf04f343a71650d8ee5b989311ba885c28f5fbarchard@google.com} 62aed1cc94c105736a5e6010e9c84cc32910b865d6mikhal@webrtc.org 6341686e847907b0ff0bd90873f0f312c88293cd63fbarchard@google.com// For testing, allow CPU flags to be disabled. 64b61497636a648c771ac55d184a80b17aca7414f5fbarchard@google.com// ie MaskCpuFlags(~kCpuHasSSSE3) to disable SSSE3. 650ab54406939b220e46eaee03f410ac88cc796762fbarchard@google.com// MaskCpuFlags(-1) to enable all cpu specific optimizations. 66c7bd1dbea68245297831d4f3e187405db20d4101fbarchard@google.com// MaskCpuFlags(0) to disable all cpu specific optimizations. 67fc7314e86bc7a1a88b38b815e881183521801ea9fbarchard@google.comLIBYUV_API 68891091c6d456699df6abf7f61211cbc7612991fdfbarchard@google.comvoid MaskCpuFlags(int enable_flags); 69aed1cc94c105736a5e6010e9c84cc32910b865d6mikhal@webrtc.org 7064ce0ab544591b1e26ae6d276932cacdb8137071fbarchard@google.com// Low level cpuid for X86. Returns zeros on other CPUs. 71e35422d94bda549997db4fc0f9b6836b325e1888fbarchard@google.com// eax is the info type that you want. 72e35422d94bda549997db4fc0f9b6836b325e1888fbarchard@google.com// ecx is typically the cpu number, and should normally be zero. 73fc7314e86bc7a1a88b38b815e881183521801ea9fbarchard@google.comLIBYUV_API 74e35422d94bda549997db4fc0f9b6836b325e1888fbarchard@google.comvoid CpuId(uint32 eax, uint32 ecx, uint32* cpu_info); 750b0e91792f8af8729495ad4b0662214064cadd99fbarchard@google.com 76fe5ff7ed5451496281697bda9cb85084c532926cfbarchard@google.com#ifdef __cplusplus 77fe5ff7ed5451496281697bda9cb85084c532926cfbarchard@google.com} // extern "C" 78aed1cc94c105736a5e6010e9c84cc32910b865d6mikhal@webrtc.org} // namespace libyuv 79fe5ff7ed5451496281697bda9cb85084c532926cfbarchard@google.com#endif 80aed1cc94c105736a5e6010e9c84cc32910b865d6mikhal@webrtc.org 81f37f9a3542799ed17cc5c1c03f94a7ef279cfc20fbarchard@google.com#endif // INCLUDE_LIBYUV_CPU_ID_H_ NOLINT 82