1224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 2224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * \file drm.h 3224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Header for the Direct Rendering Manager 4224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 5224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * \author Rickard E. (Rik) Faith <faith@valinux.com> 6224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 7224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * \par Acknowledgments: 8224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Dec 1999, Richard Henderson <rth@twiddle.net>, move to generic \c cmpxchg. 9224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 10224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 11224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* 12224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas. 13224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California. 14224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * All rights reserved. 15224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 16224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Permission is hereby granted, free of charge, to any person obtaining a 17224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * copy of this software and associated documentation files (the "Software"), 18224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * to deal in the Software without restriction, including without limitation 19224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * the rights to use, copy, modify, merge, publish, distribute, sublicense, 20224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * and/or sell copies of the Software, and to permit persons to whom the 21224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Software is furnished to do so, subject to the following conditions: 22224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 23224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * The above copyright notice and this permission notice (including the next 24224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * paragraph) shall be included in all copies or substantial portions of the 25224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Software. 26224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 27224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 28224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 29224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 30224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 31224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 32224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 33224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * OTHER DEALINGS IN THE SOFTWARE. 34224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 35224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 36224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#ifndef _DRM_H_ 37224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define _DRM_H_ 38224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 39224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#if defined(__KERNEL__) || defined(__linux__) 40224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 41224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#include <linux/types.h> 42224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#include <asm/ioctl.h> 43224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef unsigned int drm_handle_t; 44224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 45224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#else /* One of the BSDs */ 46224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 47224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#include <sys/ioccom.h> 48224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#include <sys/types.h> 49224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef int8_t __s8; 50224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef uint8_t __u8; 51224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef int16_t __s16; 52224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef uint16_t __u16; 53224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef int32_t __s32; 54224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef uint32_t __u32; 55224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef int64_t __s64; 56224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef uint64_t __u64; 57224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef unsigned long drm_handle_t; 58224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 59224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#endif 60224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 61224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_NAME "drm" /**< Name in kernel, /dev, and /proc */ 62224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MIN_ORDER 5 /**< At least 2^5 bytes = 32 bytes */ 63224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_MAX_ORDER 22 /**< Up to 2^22 bytes = 4MB */ 64224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_RAM_PERCENT 10 /**< How much system ram can we lock? */ 65224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 66224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define _DRM_LOCK_HELD 0x80000000U /**< Hardware lock is held */ 67224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define _DRM_LOCK_CONT 0x40000000U /**< Hardware lock is contended */ 68224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define _DRM_LOCK_IS_HELD(lock) ((lock) & _DRM_LOCK_HELD) 69224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define _DRM_LOCK_IS_CONT(lock) ((lock) & _DRM_LOCK_CONT) 70224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT)) 71224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 72224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef unsigned int drm_context_t; 73224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef unsigned int drm_drawable_t; 74224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef unsigned int drm_magic_t; 75224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 76224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 77224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Cliprect. 78224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 79224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * \warning: If you change this structure, make sure you change 80224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * XF86DRIClipRectRec in the server as well 81224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 82224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * \note KW: Actually it's illegal to change either for 83224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * backwards-compatibility reasons. 84224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 85224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_clip_rect { 86224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned short x1; 87224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned short y1; 88224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned short x2; 89224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned short y2; 90224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 91224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 92224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 93224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Drawable information. 94224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 95224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_drawable_info { 96224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned int num_rects; 97224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng struct drm_clip_rect *rects; 98224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 99224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 100224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 101224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Texture region, 102224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 103224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_tex_region { 104224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned char next; 105224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned char prev; 106224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned char in_use; 107224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned char padding; 108224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned int age; 109224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 110224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 111224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 112224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Hardware lock. 113224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 114224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * The lock structure is a simple cache-line aligned integer. To avoid 115224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * processor bus contention on a multiprocessor system, there should not be any 116224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * other data stored in the same cache line. 117224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 118224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_hw_lock { 119224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __volatile__ unsigned int lock; /**< lock variable */ 120224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng char padding[60]; /**< Pad to cache line */ 121224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 122224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 123224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 124224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_VERSION ioctl argument type. 125224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 126224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * \sa drmGetVersion(). 127224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 128224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_version { 129224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int version_major; /**< Major version */ 130224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int version_minor; /**< Minor version */ 131224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int version_patchlevel; /**< Patch level */ 132224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng size_t name_len; /**< Length of name buffer */ 133224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng char __user *name; /**< Name of driver */ 134224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng size_t date_len; /**< Length of date buffer */ 135224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng char __user *date; /**< User-space buffer to hold date */ 136224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng size_t desc_len; /**< Length of desc buffer */ 137224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng char __user *desc; /**< User-space buffer to hold desc */ 138224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 139224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 140224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 141224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_GET_UNIQUE ioctl argument type. 142224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 143224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * \sa drmGetBusid() and drmSetBusId(). 144224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 145224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_unique { 146224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng size_t unique_len; /**< Length of unique */ 147224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng char __user *unique; /**< Unique name for driver instantiation */ 148224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 149224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 150224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_list { 151224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int count; /**< Length of user-space structures */ 152224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng struct drm_version __user *version; 153224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 154224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 155224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_block { 156224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int unused; 157224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 158224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 159224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 160224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_CONTROL ioctl argument type. 161224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 162224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * \sa drmCtlInstHandler() and drmCtlUninstHandler(). 163224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 164224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_control { 165224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng enum { 166224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng DRM_ADD_COMMAND, 167224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng DRM_RM_COMMAND, 168224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng DRM_INST_HANDLER, 169224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng DRM_UNINST_HANDLER 170224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng } func; 171224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int irq; 172224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 173224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 174224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 175224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Type of memory to map. 176224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 177224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum drm_map_type { 178224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_FRAME_BUFFER = 0, /**< WC (no caching), no core dump */ 179224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_REGISTERS = 1, /**< no caching, no core dump */ 180224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_SHM = 2, /**< shared, cached */ 181224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_AGP = 3, /**< AGP/GART */ 182224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_SCATTER_GATHER = 4, /**< Scatter/gather memory for PCI DMA */ 183224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_CONSISTENT = 5, /**< Consistent memory for PCI DMA */ 184224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 185224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 186224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 187224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Memory mapping flags. 188224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 189224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum drm_map_flags { 190224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_RESTRICTED = 0x01, /**< Cannot be mapped to user-virtual */ 191224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_READ_ONLY = 0x02, 192224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_LOCKED = 0x04, /**< shared, cached, locked */ 193224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_KERNEL = 0x08, /**< kernel requires access */ 194224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */ 195224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_CONTAINS_LOCK = 0x20, /**< SHM page that contains lock */ 196224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_REMOVABLE = 0x40, /**< Removable mapping */ 197224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_DRIVER = 0x80 /**< Managed by driver */ 198224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 199224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 200224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_ctx_priv_map { 201224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned int ctx_id; /**< Context requesting private mapping */ 202224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng void *handle; /**< Handle of map */ 203224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 204224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 205224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 206224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls 207224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * argument type. 208224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 209224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * \sa drmAddMap(). 210224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 211224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_map { 212224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned long offset; /**< Requested physical address (0 for SAREA)*/ 213224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned long size; /**< Requested physical size (bytes) */ 214224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng enum drm_map_type type; /**< Type of memory to map */ 215224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng enum drm_map_flags flags; /**< Flags */ 216224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng void *handle; /**< User-space: "Handle" to pass to mmap() */ 217224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /**< Kernel-space: kernel-virtual address */ 218224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int mtrr; /**< MTRR slot used */ 219224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* Private data */ 220224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 221224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 222224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 223224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_GET_CLIENT ioctl argument type. 224224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 225224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_client { 226224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int idx; /**< Which client desired? */ 227224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int auth; /**< Is client authenticated? */ 228224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned long pid; /**< Process ID */ 229224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned long uid; /**< User ID */ 230224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned long magic; /**< Magic */ 231224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned long iocs; /**< Ioctl count */ 232224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 233224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 234224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum drm_stat_type { 235224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_STAT_LOCK, 236224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_STAT_OPENS, 237224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_STAT_CLOSES, 238224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_STAT_IOCTLS, 239224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_STAT_LOCKS, 240224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_STAT_UNLOCKS, 241224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_STAT_VALUE, /**< Generic value */ 242224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_STAT_BYTE, /**< Generic byte counter (1024bytes/K) */ 243224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_STAT_COUNT, /**< Generic non-byte counter (1000/k) */ 244224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 245224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_STAT_IRQ, /**< IRQ */ 246224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_STAT_PRIMARY, /**< Primary DMA bytes */ 247224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_STAT_SECONDARY, /**< Secondary DMA bytes */ 248224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_STAT_DMA, /**< DMA */ 249224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_STAT_SPECIAL, /**< Special DMA (e.g., priority or polled) */ 250224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_STAT_MISSED /**< Missed DMA opportunity */ 251224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* Add to the *END* of the list */ 252224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 253224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 254224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 255224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_GET_STATS ioctl argument type. 256224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 257224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_stats { 258224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned long count; 259224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng struct { 260224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned long value; 261224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng enum drm_stat_type type; 262224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng } data[15]; 263224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 264224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 265224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 266224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Hardware locking flags. 267224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 268224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum drm_lock_flags { 269224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_LOCK_READY = 0x01, /**< Wait until hardware is ready for DMA */ 270224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_LOCK_QUIESCENT = 0x02, /**< Wait until hardware quiescent */ 271224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_LOCK_FLUSH = 0x04, /**< Flush this context's DMA queue first */ 272224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_LOCK_FLUSH_ALL = 0x08, /**< Flush all DMA queues first */ 273224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* These *HALT* flags aren't supported yet 274224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng -- they will be used to support the 275224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng full-screen DGA-like mode. */ 276224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */ 277224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_HALT_CUR_QUEUES = 0x20 /**< Halt all current queues */ 278224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 279224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 280224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 281224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type. 282224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 283224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * \sa drmGetLock() and drmUnlock(). 284224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 285224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_lock { 286224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int context; 287224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng enum drm_lock_flags flags; 288224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 289224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 290224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 291224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DMA flags 292224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 293224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * \warning 294224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * These values \e must match xf86drm.h. 295224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 296224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * \sa drm_dma. 297224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 298224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum drm_dma_flags { 299224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* Flags for DMA buffer dispatch */ 300224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_DMA_BLOCK = 0x01, /**< 301224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Block until buffer dispatched. 302224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 303224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * \note The buffer may not yet have 304224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * been processed by the hardware -- 305224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * getting a hardware lock with the 306224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * hardware quiescent will ensure 307224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * that the buffer has been 308224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * processed. 309224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 310224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */ 311224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_DMA_PRIORITY = 0x04, /**< High priority dispatch */ 312224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 313224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* Flags for DMA buffer request */ 314224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_DMA_WAIT = 0x10, /**< Wait for free buffers */ 315224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_DMA_SMALLER_OK = 0x20, /**< Smaller-than-requested buffers OK */ 316224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_DMA_LARGER_OK = 0x40 /**< Larger-than-requested buffers OK */ 317224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 318224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 319224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 320224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type. 321224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 322224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * \sa drmAddBufs(). 323224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 324224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_buf_desc { 325224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int count; /**< Number of buffers of this size */ 326224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int size; /**< Size in bytes */ 327224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int low_mark; /**< Low water mark */ 328224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int high_mark; /**< High water mark */ 329224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng enum { 330224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */ 331224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */ 332224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_SG_BUFFER = 0x04, /**< Scatter/gather memory buffer */ 333224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_FB_BUFFER = 0x08, /**< Buffer is in frame buffer */ 334224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_PCI_BUFFER_RO = 0x10 /**< Map PCI DMA buffer read-only */ 335224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng } flags; 336224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned long agp_start; /**< 337224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Start address of where the AGP buffers are 338224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * in the AGP aperture 339224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 340224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 341224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 342224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 343224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_INFO_BUFS ioctl argument type. 344224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 345224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_buf_info { 346224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int count; /**< Entries in list */ 347224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng struct drm_buf_desc __user *list; 348224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 349224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 350224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 351224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_FREE_BUFS ioctl argument type. 352224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 353224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_buf_free { 354224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int count; 355224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int __user *list; 356224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 357224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 358224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 359224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Buffer information 360224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 361224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * \sa drm_buf_map. 362224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 363224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_buf_pub { 364224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int idx; /**< Index into the master buffer list */ 365224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int total; /**< Buffer size */ 366224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int used; /**< Amount of buffer in use (for DMA) */ 367224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng void __user *address; /**< Address of buffer */ 368224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 369224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 370224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 371224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_MAP_BUFS ioctl argument type. 372224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 373224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_buf_map { 374224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int count; /**< Length of the buffer list */ 375224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng void __user *virtual; /**< Mmap'd area in user-virtual */ 376224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng struct drm_buf_pub __user *list; /**< Buffer information */ 377224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 378224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 379224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 380224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_DMA ioctl argument type. 381224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 382224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Indices here refer to the offset into the buffer list in drm_buf_get. 383224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 384224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * \sa drmDMA(). 385224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 386224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_dma { 387224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int context; /**< Context handle */ 388224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int send_count; /**< Number of buffers to send */ 389224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int __user *send_indices; /**< List of handles to buffers */ 390224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int __user *send_sizes; /**< Lengths of data to send */ 391224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng enum drm_dma_flags flags; /**< Flags */ 392224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int request_count; /**< Number of buffers requested */ 393224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int request_size; /**< Desired size for buffers */ 394224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int __user *request_indices; /**< Buffer information */ 395224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int __user *request_sizes; 396224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int granted_count; /**< Number of buffers granted */ 397224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 398224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 399224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum drm_ctx_flags { 400224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_CONTEXT_PRESERVED = 0x01, 401224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_CONTEXT_2DONLY = 0x02 402224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 403224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 404224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 405224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_ADD_CTX ioctl argument type. 406224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 407224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * \sa drmCreateContext() and drmDestroyContext(). 408224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 409224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_ctx { 410224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng drm_context_t handle; 411224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng enum drm_ctx_flags flags; 412224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 413224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 414224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 415224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_RES_CTX ioctl argument type. 416224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 417224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_ctx_res { 418224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int count; 419224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng struct drm_ctx __user *contexts; 420224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 421224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 422224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 423224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type. 424224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 425224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_draw { 426224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng drm_drawable_t handle; 427224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 428224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 429224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 430224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_UPDATE_DRAW ioctl argument type. 431224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 432224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef enum { 433224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng DRM_DRAWABLE_CLIPRECTS, 434224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng} drm_drawable_info_type_t; 435224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 436224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_update_draw { 437224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng drm_drawable_t handle; 438224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned int type; 439224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned int num; 440224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned long long data; 441224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 442224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 443224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 444224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type. 445224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 446224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_auth { 447224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng drm_magic_t magic; 448224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 449224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 450224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 451224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_IRQ_BUSID ioctl argument type. 452224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 453224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * \sa drmGetInterruptFromBusID(). 454224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 455224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_irq_busid { 456224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int irq; /**< IRQ number */ 457224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int busnum; /**< bus number */ 458224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int devnum; /**< device number */ 459224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int funcnum; /**< function number */ 460224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 461224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 462224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengenum drm_vblank_seq_type { 463224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_VBLANK_ABSOLUTE = 0x0, /**< Wait for specific vblank sequence number */ 464224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_VBLANK_RELATIVE = 0x1, /**< Wait for given number of vblanks */ 465224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* bits 1-6 are reserved for high crtcs */ 466224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_VBLANK_HIGH_CRTC_MASK = 0x0000003e, 467224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_VBLANK_EVENT = 0x4000000, /**< Send event instead of blocking */ 468224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_VBLANK_FLIP = 0x8000000, /**< Scheduled buffer swap should flip */ 469224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_VBLANK_NEXTONMISS = 0x10000000, /**< If missed, wait for next vblank */ 470224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_VBLANK_SECONDARY = 0x20000000, /**< Secondary display controller */ 471224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_VBLANK_SIGNAL = 0x40000000 /**< Send signal instead of blocking, unsupported */ 472224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 473224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define _DRM_VBLANK_HIGH_CRTC_SHIFT 1 474224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 475224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define _DRM_VBLANK_TYPES_MASK (_DRM_VBLANK_ABSOLUTE | _DRM_VBLANK_RELATIVE) 476224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define _DRM_VBLANK_FLAGS_MASK (_DRM_VBLANK_EVENT | _DRM_VBLANK_SIGNAL | \ 477224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng _DRM_VBLANK_SECONDARY | _DRM_VBLANK_NEXTONMISS) 478224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 479224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_wait_vblank_request { 480224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng enum drm_vblank_seq_type type; 481224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned int sequence; 482224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned long signal; 483224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 484224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 485224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_wait_vblank_reply { 486224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng enum drm_vblank_seq_type type; 487224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned int sequence; 488224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng long tval_sec; 489224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng long tval_usec; 490224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 491224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 492224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 493224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_WAIT_VBLANK ioctl argument type. 494224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 495224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * \sa drmWaitVBlank(). 496224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 497224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengunion drm_wait_vblank { 498224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng struct drm_wait_vblank_request request; 499224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng struct drm_wait_vblank_reply reply; 500224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 501224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 502224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define _DRM_PRE_MODESET 1 503224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define _DRM_POST_MODESET 2 504224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 505224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 506224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_MODESET_CTL ioctl argument type 507224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 508224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * \sa drmModesetCtl(). 509224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 510224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_modeset_ctl { 511224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 crtc; 512224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 cmd; 513224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 514224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 515224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 516224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_AGP_ENABLE ioctl argument type. 517224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 518224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * \sa drmAgpEnable(). 519224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 520224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_agp_mode { 521224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned long mode; /**< AGP mode */ 522224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 523224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 524224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 525224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type. 526224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 527224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * \sa drmAgpAlloc() and drmAgpFree(). 528224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 529224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_agp_buffer { 530224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned long size; /**< In bytes -- will round to page boundary */ 531224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned long handle; /**< Used for binding / unbinding */ 532224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned long type; /**< Type of memory to allocate */ 533224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned long physical; /**< Physical used by i810 */ 534224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 535224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 536224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 537224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type. 538224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 539224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * \sa drmAgpBind() and drmAgpUnbind(). 540224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 541224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_agp_binding { 542224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned long handle; /**< From drm_agp_buffer */ 543224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned long offset; /**< In bytes -- will round to page boundary */ 544224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 545224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 546224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 547224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_AGP_INFO ioctl argument type. 548224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 549224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * \sa drmAgpVersionMajor(), drmAgpVersionMinor(), drmAgpGetMode(), 550224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * drmAgpBase(), drmAgpSize(), drmAgpMemoryUsed(), drmAgpMemoryAvail(), 551224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * drmAgpVendorId() and drmAgpDeviceId(). 552224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 553224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_agp_info { 554224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int agp_version_major; 555224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int agp_version_minor; 556224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned long mode; 557224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned long aperture_base; /* physical address */ 558224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned long aperture_size; /* bytes */ 559224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned long memory_allowed; /* bytes */ 560224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned long memory_used; 561224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 562224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /* PCI information */ 563224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned short id_vendor; 564224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned short id_device; 565224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 566224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 567224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 568224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_SG_ALLOC ioctl argument type. 569224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 570224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_scatter_gather { 571224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned long size; /**< In bytes -- will round to page boundary */ 572224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng unsigned long handle; /**< Used for mapping / unmapping */ 573224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 574224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 575224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 576224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * DRM_IOCTL_SET_VERSION ioctl argument type. 577224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 578224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_set_version { 579224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int drm_di_major; 580224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int drm_di_minor; 581224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int drm_dd_major; 582224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng int drm_dd_minor; 583224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 584224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 585224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** DRM_IOCTL_GEM_CLOSE ioctl argument type */ 586224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_gem_close { 587224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /** Handle of the object to be closed. */ 588224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 handle; 589224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 pad; 590224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 591224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 592224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** DRM_IOCTL_GEM_FLINK ioctl argument type */ 593224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_gem_flink { 594224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /** Handle for the object being named */ 595224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 handle; 596224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 597224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /** Returned global name */ 598224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 name; 599224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 600224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 601224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** DRM_IOCTL_GEM_OPEN ioctl argument type */ 602224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_gem_open { 603224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /** Name of object being opened */ 604224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 name; 605224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 606224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /** Returned handle for the object */ 607224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 handle; 608224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 609224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /** Returned size of the object */ 610224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 size; 611224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 612224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 613e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_CAP_DUMB_BUFFER 0x1 614e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_CAP_VBLANK_HIGH_CRTC 0x2 615e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_CAP_DUMB_PREFERRED_DEPTH 0x3 616e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_CAP_DUMB_PREFER_SHADOW 0x4 617e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_CAP_PRIME 0x5 618e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_PRIME_CAP_IMPORT 0x1 619e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_PRIME_CAP_EXPORT 0x2 620e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_CAP_TIMESTAMP_MONOTONIC 0x6 621e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_CAP_ASYNC_PAGE_FLIP 0x7 622e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_CAP_CURSOR_WIDTH 0x8 623e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_CAP_CURSOR_HEIGHT 0x9 624e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 625224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** DRM_IOCTL_GET_CAP ioctl argument type */ 626224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_get_cap { 627224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 capability; 628224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 value; 629224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 630224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 631e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/** 632e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * DRM_CLIENT_CAP_STEREO_3D 633e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * 634e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * if set to 1, the DRM core will expose the stereo 3D capabilities of the 635e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * monitor by advertising the supported 3D layouts in the flags of struct 636e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl * drm_mode_modeinfo. 637e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl */ 638e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_CLIENT_CAP_STEREO_3D 1 639e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 640e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl/** DRM_IOCTL_SET_CLIENT_CAP ioctl argument type */ 641e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heylstruct drm_set_client_cap { 642e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl __u64 capability; 643e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl __u64 value; 644e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl}; 645e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl 646224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_CLOEXEC O_CLOEXEC 647224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_prime_handle { 648224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 handle; 649224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 650224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /** Flags.. only applicable for handle->fd */ 651224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 flags; 652224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 653224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng /** Returned dmabuf file descriptor */ 654224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __s32 fd; 655224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 656224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 657224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#include <drm/drm_mode.h> 658224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 659224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_BASE 'd' 660224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IO(nr) _IO(DRM_IOCTL_BASE,nr) 661224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOR(nr,type) _IOR(DRM_IOCTL_BASE,nr,type) 662224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOW(nr,type) _IOW(DRM_IOCTL_BASE,nr,type) 663224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOWR(nr,type) _IOWR(DRM_IOCTL_BASE,nr,type) 664224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 665224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_VERSION DRM_IOWR(0x00, struct drm_version) 666224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_GET_UNIQUE DRM_IOWR(0x01, struct drm_unique) 667224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_GET_MAGIC DRM_IOR( 0x02, struct drm_auth) 668224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_IRQ_BUSID DRM_IOWR(0x03, struct drm_irq_busid) 669224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_GET_MAP DRM_IOWR(0x04, struct drm_map) 670224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_GET_CLIENT DRM_IOWR(0x05, struct drm_client) 671224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_GET_STATS DRM_IOR( 0x06, struct drm_stats) 672224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_SET_VERSION DRM_IOWR(0x07, struct drm_set_version) 673224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODESET_CTL DRM_IOW(0x08, struct drm_modeset_ctl) 674224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_GEM_CLOSE DRM_IOW (0x09, struct drm_gem_close) 675224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_GEM_FLINK DRM_IOWR(0x0a, struct drm_gem_flink) 676224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_GEM_OPEN DRM_IOWR(0x0b, struct drm_gem_open) 677224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_GET_CAP DRM_IOWR(0x0c, struct drm_get_cap) 678e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_IOCTL_SET_CLIENT_CAP DRM_IOW( 0x0d, struct drm_set_client_cap) 679224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 680224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_SET_UNIQUE DRM_IOW( 0x10, struct drm_unique) 681224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_AUTH_MAGIC DRM_IOW( 0x11, struct drm_auth) 682224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_BLOCK DRM_IOWR(0x12, struct drm_block) 683224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_UNBLOCK DRM_IOWR(0x13, struct drm_block) 684224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_CONTROL DRM_IOW( 0x14, struct drm_control) 685224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_ADD_MAP DRM_IOWR(0x15, struct drm_map) 686224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_ADD_BUFS DRM_IOWR(0x16, struct drm_buf_desc) 687224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MARK_BUFS DRM_IOW( 0x17, struct drm_buf_desc) 688224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_INFO_BUFS DRM_IOWR(0x18, struct drm_buf_info) 689224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MAP_BUFS DRM_IOWR(0x19, struct drm_buf_map) 690224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_FREE_BUFS DRM_IOW( 0x1a, struct drm_buf_free) 691224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 692224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_RM_MAP DRM_IOW( 0x1b, struct drm_map) 693224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 694224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_SET_SAREA_CTX DRM_IOW( 0x1c, struct drm_ctx_priv_map) 695224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_GET_SAREA_CTX DRM_IOWR(0x1d, struct drm_ctx_priv_map) 696224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 697224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_SET_MASTER DRM_IO(0x1e) 698224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_DROP_MASTER DRM_IO(0x1f) 699224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 700224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_ADD_CTX DRM_IOWR(0x20, struct drm_ctx) 701224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_RM_CTX DRM_IOWR(0x21, struct drm_ctx) 702224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MOD_CTX DRM_IOW( 0x22, struct drm_ctx) 703224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_GET_CTX DRM_IOWR(0x23, struct drm_ctx) 704224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_SWITCH_CTX DRM_IOW( 0x24, struct drm_ctx) 705224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_NEW_CTX DRM_IOW( 0x25, struct drm_ctx) 706224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_RES_CTX DRM_IOWR(0x26, struct drm_ctx_res) 707224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_ADD_DRAW DRM_IOWR(0x27, struct drm_draw) 708224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_RM_DRAW DRM_IOWR(0x28, struct drm_draw) 709224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_DMA DRM_IOWR(0x29, struct drm_dma) 710224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_LOCK DRM_IOW( 0x2a, struct drm_lock) 711224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_UNLOCK DRM_IOW( 0x2b, struct drm_lock) 712224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_FINISH DRM_IOW( 0x2c, struct drm_lock) 713224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 714224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_PRIME_HANDLE_TO_FD DRM_IOWR(0x2d, struct drm_prime_handle) 715224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_PRIME_FD_TO_HANDLE DRM_IOWR(0x2e, struct drm_prime_handle) 716224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 717224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_AGP_ACQUIRE DRM_IO( 0x30) 718224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_AGP_RELEASE DRM_IO( 0x31) 719224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_AGP_ENABLE DRM_IOW( 0x32, struct drm_agp_mode) 720224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_AGP_INFO DRM_IOR( 0x33, struct drm_agp_info) 721224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_AGP_ALLOC DRM_IOWR(0x34, struct drm_agp_buffer) 722224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_AGP_FREE DRM_IOW( 0x35, struct drm_agp_buffer) 723224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_AGP_BIND DRM_IOW( 0x36, struct drm_agp_binding) 724224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_AGP_UNBIND DRM_IOW( 0x37, struct drm_agp_binding) 725224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 726224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_SG_ALLOC DRM_IOWR(0x38, struct drm_scatter_gather) 727224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_SG_FREE DRM_IOW( 0x39, struct drm_scatter_gather) 728224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 729224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_WAIT_VBLANK DRM_IOWR(0x3a, union drm_wait_vblank) 730224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 731224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_UPDATE_DRAW DRM_IOW(0x3f, struct drm_update_draw) 732224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 733224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_GETRESOURCES DRM_IOWR(0xA0, struct drm_mode_card_res) 734224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_GETCRTC DRM_IOWR(0xA1, struct drm_mode_crtc) 735224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_SETCRTC DRM_IOWR(0xA2, struct drm_mode_crtc) 736224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_CURSOR DRM_IOWR(0xA3, struct drm_mode_cursor) 737224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_GETGAMMA DRM_IOWR(0xA4, struct drm_mode_crtc_lut) 738224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_SETGAMMA DRM_IOWR(0xA5, struct drm_mode_crtc_lut) 739224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_GETENCODER DRM_IOWR(0xA6, struct drm_mode_get_encoder) 740224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_GETCONNECTOR DRM_IOWR(0xA7, struct drm_mode_get_connector) 741224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_ATTACHMODE DRM_IOWR(0xA8, struct drm_mode_mode_cmd) /* deprecated (never worked) */ 742224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_DETACHMODE DRM_IOWR(0xA9, struct drm_mode_mode_cmd) /* deprecated (never worked) */ 743224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 744224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_GETPROPERTY DRM_IOWR(0xAA, struct drm_mode_get_property) 745224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_SETPROPERTY DRM_IOWR(0xAB, struct drm_mode_connector_set_property) 746224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_GETPROPBLOB DRM_IOWR(0xAC, struct drm_mode_get_blob) 747224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_GETFB DRM_IOWR(0xAD, struct drm_mode_fb_cmd) 748224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_ADDFB DRM_IOWR(0xAE, struct drm_mode_fb_cmd) 749224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_RMFB DRM_IOWR(0xAF, unsigned int) 750224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_PAGE_FLIP DRM_IOWR(0xB0, struct drm_mode_crtc_page_flip) 751224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_DIRTYFB DRM_IOWR(0xB1, struct drm_mode_fb_dirty_cmd) 752224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 753224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_CREATE_DUMB DRM_IOWR(0xB2, struct drm_mode_create_dumb) 754224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_MAP_DUMB DRM_IOWR(0xB3, struct drm_mode_map_dumb) 755224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_DESTROY_DUMB DRM_IOWR(0xB4, struct drm_mode_destroy_dumb) 756224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_GETPLANERESOURCES DRM_IOWR(0xB5, struct drm_mode_get_plane_res) 757224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_GETPLANE DRM_IOWR(0xB6, struct drm_mode_get_plane) 758224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_SETPLANE DRM_IOWR(0xB7, struct drm_mode_set_plane) 759224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_ADDFB2 DRM_IOWR(0xB8, struct drm_mode_fb_cmd2) 760224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_OBJ_GETPROPERTIES DRM_IOWR(0xB9, struct drm_mode_obj_get_properties) 761224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_IOCTL_MODE_OBJ_SETPROPERTY DRM_IOWR(0xBA, struct drm_mode_obj_set_property) 762e87eaf040ab639e94ed0a58ff0eac68d1d38fb0aEd Heyl#define DRM_IOCTL_MODE_CURSOR2 DRM_IOWR(0xBB, struct drm_mode_cursor2) 763224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 764224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 765224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Device specific ioctls should only be in their respective headers 766224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * The device specific ioctl range is from 0x40 to 0x99. 767224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Generic IOCTLS restart at 0xA0. 768224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 769224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * \sa drmCommandNone(), drmCommandRead(), drmCommandWrite(), and 770224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * drmCommandReadWrite(). 771224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 772224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_COMMAND_BASE 0x40 773224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_COMMAND_END 0xA0 774224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 775224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/** 776224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Header for events written back to userspace on the drm fd. The 777224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * type defines the type of event, the length specifies the total 778224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * length of the event (including the header), and user_data is 779224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * typically a 64 bit value passed with the ioctl that triggered the 780224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * event. A read on the drm fd will always only return complete 781224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * events, that is, if for example the read buffer is 100 bytes, and 782224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * there are two 64 byte events pending, only one will be returned. 783224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * 784224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * Event types 0 - 0x7fffffff are generic drm events, 0x80000000 and 785224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng * up are chipset specific. 786224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng */ 787224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_event { 788224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 type; 789224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 length; 790224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 791224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 792224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_EVENT_VBLANK 0x01 793224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#define DRM_EVENT_FLIP_COMPLETE 0x02 794224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 795224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengstruct drm_event_vblank { 796224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng struct drm_event base; 797224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u64 user_data; 798224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 tv_sec; 799224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 tv_usec; 800224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 sequence; 801224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng __u32 reserved; 802224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng}; 803224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 804224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng/* typedef area */ 805224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#ifndef __KERNEL__ 806224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_clip_rect drm_clip_rect_t; 807224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_drawable_info drm_drawable_info_t; 808224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_tex_region drm_tex_region_t; 809224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_hw_lock drm_hw_lock_t; 810224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_version drm_version_t; 811224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_unique drm_unique_t; 812224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_list drm_list_t; 813224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_block drm_block_t; 814224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_control drm_control_t; 815224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef enum drm_map_type drm_map_type_t; 816224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef enum drm_map_flags drm_map_flags_t; 817224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_ctx_priv_map drm_ctx_priv_map_t; 818224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_map drm_map_t; 819224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_client drm_client_t; 820224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef enum drm_stat_type drm_stat_type_t; 821224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_stats drm_stats_t; 822224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef enum drm_lock_flags drm_lock_flags_t; 823224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_lock drm_lock_t; 824224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef enum drm_dma_flags drm_dma_flags_t; 825224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_buf_desc drm_buf_desc_t; 826224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_buf_info drm_buf_info_t; 827224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_buf_free drm_buf_free_t; 828224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_buf_pub drm_buf_pub_t; 829224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_buf_map drm_buf_map_t; 830224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_dma drm_dma_t; 831224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef union drm_wait_vblank drm_wait_vblank_t; 832224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_agp_mode drm_agp_mode_t; 833224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef enum drm_ctx_flags drm_ctx_flags_t; 834224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_ctx drm_ctx_t; 835224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_ctx_res drm_ctx_res_t; 836224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_draw drm_draw_t; 837224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_update_draw drm_update_draw_t; 838224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_auth drm_auth_t; 839224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_irq_busid drm_irq_busid_t; 840224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef enum drm_vblank_seq_type drm_vblank_seq_type_t; 841224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 842224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_agp_buffer drm_agp_buffer_t; 843224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_agp_binding drm_agp_binding_t; 844224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_agp_info drm_agp_info_t; 845224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_scatter_gather drm_scatter_gather_t; 846224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Chengtypedef struct drm_set_version drm_set_version_t; 847224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#endif 848224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng 849224b54f69543a5c0ec18f99bd717d2b724582eb6Ben Cheng#endif 850