init.h revision 172b01d775275525d3f44b5c8642f8729a0cfbb7 
1/* libunwind - a platform-independent unwind library
2   Copyright (C) 2002-2003 Hewlett-Packard Co
3	Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
4
5This file is part of libunwind.
6
7Permission is hereby granted, free of charge, to any person obtaining
8a copy of this software and associated documentation files (the
9"Software"), to deal in the Software without restriction, including
10without limitation the rights to use, copy, modify, merge, publish,
11distribute, sublicense, and/or sell copies of the Software, and to
12permit persons to whom the Software is furnished to do so, subject to
13the following conditions:
14
15The above copyright notice and this permission notice shall be
16included in all copies or substantial portions of the Software.
17
18THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
19EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
21NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE
22LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
23OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
24WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.  */
25
26#include "unwind_i.h"
27
28static inline int
29common_init (struct cursor *c)
30{
31  unw_word_t bspstore;
32  int i, ret;
33
34  if (c->as->caching_policy != UNW_CACHE_NONE)
35    /* ensure cache doesn't have any stale contents: */
36    ia64_validate_cache(c->as);
37
38  c->cfm_loc =			IA64_REG_LOC (c, UNW_IA64_CFM);
39  c->loc[IA64_REG_BSP] =	IA64_REG_LOC (c, UNW_IA64_AR_BSP);
40  c->loc[IA64_REG_BSPSTORE] =	IA64_REG_LOC (c, UNW_IA64_AR_BSPSTORE);
41  c->loc[IA64_REG_PFS] =	IA64_REG_LOC (c, UNW_IA64_AR_PFS);
42  c->loc[IA64_REG_RNAT] =	IA64_REG_LOC (c, UNW_IA64_AR_RNAT);
43  c->loc[IA64_REG_IP] =		IA64_REG_LOC (c, UNW_IA64_IP);
44  c->loc[IA64_REG_PRI_UNAT_MEM] = IA64_NULL_LOC; /* no primary UNaT location */
45  c->loc[IA64_REG_UNAT] =	IA64_REG_LOC (c, UNW_IA64_AR_UNAT);
46  c->loc[IA64_REG_PR] =		IA64_REG_LOC (c, UNW_IA64_PR);
47  c->loc[IA64_REG_LC] =		IA64_REG_LOC (c, UNW_IA64_AR_LC);
48  c->loc[IA64_REG_FPSR] =	IA64_REG_LOC (c, UNW_IA64_AR_FPSR);
49
50  c->loc[IA64_REG_R4] = IA64_REG_LOC (c, UNW_IA64_GR + 4);
51  c->loc[IA64_REG_R5] = IA64_REG_LOC (c, UNW_IA64_GR + 5);
52  c->loc[IA64_REG_R6] = IA64_REG_LOC (c, UNW_IA64_GR + 6);
53  c->loc[IA64_REG_R7] = IA64_REG_LOC (c, UNW_IA64_GR + 7);
54
55  /* This says that each NaT bit is stored along with the
56     corresponding preserved register: */
57  c->loc[IA64_REG_NAT4] = IA64_LOC_REG (4, 0);
58  c->loc[IA64_REG_NAT5] = IA64_LOC_REG (5, 0);
59  c->loc[IA64_REG_NAT6] = IA64_LOC_REG (6, 0);
60  c->loc[IA64_REG_NAT7] = IA64_LOC_REG (7, 0);
61
62  c->loc[IA64_REG_B1] = IA64_REG_LOC (c, UNW_IA64_BR + 1);
63  c->loc[IA64_REG_B2] = IA64_REG_LOC (c, UNW_IA64_BR + 2);
64  c->loc[IA64_REG_B3] = IA64_REG_LOC (c, UNW_IA64_BR + 3);
65  c->loc[IA64_REG_B4] = IA64_REG_LOC (c, UNW_IA64_BR + 4);
66  c->loc[IA64_REG_B5] = IA64_REG_LOC (c, UNW_IA64_BR + 5);
67
68  c->loc[IA64_REG_F2] = IA64_FPREG_LOC (c, UNW_IA64_FR + 2);
69  c->loc[IA64_REG_F3] = IA64_FPREG_LOC (c, UNW_IA64_FR + 3);
70  c->loc[IA64_REG_F4] = IA64_FPREG_LOC (c, UNW_IA64_FR + 4);
71  c->loc[IA64_REG_F5] = IA64_FPREG_LOC (c, UNW_IA64_FR + 5);
72  for (i = IA64_REG_F16; i <= IA64_REG_F31; ++i)
73    c->loc[i] = IA64_FPREG_LOC (c, UNW_IA64_FR + 16 + (i - IA64_REG_F16));
74
75  ret = ia64_get (c, c->loc[IA64_REG_IP], &c->ip);
76  if (ret < 0)
77    return ret;
78
79  ret = ia64_get (c, c->cfm_loc, &c->cfm);
80  if (ret < 0)
81    return ret;
82
83  ret = ia64_get (c, c->loc[IA64_REG_PR], &c->pr);
84  if (ret < 0)
85    return ret;
86
87  ret = ia64_get (c, IA64_REG_LOC (c, UNW_IA64_GR + 12), &c->sp);
88  if (ret < 0)
89    return ret;
90
91  c->psp = c->sp;
92
93  ret = ia64_get (c, c->loc[IA64_REG_BSP], &c->bsp);
94  if (ret < 0)
95    return ret;
96
97  ret = ia64_get (c, c->loc[IA64_REG_BSPSTORE], &bspstore);
98  if (ret < 0)
99    return ret;
100
101  c->rbs_curr = c->rbs_left_edge = 0;
102
103  /* There is no way to know the real size of the most recent
104     (right-most) RBS so we'll just assume it to occupy a quarter of
105     the address space (so we have a notion of "above" and "below" and
106     one bit to indicate whether the backing store needs to be
107     accessed via uc_access(3)).  */
108  c->rbs_area[0].end = bspstore;
109  c->rbs_area[0].size = ((unw_word_t) 1) << 63;	/* initial guess... */
110  c->rbs_area[0].rnat_loc = IA64_REG_LOC (c, UNW_IA64_AR_RNAT);
111  debug (10, "%s: initial rbs-area: [?-0x%llx), rnat@%s\n", __FUNCTION__,
112	 (long long) c->rbs_area[0].end,
113	 ia64_strloc (c->rbs_area[0].rnat_loc));
114
115  c->pi.flags = 0;
116
117  c->sigcontext_addr = 0;
118  c->abi_marker = 0;
119  c->last_abi_marker = 0;
120
121  c->hint = 0;
122  c->prev_script = 0;
123  c->eh_valid_mask = 0;
124  c->pi_valid = 0;
125  return 0;
126}
127