init.h revision 9724ac492c56e38916cea471af0c2bdb5379ac3f
1/* libunwind - a platform-independent unwind library 2 Copyright (C) 2002-2005 Hewlett-Packard Co 3 Contributed by David Mosberger-Tang <davidm@hpl.hp.com> 4 5This file is part of libunwind. 6 7Permission is hereby granted, free of charge, to any person obtaining 8a copy of this software and associated documentation files (the 9"Software"), to deal in the Software without restriction, including 10without limitation the rights to use, copy, modify, merge, publish, 11distribute, sublicense, and/or sell copies of the Software, and to 12permit persons to whom the Software is furnished to do so, subject to 13the following conditions: 14 15The above copyright notice and this permission notice shall be 16included in all copies or substantial portions of the Software. 17 18THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 19EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 20MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 21NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS BE 22LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION 23OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION 24WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */ 25 26#include "unwind_i.h" 27 28static ALWAYS_INLINE int 29common_init (struct cursor *c, unw_word_t sp, unw_word_t bsp) 30{ 31 unw_word_t bspstore, rbs_base; 32 uint8_t *natp; 33 int ret; 34 35 if (c->as->caching_policy != UNW_CACHE_NONE) 36 /* ensure cache doesn't have any stale contents: */ 37 ia64_validate_cache (c->as, c->as_arg); 38 39 c->cfm_loc = IA64_REG_LOC (c, UNW_IA64_CFM); 40 c->loc[IA64_REG_BSP] = IA64_NULL_LOC; 41 c->loc[IA64_REG_BSPSTORE] = IA64_REG_LOC (c, UNW_IA64_AR_BSPSTORE); 42 c->loc[IA64_REG_PFS] = IA64_REG_LOC (c, UNW_IA64_AR_PFS); 43 c->loc[IA64_REG_RNAT] = IA64_REG_LOC (c, UNW_IA64_AR_RNAT); 44 c->loc[IA64_REG_IP] = IA64_REG_LOC (c, UNW_IA64_IP); 45 c->loc[IA64_REG_PRI_UNAT_MEM] = IA64_NULL_LOC; /* no primary UNaT location */ 46 c->loc[IA64_REG_UNAT] = IA64_REG_LOC (c, UNW_IA64_AR_UNAT); 47 c->loc[IA64_REG_PR] = IA64_REG_LOC (c, UNW_IA64_PR); 48 c->loc[IA64_REG_LC] = IA64_REG_LOC (c, UNW_IA64_AR_LC); 49 c->loc[IA64_REG_FPSR] = IA64_REG_LOC (c, UNW_IA64_AR_FPSR); 50 51 c->loc[IA64_REG_R4] = IA64_REG_LOC (c, UNW_IA64_GR + 4); 52 c->loc[IA64_REG_R5] = IA64_REG_LOC (c, UNW_IA64_GR + 5); 53 c->loc[IA64_REG_R6] = IA64_REG_LOC (c, UNW_IA64_GR + 6); 54 c->loc[IA64_REG_R7] = IA64_REG_LOC (c, UNW_IA64_GR + 7); 55 56 natp = c->nat_bitnr; 57 c->loc[IA64_REG_NAT4] = IA64_REG_NAT_LOC (c, UNW_IA64_NAT + 4, &natp[0]); 58 c->loc[IA64_REG_NAT5] = IA64_REG_NAT_LOC (c, UNW_IA64_NAT + 5, &natp[1]); 59 c->loc[IA64_REG_NAT6] = IA64_REG_NAT_LOC (c, UNW_IA64_NAT + 6, &natp[2]); 60 c->loc[IA64_REG_NAT7] = IA64_REG_NAT_LOC (c, UNW_IA64_NAT + 7, &natp[3]); 61 62 c->loc[IA64_REG_B1] = IA64_REG_LOC (c, UNW_IA64_BR + 1); 63 c->loc[IA64_REG_B2] = IA64_REG_LOC (c, UNW_IA64_BR + 2); 64 c->loc[IA64_REG_B3] = IA64_REG_LOC (c, UNW_IA64_BR + 3); 65 c->loc[IA64_REG_B4] = IA64_REG_LOC (c, UNW_IA64_BR + 4); 66 c->loc[IA64_REG_B5] = IA64_REG_LOC (c, UNW_IA64_BR + 5); 67 68 c->loc[IA64_REG_F2] = IA64_FPREG_LOC (c, UNW_IA64_FR + 2); 69 c->loc[IA64_REG_F3] = IA64_FPREG_LOC (c, UNW_IA64_FR + 3); 70 c->loc[IA64_REG_F4] = IA64_FPREG_LOC (c, UNW_IA64_FR + 4); 71 c->loc[IA64_REG_F5] = IA64_FPREG_LOC (c, UNW_IA64_FR + 5); 72 c->loc[IA64_REG_F16] = IA64_FPREG_LOC (c, UNW_IA64_FR + 16); 73 c->loc[IA64_REG_F17] = IA64_FPREG_LOC (c, UNW_IA64_FR + 17); 74 c->loc[IA64_REG_F18] = IA64_FPREG_LOC (c, UNW_IA64_FR + 18); 75 c->loc[IA64_REG_F19] = IA64_FPREG_LOC (c, UNW_IA64_FR + 19); 76 c->loc[IA64_REG_F20] = IA64_FPREG_LOC (c, UNW_IA64_FR + 20); 77 c->loc[IA64_REG_F21] = IA64_FPREG_LOC (c, UNW_IA64_FR + 21); 78 c->loc[IA64_REG_F22] = IA64_FPREG_LOC (c, UNW_IA64_FR + 22); 79 c->loc[IA64_REG_F23] = IA64_FPREG_LOC (c, UNW_IA64_FR + 23); 80 c->loc[IA64_REG_F24] = IA64_FPREG_LOC (c, UNW_IA64_FR + 24); 81 c->loc[IA64_REG_F25] = IA64_FPREG_LOC (c, UNW_IA64_FR + 25); 82 c->loc[IA64_REG_F26] = IA64_FPREG_LOC (c, UNW_IA64_FR + 26); 83 c->loc[IA64_REG_F27] = IA64_FPREG_LOC (c, UNW_IA64_FR + 27); 84 c->loc[IA64_REG_F28] = IA64_FPREG_LOC (c, UNW_IA64_FR + 28); 85 c->loc[IA64_REG_F29] = IA64_FPREG_LOC (c, UNW_IA64_FR + 29); 86 c->loc[IA64_REG_F30] = IA64_FPREG_LOC (c, UNW_IA64_FR + 30); 87 c->loc[IA64_REG_F31] = IA64_FPREG_LOC (c, UNW_IA64_FR + 31); 88 89 ret = ia64_get (c, c->loc[IA64_REG_IP], &c->ip); 90 if (ret < 0) 91 return ret; 92 93 ret = ia64_get (c, c->cfm_loc, &c->cfm); 94 if (ret < 0) 95 return ret; 96 97 ret = ia64_get (c, c->loc[IA64_REG_PR], &c->pr); 98 if (ret < 0) 99 return ret; 100 101 c->sp = c->psp = sp; 102 c->bsp = bsp; 103 104 ret = ia64_get (c, c->loc[IA64_REG_BSPSTORE], &bspstore); 105 if (ret < 0) 106 return ret; 107 108 c->rbs_curr = c->rbs_left_edge = 0; 109 110 /* Try to find a base of the register backing-store. We may default 111 to a reasonable value (e.g., half the address-space down from 112 bspstore). If the BSPSTORE looks corrupt, we fail. */ 113 if ((ret = rbs_get_base (c, bspstore, &rbs_base)) < 0) 114 return ret; 115 116 c->rbs_area[0].end = bspstore; 117 c->rbs_area[0].size = bspstore - rbs_base; 118 c->rbs_area[0].rnat_loc = IA64_REG_LOC (c, UNW_IA64_AR_RNAT); 119 Debug (10, "initial rbs-area: [0x%llx-0x%llx), rnat@%s\n", 120 (long long) rbs_base, (long long) c->rbs_area[0].end, 121 ia64_strloc (c->rbs_area[0].rnat_loc)); 122 123 c->pi.flags = 0; 124 125 c->sigcontext_addr = 0; 126 c->abi_marker = 0; 127 c->last_abi_marker = 0; 128 129 c->hint = 0; 130 c->prev_script = 0; 131 c->eh_valid_mask = 0; 132 c->pi_valid = 0; 133 return 0; 134} 135