Passes.h revision fe0c882e5a6ddf4e3c9f771485fdaa4672759539 
1//===-- Passes.h - Target independent code generation passes ----*- C++ -*-===//
2//
3//                     The LLVM Compiler Infrastructure
4//
5// This file was developed by the LLVM research group and is distributed under
6// the University of Illinois Open Source License. See LICENSE.TXT for details.
7//
8//===----------------------------------------------------------------------===//
9//
10// This file defines interfaces to access the target independent code generation
11// passes provided by the LLVM backend.
12//
13//===----------------------------------------------------------------------===//
14
15#ifndef LLVM_CODEGEN_PASSES_H
16#define LLVM_CODEGEN_PASSES_H
17
18#include <iosfwd>
19#include <string>
20
21namespace llvm {
22
23  class FunctionPass;
24  class PassInfo;
25  class TargetMachine;
26  class RegisterCoalescer;
27
28  /// createUnreachableBlockEliminationPass - The LLVM code generator does not
29  /// work well with unreachable basic blocks (what live ranges make sense for a
30  /// block that cannot be reached?).  As such, a code generator should either
31  /// not instruction select unreachable blocks, or it can run this pass as it's
32  /// last LLVM modifying pass to clean up blocks that are not reachable from
33  /// the entry block.
34  FunctionPass *createUnreachableBlockEliminationPass();
35
36  /// MachineFunctionPrinter pass - This pass prints out the machine function to
37  /// standard error, as a debugging tool.
38  FunctionPass *createMachineFunctionPrinterPass(std::ostream *OS,
39                                                 const std::string &Banner ="");
40
41  /// PHIElimination pass - This pass eliminates machine instruction PHI nodes
42  /// by inserting copy instructions.  This destroys SSA information, but is the
43  /// desired input for some register allocators.  This pass is "required" by
44  /// these register allocator like this: AU.addRequiredID(PHIEliminationID);
45  ///
46  extern const PassInfo *PHIEliminationID;
47
48  /// StrongPHIElimination pass - This pass eliminates machine instruction PHI
49  /// nodes by inserting copy instructions.  This destroys SSA information, but
50  /// is the desired input for some register allocators.  This pass is
51  /// "required" by these register allocator like this:
52  ///    AU.addRequiredID(PHIEliminationID);
53  ///  This pass is still in development
54  extern const PassInfo *StrongPHIEliminationID;
55
56  /// SimpleRegisterCoalescing pass.  Aggressively coalesces every register
57  /// copy it can.
58  ///
59  extern const PassInfo *SimpleRegisterCoalescingID;
60
61  /// TwoAddressInstruction pass - This pass reduces two-address instructions to
62  /// use two operands. This destroys SSA information but it is desired by
63  /// register allocators.
64  extern const PassInfo *TwoAddressInstructionPassID;
65
66  /// Creates a register allocator as the user specified on the command line.
67  ///
68  FunctionPass *createRegisterAllocator();
69
70  /// SimpleRegisterAllocation Pass - This pass converts the input machine code
71  /// from SSA form to use explicit registers by spilling every register.  Wow,
72  /// great policy huh?
73  ///
74  FunctionPass *createSimpleRegisterAllocator();
75
76  /// LocalRegisterAllocation Pass - This pass register allocates the input code
77  /// a basic block at a time, yielding code better than the simple register
78  /// allocator, but not as good as a global allocator.
79  ///
80  FunctionPass *createLocalRegisterAllocator();
81
82  /// BigBlockRegisterAllocation Pass - The BigBlock register allocator
83  /// munches single basic blocks at a time, like the local register
84  /// allocator.  While the BigBlock allocator is a little slower, and uses
85  /// somewhat more memory than the local register allocator, it tends to
86  /// yield the best allocations (of any of the allocators) for blocks that
87  /// have hundreds or thousands of instructions in sequence.
88  ///
89  FunctionPass *createBigBlockRegisterAllocator();
90
91  /// LinearScanRegisterAllocation Pass - This pass implements the linear scan
92  /// register allocation algorithm, a global register allocator.
93  ///
94  FunctionPass *createLinearScanRegisterAllocator();
95
96  /// SimpleRegisterCoalescing Pass - Coalesce all copies possible.  Can run
97  /// independently of the register allocator.
98  ///
99  RegisterCoalescer *createSimpleRegisterCoalescer();
100
101  /// PrologEpilogCodeInserter Pass - This pass inserts prolog and epilog code,
102  /// and eliminates abstract frame references.
103  ///
104  FunctionPass *createPrologEpilogCodeInserter();
105
106  /// LowerSubregs Pass - This pass lowers subregs to register-register copies
107  /// which yields suboptimal, but correct code if the register allocator
108  /// cannot coalesce all subreg operations during allocation.
109  ///
110  FunctionPass *createLowerSubregsPass();
111
112  /// createPostRAScheduler - under development.
113  FunctionPass *createPostRAScheduler();
114
115  /// BranchFolding Pass - This pass performs machine code CFG based
116  /// optimizations to delete branches to branches, eliminate branches to
117  /// successor blocks (creating fall throughs), and eliminating branches over
118  /// branches.
119  FunctionPass *createBranchFoldingPass(bool DefaultEnableTailMerge);
120
121  /// IfConverter Pass - This pass performs machine code if conversion.
122  FunctionPass *createIfConverterPass();
123
124  /// DebugLabelFoldingPass - This pass prunes out redundant debug labels.  This
125  /// allows a debug emitter to determine if the range of two labels is empty,
126  /// by seeing if the labels map to the same reduced label.
127  FunctionPass *createDebugLabelFoldingPass();
128
129  /// MachineCodeDeletion Pass - This pass deletes all of the machine code for
130  /// the current function, which should happen after the function has been
131  /// emitted to a .s file or to memory.
132  FunctionPass *createMachineCodeDeleter();
133
134  /// getRegisterAllocator - This creates an instance of the register allocator
135  /// for the Sparc.
136  FunctionPass *getRegisterAllocator(TargetMachine &T);
137
138} // End llvm namespace
139
140#endif
141